/openbmc/qemu/target/alpha/ |
H A D | translate.c | 414 tcg_gen_setcond_i64(TCG_COND_EQ, ctx->ir[ra], val, cpu_lock_value); in gen_store_conditional() 1548 tcg_gen_setcond_i64(TCG_COND_LTU, vc, va, vb); in translate_one() 1572 tcg_gen_setcond_i64(TCG_COND_EQ, vc, va, vb); in translate_one() 1588 tcg_gen_setcond_i64(TCG_COND_LEU, vc, va, vb); in translate_one() 1610 tcg_gen_setcond_i64(TCG_COND_LT, vc, va, vb); in translate_one() 1640 tcg_gen_setcond_i64(TCG_COND_LE, vc, va, vb); in translate_one()
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/openbmc/qemu/include/tcg/ |
H A D | tcg-op.h | 199 #define tcg_gen_setcond_tl tcg_gen_setcond_i64
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H A D | tcg-op-common.h | 227 void tcg_gen_setcond_i64(TCGCond cond, TCGv_i64 ret,
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/openbmc/qemu/tcg/ |
H A D | tcg-op.c | 1958 void tcg_gen_setcond_i64(TCGCond cond, TCGv_i64 ret, in tcg_gen_setcond_i64() function 1981 tcg_gen_setcond_i64(cond, ret, arg1, tcg_constant_i64(arg2)); in tcg_gen_setcondi_i64() 2017 tcg_gen_setcond_i64(cond, ret, arg1, arg2); in tcg_gen_negsetcond_i64() 3015 tcg_gen_setcond_i64(TCG_COND_LTU, t1, t0, al); in tcg_gen_add2_i64() 3033 tcg_gen_setcond_i64(TCG_COND_LTU, t1, al, bl); in tcg_gen_sub2_i64()
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/openbmc/qemu/target/hexagon/ |
H A D | genptr.c | 1393 tcg_gen_setcond_i64(TCG_COND_NE, ovfl_64, tmp, source); in gen_sat_i64_ovfl() 1414 tcg_gen_setcond_i64(TCG_COND_NE, ovfl_64, tmp, source); in gen_satu_i64_ovfl()
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/openbmc/qemu/target/hppa/ |
H A D | translate.c | 483 tcg_gen_setcond_i64(ctx->null_cond.c, cpu_psw_n, in nullify_save() 1067 tcg_gen_setcond_i64(cond.c, tmp, cond.a0, cond.a1); in do_add() 1163 tcg_gen_setcond_i64(cond.c, tmp, cond.a0, cond.a1); in do_sub() 1283 tcg_gen_setcond_i64(cond.c, tmp, cond.a0, cond.a1); in do_unit() 1830 tcg_gen_setcond_i64(tcg_invert_cond(c), cpu_psw_n, a0, a1); in do_ibranch()
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/openbmc/qemu/target/openrisc/ |
H A D | translate.c | 373 tcg_gen_setcond_i64(TCG_COND_LTU, t1, cpu_mac, t1); in gen_macu() 413 tcg_gen_setcond_i64(TCG_COND_LTU, t2, cpu_mac, t1); in gen_msbu()
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/openbmc/qemu/target/s390x/tcg/ |
H A D | translate_vx.c.inc | 1344 tcg_gen_setcond_i64(TCG_COND_LTU, d, t, b); 2307 tcg_gen_setcond_i64(TCG_COND_GEU, d, a, b);
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H A D | translate.c | 2138 tcg_gen_setcond_i64(TCG_COND_NE, cc, o->in2, o->out); in op_cs() 2202 tcg_gen_setcond_i64(TCG_COND_NE, cc, o->in1, old); in op_csp()
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/openbmc/qemu/target/ppc/translate/ |
H A D | vsx-impl.c.inc | 1805 tcg_gen_setcond_i64(TCG_COND_EQ, all_false, all_false, zero); 1807 tcg_gen_setcond_i64(TCG_COND_EQ, all_true, all_true, mask);
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/openbmc/qemu/target/arm/tcg/ |
H A D | translate-a64.c | 850 tcg_gen_setcond_i64(TCG_COND_GEU, flag, t0, t1); in gen_sub64_CC() 2534 tcg_gen_setcond_i64(TCG_COND_NE, tmp, tmp, cpu_exclusive_val); in gen_store_exclusive() 2570 tcg_gen_setcond_i64(TCG_COND_NE, tmp, tmp, cpu_exclusive_val); in gen_store_exclusive() 5046 tcg_gen_setcond_i64(tcg_invert_cond(c.cond), in disas_cond_select()
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H A D | translate-sve.c | 3184 tcg_gen_setcond_i64(cond, cmp, rn, rm); in trans_CTERM()
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H A D | translate.c | 4941 tcg_gen_setcond_i64(TCG_COND_NE, o64, o64, cpu_exclusive_val); in gen_store_exclusive()
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/openbmc/qemu/target/i386/tcg/ |
H A D | translate.c | 2342 tcg_gen_setcond_i64(cond, s->tmp1_i64, s->tmp1_i64, bndv); in gen_bndck() 2987 tcg_gen_setcond_i64(TCG_COND_EQ, cmp, old, cmp); in gen_cmpxchg8b()
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/openbmc/qemu/target/tricore/ |
H A D | translate.c | 574 tcg_gen_setcond_i64(TCG_COND_LTU, t2, t2, t1); in gen_maddu64_d() 1291 tcg_gen_setcond_i64(TCG_COND_GTU, t1, t1, t2); in gen_msubu64_d()
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/openbmc/qemu/target/ppc/ |
H A D | translate.c | 2094 tcg_gen_setcond_i64(TCG_COND_NE, cpu_ov, t0, t1); in gen_mulldo()
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/openbmc/qemu/target/mips/tcg/ |
H A D | translate.c | 4131 tcg_gen_setcond_i64(cond, t64, t0, t1); in gen_loongson_multimedia()
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