Home
last modified time | relevance | path

Searched refs:t3 (Results 1 – 25 of 58) sorted by relevance

123

/openbmc/u-boot/arch/mips/mach-mt7620/
H A Dlowlevel_init.S81 lw t3, 0(t0)
82 ori t3, t3, 0x1
83 sw t3, 0(t0)
94 lw t3, 0(t0)
96 and t3, t3, t5
98 or t3, t3, t5
99 sw t3, 0(t0)
101 lw t3, 0(t0)
103 and t3, t3, t4
104 ori t3, t3, 0xc
[all …]
/openbmc/qemu/target/mips/tcg/
H A Dmxu_translate.c996 TCGv t0, t1, t2, t3; in gen_mxu_d16mul() local
1002 t3 = tcg_temp_new(); in gen_mxu_d16mul()
1019 gen_load_mxu_gpr(t3, XRc); in gen_mxu_d16mul()
1020 tcg_gen_sextract_tl(t2, t3, 0, 16); in gen_mxu_d16mul()
1021 tcg_gen_sextract_tl(t3, t3, 16, 16); in gen_mxu_d16mul()
1025 tcg_gen_mul_tl(t3, t1, t3); in gen_mxu_d16mul()
1029 tcg_gen_mul_tl(t3, t0, t3); in gen_mxu_d16mul()
1033 tcg_gen_mul_tl(t3, t1, t3); in gen_mxu_d16mul()
1037 tcg_gen_mul_tl(t3, t0, t3); in gen_mxu_d16mul()
1045 tcg_gen_shli_tl(t3, t3, 1); in gen_mxu_d16mul()
[all …]
H A Dtranslate.c2865 TCGv_i32 t3 = tcg_temp_new_i32(); in gen_shift() local
2868 tcg_gen_trunc_tl_i32(t3, t1); in gen_shift()
2870 tcg_gen_rotr_i32(t2, t3, t2); in gen_shift()
3049 TCGv t3 = tcg_temp_new(); in gen_r6_muldiv() local
3053 tcg_gen_setcondi_tl(TCG_COND_EQ, t3, t1, -1); in gen_r6_muldiv()
3054 tcg_gen_and_tl(t2, t2, t3); in gen_r6_muldiv()
3055 tcg_gen_setcondi_tl(TCG_COND_EQ, t3, t1, 0); in gen_r6_muldiv()
3056 tcg_gen_or_tl(t2, t2, t3); in gen_r6_muldiv()
3065 TCGv t3 = tcg_temp_new(); in gen_r6_muldiv() local
3069 tcg_gen_setcondi_tl(TCG_COND_EQ, t3, t1, -1); in gen_r6_muldiv()
[all …]
/openbmc/u-boot/arch/riscv/cpu/
H A Dstart.S104 la t3, __bss_start
105 sub t3, t3, t0 /* t3 <- __bss_start_ofs */
106 add t2, t0, t3 /* t2 <- source end address */
132 li t3, R_RISCV_RELATIVE /* reloc type R_RISCV_RELATIVE */
133 bne t5, t3, 8f /* skip non-RISCV_RELOC entries */
134 LREG t3, -(REGBYTES*3)(t1)
137 add t3, t3, t6 /* t3 <-- location to fix up in RAM */
138 SREG t5, 0(t3)
151 li t3, RELOC_TYPE
152 bne t5, t3, 10f /* skip non-addned entries */
[all …]
/openbmc/qemu/crypto/
H A Daes.c1451 u32 s0, s1, s2, s3, t0, t1, t2, t3; in AES_encrypt() local
1472 …t3 = AES_Te0[s3 >> 24] ^ AES_Te1[(s0 >> 16) & 0xff] ^ AES_Te2[(s1 >> 8) & 0xff] ^ AES_Te3[s2 & 0x… in AES_encrypt()
1474 …[t0 >> 24] ^ AES_Te1[(t1 >> 16) & 0xff] ^ AES_Te2[(t2 >> 8) & 0xff] ^ AES_Te3[t3 & 0xff] ^ rk[ 8]; in AES_encrypt()
1475 …s1 = AES_Te0[t1 >> 24] ^ AES_Te1[(t2 >> 16) & 0xff] ^ AES_Te2[(t3 >> 8) & 0xff] ^ AES_Te3[t0 & 0x… in AES_encrypt()
1476 …s2 = AES_Te0[t2 >> 24] ^ AES_Te1[(t3 >> 16) & 0xff] ^ AES_Te2[(t0 >> 8) & 0xff] ^ AES_Te3[t1 & 0x… in AES_encrypt()
1477 …s3 = AES_Te0[t3 >> 24] ^ AES_Te1[(t0 >> 16) & 0xff] ^ AES_Te2[(t1 >> 8) & 0xff] ^ AES_Te3[t2 & 0x… in AES_encrypt()
1482 …t3 = AES_Te0[s3 >> 24] ^ AES_Te1[(s0 >> 16) & 0xff] ^ AES_Te2[(s1 >> 8) & 0xff] ^ AES_Te3[s2 & 0x… in AES_encrypt()
1484 …[t0 >> 24] ^ AES_Te1[(t1 >> 16) & 0xff] ^ AES_Te2[(t2 >> 8) & 0xff] ^ AES_Te3[t3 & 0xff] ^ rk[16]; in AES_encrypt()
1485 …s1 = AES_Te0[t1 >> 24] ^ AES_Te1[(t2 >> 16) & 0xff] ^ AES_Te2[(t3 >> 8) & 0xff] ^ AES_Te3[t0 & 0x… in AES_encrypt()
1486 …s2 = AES_Te0[t2 >> 24] ^ AES_Te1[(t3 >> 16) & 0xff] ^ AES_Te2[(t0 >> 8) & 0xff] ^ AES_Te3[t1 & 0x… in AES_encrypt()
[all …]
/openbmc/qemu/include/exec/
H A Dhelper-gen.h.inc41 #define DEF_HELPER_FLAGS_3(name, flags, ret, t1, t2, t3) \
44 dh_arg_decl(t1, 1), dh_arg_decl(t2, 2), dh_arg_decl(t3, 3)) \
48 dh_arg(t1, 1), dh_arg(t2, 2), dh_arg(t3, 3)); \
51 #define DEF_HELPER_FLAGS_4(name, flags, ret, t1, t2, t3, t4) \
55 dh_arg_decl(t3, 3), dh_arg_decl(t4, 4)) \
60 dh_arg(t3, 3), dh_arg(t4, 4)); \
63 #define DEF_HELPER_FLAGS_5(name, flags, ret, t1, t2, t3, t4, t5) \
66 dh_arg_decl(t1, 1), dh_arg_decl(t2, 2), dh_arg_decl(t3, 3), \
71 dh_arg(t1, 1), dh_arg(t2, 2), dh_arg(t3, 3), \
75 #define DEF_HELPER_FLAGS_6(name, flags, ret, t1, t2, t3, t4, t5, t6) \
[all …]
H A Dhelper-proto.h.inc32 #define DEF_HELPER_FLAGS_3(name, flags, ret, t1, t2, t3) \
34 dh_ctype(t3)) DEF_HELPER_ATTR;
36 #define DEF_HELPER_FLAGS_4(name, flags, ret, t1, t2, t3, t4) \
37 dh_ctype(ret) HELPER(name) (dh_ctype(t1), dh_ctype(t2), dh_ctype(t3), \
40 #define DEF_HELPER_FLAGS_5(name, flags, ret, t1, t2, t3, t4, t5) \
41 dh_ctype(ret) HELPER(name) (dh_ctype(t1), dh_ctype(t2), dh_ctype(t3), \
44 #define DEF_HELPER_FLAGS_6(name, flags, ret, t1, t2, t3, t4, t5, t6) \
45 dh_ctype(ret) HELPER(name) (dh_ctype(t1), dh_ctype(t2), dh_ctype(t3), \
49 #define DEF_HELPER_FLAGS_7(name, flags, ret, t1, t2, t3, t4, t5, t6, t7) \
50 dh_ctype(ret) HELPER(name) (dh_ctype(t1), dh_ctype(t2), dh_ctype(t3), \
H A Dhelper-head.h.inc136 #define DEF_HELPER_3(name, ret, t1, t2, t3) \
137 DEF_HELPER_FLAGS_3(name, 0, ret, t1, t2, t3)
138 #define DEF_HELPER_4(name, ret, t1, t2, t3, t4) \
139 DEF_HELPER_FLAGS_4(name, 0, ret, t1, t2, t3, t4)
140 #define DEF_HELPER_5(name, ret, t1, t2, t3, t4, t5) \
141 DEF_HELPER_FLAGS_5(name, 0, ret, t1, t2, t3, t4, t5)
142 #define DEF_HELPER_6(name, ret, t1, t2, t3, t4, t5, t6) \
143 DEF_HELPER_FLAGS_6(name, 0, ret, t1, t2, t3, t4, t5, t6)
144 #define DEF_HELPER_7(name, ret, t1, t2, t3, t4, t5, t6, t7) \
145 DEF_HELPER_FLAGS_7(name, 0, ret, t1, t2, t3, t4, t5, t6, t7)
/openbmc/qemu/host/include/aarch64/host/
H A Dbufferiszero.c.inc17 uint32x4_t t0, t1, t2, t3;
29 t3 = e[-3] | e[-2];
32 REASSOC_BARRIER(t2, t3);
34 t2 |= t3;
55 t3 = p[6] | p[7];
57 REASSOC_BARRIER(t2, t3);
59 t2 |= t3;
/openbmc/u-boot/arch/mips/mach-ath79/ar933x/
H A Dlowlevel_init.S79 li t3, 0x03
91 addi t3, t3, -1
92 bnez t3, 1b
222 li t3, 100
227 bgt t4, t3, 0b
230 li t3, 5
266 addi t3, t3, -1
267 bnez t3, 3b
/openbmc/openbmc/meta-bytedance/meta-g220a/recipes-phosphor/datetime/me-time-sync/
H A Dme-time-sync.sh21 t3=$((a[10]*256*256*256))
22 t=$((t0+t1+t2+t3))
/openbmc/u-boot/arch/mips/include/asm/
H A Dregdef.h30 #define t3 $11 macro
81 #define t3 $15 macro
/openbmc/u-boot/board/imgtec/malta/
H A Dlowlevel_init.S157 li t3, MALTA_MSC01_PCIMEM_MAP
160 sw t3, MSC01_PCI_SC2PMMAPL_OFS(t0)
165 li t3, MALTA_MSC01_PCIIO_MAP
168 sw t3, MSC01_PCI_SC2PIOMAPL_OFS(t0)
/openbmc/qemu/target/tricore/
H A Dop_helper.c674 int64_t t3 = sextract64(r3, 0, 32); in helper_madd32_ssov() local
677 result = t2 + (t1 * t3); in helper_madd32_ssov()
686 uint64_t t3 = extract64(r3, 0, 32); in helper_madd32_suov() local
689 result = t2 + (t1 * t3); in helper_madd32_suov()
698 int64_t t3 = sextract64(r3, 0, 32); in helper_madd64_ssov() local
701 mul = t1 * t3; in helper_madd64_ssov()
772 int64_t t3 = sextract64(r3, 0, 32); in helper_madd64_q_ssov() local
776 mul = (t2 * t3) << n; in helper_madd64_q_ssov()
823 int64_t t3 = sextract64(r3, 0, 32); in helper_maddr_q_ssov() local
826 if ((t2 == -0x8000ll) && (t3 == -0x8000ll) && (n == 1)) { in helper_maddr_q_ssov()
[all …]
H A Dtranslate.c494 TCGv_i64 t3 = tcg_temp_new_i64(); in gen_madd32_d() local
498 tcg_gen_ext_i32_i64(t3, r3); in gen_madd32_d()
500 tcg_gen_mul_i64(t1, t1, t3); in gen_madd32_d()
506 tcg_gen_setcondi_i64(TCG_COND_GT, t3, t1, 0x7fffffffLL); in gen_madd32_d()
509 tcg_gen_or_i64(t2, t2, t3); in gen_madd32_d()
533 TCGv t3 = tcg_temp_new(); in gen_madd64_d() local
538 tcg_gen_add2_tl(t3, t4, r2_low, r2_high, t1, t2); in gen_madd64_d()
551 tcg_gen_mov_tl(ret_low, t3); in gen_madd64_d()
561 TCGv_i64 t3 = tcg_temp_new_i64(); in gen_maddu64_d() local
565 tcg_gen_extu_i32_i64(t3, r3); in gen_maddu64_d()
[all …]
/openbmc/qemu/tcg/
H A Dtcg-op-gvec.c867 TCGv_i32 t3 = tcg_temp_new_i32(); in expand_4_i32() local
873 tcg_gen_ld_i32(t3, tcg_env, cofs + i); in expand_4_i32()
874 fni(t0, t1, t2, t3); in expand_4_i32()
880 tcg_temp_free_i32(t3); in expand_4_i32()
894 TCGv_i32 t3 = tcg_temp_new_i32(); in expand_4i_i32() local
900 tcg_gen_ld_i32(t3, tcg_env, cofs + i); in expand_4i_i32()
901 fni(t0, t1, t2, t3, c); in expand_4i_i32()
904 tcg_temp_free_i32(t3); in expand_4i_i32()
1033 TCGv_i64 t3 = tcg_temp_new_i64(); in expand_4_i64() local
1039 tcg_gen_ld_i64(t3, tcg_env, cofs + i); in expand_4_i64()
[all …]
/openbmc/u-boot/scripts/coccinelle/null/
H A Dbadzero.cocci216 @ t3 depends on !patch disable is_zero,isnt_zero @
232 p << t3.p;
238 p << t3.p;
/openbmc/u-boot/arch/powerpc/lib/
H A D_ashrdi3.S37 rlwinm r8,r7,0,32 # t3 = (count < 32) ? 32 : 0
/openbmc/qemu/linux-user/riscv/
H A Dtarget_syscall.h40 abi_long t3; member
H A Dvdso.S62 li t3, 1000
63 divu t2, t2, t3 /* nsec -> usec */
/openbmc/qemu/linux-headers/asm-riscv/
H A Dptrace.h53 unsigned long t3; member
/openbmc/qemu/target/ppc/
H A Dtranslate.c1256 TCGv_i32 t3 = tcg_constant_i32(cause); in gen_fscr_facility_check() local
1258 gen_helper_fscr_facility_check(tcg_env, t1, t2, t3); in gen_fscr_facility_check()
1266 TCGv_i32 t3 = tcg_constant_i32(cause); in gen_msr_facility_check() local
1268 gen_helper_msr_facility_check(tcg_env, t1, t2, t3); in gen_msr_facility_check()
1782 TCGv_i32 t3 = tcg_temp_new_i32(); in gen_op_arith_divw() local
1788 tcg_gen_setcondi_i32(TCG_COND_EQ, t3, t1, -1); in gen_op_arith_divw()
1789 tcg_gen_and_i32(t2, t2, t3); in gen_op_arith_divw()
1790 tcg_gen_setcondi_i32(TCG_COND_EQ, t3, t1, 0); in gen_op_arith_divw()
1791 tcg_gen_or_i32(t2, t2, t3); in gen_op_arith_divw()
1792 tcg_gen_movi_i32(t3, 0); in gen_op_arith_divw()
[all …]
/openbmc/u-boot/arch/riscv/include/asm/
H A Dptrace.h41 unsigned long t3; member
/openbmc/qemu/tests/tcg/loongarch64/system/
H A Dregdef.h25 #define t3 $r15 macro
/openbmc/u-boot/arch/mips/lib/
H A Dcache_init.S402 li t3, GCR_Cx_COHERENCE_EN
404 li t3, GCR_Cx_COHERENCE_DOM_EN
405 1: sw t3, GCR_Cx_COHERENCE(t0)

123