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Searched refs:spin (Results 1 – 25 of 32) sorted by relevance

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/openbmc/qemu/include/qemu/
H A Dthread.h254 static inline void qemu_spin_init(QemuSpin *spin) in qemu_spin_init() argument
256 qatomic_set(&spin->value, 0); in qemu_spin_init()
258 __tsan_mutex_create(spin, __tsan_mutex_not_static); in qemu_spin_init()
262 static inline void qemu_spin_destroy(QemuSpin *spin) in qemu_spin_destroy() argument
265 __tsan_mutex_destroy(spin, __tsan_mutex_not_static); in qemu_spin_destroy()
269 static inline void qemu_spin_lock(QemuSpin *spin) in qemu_spin_lock() argument
272 __tsan_mutex_pre_lock(spin, 0); in qemu_spin_lock()
274 while (unlikely(qatomic_xchg(&spin->value, 1))) { in qemu_spin_lock()
275 while (qatomic_read(&spin->value)) { in qemu_spin_lock()
280 __tsan_mutex_post_lock(spin, 0, 0); in qemu_spin_lock()
[all …]
H A Dlockable.h59 QML_FUNC_(spin) in QML_FUNC_()
90 QemuSpin *: qemu_make_lockable(x, QML_OBJ_(x, spin)))
106 QemuSpin *: QML_OBJ_(x, spin))
/openbmc/u-boot/doc/
H A DREADME.mpc85xx-spin-table3 As specified by ePAPR v1.1, the spin table needs to be in cached memory. After
4 DDR is initialized and U-Boot relocates itself into DDR, the spin table is
6 __secondary_start_page. For other cores to use the spin table, the booting
15 core 0 puts the physical address of the spin table (which is in release.S and
21 the new space. The new TLB covers the physical address of the spin table page,
22 with WIMGE =0b00100. Now secondary cores can keep polling the spin table
23 without stress DDR bus because both the code and the spin table is in cache.
/openbmc/u-boot/arch/arm/dts/
H A Dbcm2837.dtsi39 enable-method = "spin-table";
47 enable-method = "spin-table";
55 enable-method = "spin-table";
63 enable-method = "spin-table";
/openbmc/qemu/hw/ppc/
H A Dppce500_spin.c57 SpinInfo spin[MAX_CPUS]; member
66 SpinInfo *info = &s->spin[i]; in spin_reset()
112 SpinInfo *curspin = &s->spin[env_idx]; in spin_write()
148 uint8_t *spin_p = &((uint8_t*)s->spin)[addr]; in spin_read()
/openbmc/qemu/docs/spin/
H A Daio_notify.promela11 * spin -p docs/aio_notify.promela
14 * spin -a docs/aio_notify.promela
19 * spin -a -DBUG docs/aio_notify.promela
H A Daio_notify_bug.promela11 * spin -a -DBUG docs/aio_notify_bug.promela
16 * spin -a docs/aio_notify_bug.promela
H A Daio_notify_accept.promela11 * spin -a -DBUG1 docs/aio_notify_bug.promela
17 * spin -a docs/aio_notify_bug.promela
H A Dwin32-qemu-event.promela11 * spin -a docs/event.promela
H A Dtcg-exclusive.promela12 * spin -a docs/tcg-exclusive.promela
/openbmc/openbmc/poky/bitbake/lib/toaster/toastergui/static/css/
H A Dfont-awesome.min.css33 …spin,.nav [class^="icon-"].icon-spin,.btn [class*=" icon-"].icon-spin,.nav [class*=" icon-"].icon-…
H A Ddefault.css270 /* icon has to be absolutely positioned, otherwise the spin animation doesn't work */
335 .fa-spin {
336 -webkit-animation: fa-spin 2s infinite linear;
337 animation: fa-spin 2s infinite linear;
341 -webkit-animation: fa-spin 1s infinite steps(8);
342 animation: fa-spin 1s infinite steps(8);
346 @-webkit-keyframes fa-spin {
357 @keyframes fa-spin {
391 animation: spin 1s linear infinite;
394 @keyframes spin {
/openbmc/u-boot/arch/arm/cpu/armv8/
H A DKconfig36 bool "Support spin-table enable method"
39 Say Y here to support "spin-table" enable method for booting Linux.
42 - Specify enable-method = "spin-table" in each CPU node in the
46 secondary CPUs will spin in unprotected memory area because the
47 master CPU protects the relocated spin code.
52 - Reserve the code for the spin-table and the release address
/openbmc/u-boot/board/freescale/common/
H A DKconfig22 esbc_halt - put the core in spin loop (Secure Boot Only)
/openbmc/phosphor-fan-presence/docs/monitor/
H A Dset_func_on_present.md15 will need to spin up before being set back to functional, and if it never spins
/openbmc/u-boot/arch/powerpc/cpu/mpc85xx/
H A Dcpu_init.c730 const char *spin; in cpu_init_r() local
795 spin = env_get("spin_table_compat"); in cpu_init_r()
796 if (spin && (*spin == 'n')) in cpu_init_r()
/openbmc/u-boot/arch/arm/cpu/armv7/ls102xa/
H A DKconfig51 in spin table to properly handle all cores.
/openbmc/openbmc/meta-security/meta-parsec/recipes-parsec/parsec-tool/
H A Dparsec-tool-crates.inc132 crate://crates.io/spin/0.5.2 \
314 SRC_URI[spin-0.5.2.sha256sum] = "6e63cff320ae2c57904679ba7cb63280a3dc4613885beafb148ee7bf9aa9042d"
/openbmc/openbmc/meta-security/recipes-security/krill/
H A Dkrill-crates.inc207 crate://crates.io/spin/0.5.2;name=spin-0.5.2 \
481 SRC_URI[spin-0.5.2.sha256sum] = "6e63cff320ae2c57904679ba7cb63280a3dc4613885beafb148ee7bf9aa9042d"
/openbmc/openbmc/meta-security/meta-parsec/recipes-parsec/parsec-service/
H A Dparsec-service-crates.inc180 crate://crates.io/spin/0.5.2 \
423 SRC_URI[spin-0.5.2.sha256sum] = "6e63cff320ae2c57904679ba7cb63280a3dc4613885beafb148ee7bf9aa9042d"
/openbmc/openbmc/poky/meta/recipes-devtools/rpm-sequoia/
H A Drpm-sequoia-crates.inc185 crate://crates.io/spin/0.9.8 \
427 SRC_URI[spin-0.9.8.sha256sum] = "6980e8d7511241f8acf4aebddbb1ff938df5eebe98691418c4468d0b72a96a67"
/openbmc/qemu/util/
H A Dqht.c259 void (*func)(QemuSpin *spin)) in qht_do_if_first_in_stripe() argument
/openbmc/u-boot/arch/arm/cpu/armv8/fsl-layerscape/
H A DKconfig357 in spin table to properly handle all cores.
/openbmc/phosphor-webui/app/common/styles/base/
H A Dfoundation.scss301 [type="number"]::-webkit-inner-spin-button,
302 [type="number"]::-webkit-outer-spin-button {
/openbmc/openbmc/meta-security/recipes-ids/suricata/
H A Dsuricata-crates.inc1081 crate://crates.io/spin/0.5.2 \
1131 SRC_URI[spin-0.5.2.sha256sum] = "6e63cff320ae2c57904679ba7cb63280a3dc4613885beafb148ee7bf9aa9042d"

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