Home
last modified time | relevance | path

Searched refs:shifter (Results 1 – 25 of 59) sorted by relevance

123

/openbmc/linux/arch/arm/boot/dts/st/
H A Dste-href520-tvk.dts42 /* VMMCI level-shifter enable */
47 /* VMMCI level-shifter voltage select */
H A Dste-hrefv60plus-tvk.dts43 /* VMMCI level-shifter enable */
48 /* VMMCI level-shifter voltage select */
H A Dste-hrefv60plus-stuib.dts62 /* VMMCI level-shifter enable */
67 /* VMMCI level-shifter voltage select */
H A Dste-snowball.dts546 /* VMMCI level-shifter enable */
551 /* VMMCI level-shifter voltage select */
/openbmc/u-boot/board/synopsys/iot_devkit/
H A Dconfig.mk1 …_CPPFLAGS += -mlittle-endian -mcode-density -mdiv-rem -mswap -mnorm -mmpy-option=6 -mbarrel-shifter
/openbmc/linux/drivers/net/ethernet/mellanox/mlx5/core/steering/
H A Ddr_ste_v1.h26 void dr_ste_v1_set_action_set(u8 *d_action, u8 hw_field, u8 shifter,
28 void dr_ste_v1_set_action_add(u8 *d_action, u8 hw_field, u8 shifter,
H A Ddr_ste.h179 u8 shifter,
184 u8 shifter,
/openbmc/linux/Documentation/devicetree/bindings/display/ti/
H A Dti,tpd12s015.txt1 TPD12S015 HDMI level shifter and ESD protection chip
H A Dti,omap-dss.txt88 shifter). The video pipelines for the connectors are formed as follows:
/openbmc/linux/arch/arm64/boot/dts/xilinx/
H A Dzynqmp-sck-kv-g-revA.dtso8 * SD level shifter:
131 * SD 3.0 requires level shifter and this property
132 * should be removed if the board has level shifter and
H A Dzynqmp-sck-kv-g-revB.dtso111 * SD 3.0 requires level shifter and this property
112 * should be removed if the board has level shifter and
/openbmc/linux/arch/microblaze/
H A DKconfig.platform19 on MicroBlaze systems without a barrel shifter.
/openbmc/u-boot/doc/device-tree-bindings/exynos/
H A Ddwmmc.txt36 . The above 3 values are used by the clock phase shifter.
/openbmc/linux/arch/arm/boot/dts/nxp/imx/
H A Dimx6q-logicpd.dts109 regulator-always-on; /* Without this, the level shifter on HDMI doesn't turn on */
/openbmc/linux/Documentation/devicetree/bindings/pinctrl/
H A Dmediatek,mt8183-pinctrl.yaml170 An integer describing the steps for output level shifter duty
177 An integer describing the steps for input level shifter duty cycle
H A Dmediatek,mt8365-pinctrl.yaml178 An integer describing the steps for output level shifter duty
185 An integer describing the steps for input level shifter duty cycle
H A Dmediatek,mt7622-pinctrl.yaml325 An integer describing the steps for output level shifter duty
332 An integer describing the steps for input level shifter duty cycle
/openbmc/linux/drivers/video/fbdev/omap2/omapfb/displays/
H A DKconfig17 tristate "TPD12S015 HDMI ESD protection and level shifter"
/openbmc/linux/Documentation/translations/zh_CN/maintainer/
H A Dpull-requests.rst91 was a need for a new set of relativity shifter drivers to
/openbmc/linux/drivers/pinctrl/bcm/
H A Dpinctrl-bcm2835.c1085 u32 shifter; in bcm2711_pull_config_set() local
1090 shifter = PUD_2711_REG_SHIFT(pin); in bcm2711_pull_config_set()
1093 value &= ~(PUD_2711_MASK << shifter); in bcm2711_pull_config_set()
1094 value |= (arg << shifter); in bcm2711_pull_config_set()
/openbmc/u-boot/arch/arm/dts/
H A Dzynqmp-zc1751-xm015-dc1.dts154 /* SD1 with level shifter */
H A Dzynqmp-zcu104-revC.dts224 /* SD1 with level shifter */
/openbmc/linux/arch/arm/boot/dts/ti/omap/
H A Dam335x-bonegreen-wireless.dts115 /* On the BBGW this pin is routed through the level shifter (U21) that */
/openbmc/linux/Documentation/devicetree/bindings/mmc/
H A Dmmc-controller.yaml307 Supply for the bus IO line power, such as a level shifter.
308 If the level shifter is controlled by a GPIO line, this shall
310 switching the level shifter on/off.
/openbmc/linux/Documentation/admin-guide/media/
H A Dcec.rst227 level-shifter that is powered off when the HPD signal is low, thus
229 the level-shifter will prevent this from functioning.
337 be connected via the level shifter to these pins: GPIO 23 and GPIO 12.
339 level shifter to these pins: GPIO 25 and GPIO 22. Monitoring the HPD and

123