| /openbmc/qemu/hw/sd/ |
| H A D | aspeed_sdhci.c | 41 AspeedSDHCIState *sdhci = opaque; in aspeed_sdhci_read() local
45 val = extract64(sdhci->slots[0].capareg, 0, 32); in aspeed_sdhci_read()
48 val = extract64(sdhci->slots[0].capareg, 32, 32); in aspeed_sdhci_read()
51 val = extract64(sdhci->slots[0].maxcurr, 0, 32); in aspeed_sdhci_read()
54 val = extract64(sdhci->slots[1].capareg, 0, 32); in aspeed_sdhci_read()
57 val = extract64(sdhci->slots[1].capareg, 32, 32); in aspeed_sdhci_read()
60 val = extract64(sdhci->slots[1].maxcurr, 0, 32); in aspeed_sdhci_read()
64 val = sdhci->regs[TO_REG(addr)]; in aspeed_sdhci_read()
80 AspeedSDHCIState *sdhci = opaque; in aspeed_sdhci_write() local
87 sdhci->regs[TO_REG(addr)] = (uint32_t)val & ~ASPEED_SDHCI_INFO_RESET; in aspeed_sdhci_write()
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| H A D | npcm7xx_sdhci.c | 104 SysBusDevice *sbd_sdhci = SYS_BUS_DEVICE(&s->sdhci); in npcm7xx_sdhci_realize()
133 device_cold_reset(DEVICE(&s->sdhci)); in npcm7xx_sdhci_reset()
136 s->sdhci.prnsts = NPCM7XX_PRSNTS_RESET; in npcm7xx_sdhci_reset()
137 s->sdhci.blkgap = NPCM7XX_BLKGAP_RESET; in npcm7xx_sdhci_reset()
138 s->sdhci.capareg = NPCM7XX_CAPAB_RESET; in npcm7xx_sdhci_reset()
139 s->sdhci.maxcurr = NPCM7XX_MAXCURR_RESET; in npcm7xx_sdhci_reset()
140 s->sdhci.version = NPCM7XX_HCVER_RESET; in npcm7xx_sdhci_reset()
166 object_initialize_child(OBJECT(s), TYPE_SYSBUS_SDHCI, &s->sdhci, in npcm7xx_sdhci_instance_init()
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| /openbmc/linux/drivers/mmc/host/ |
| H A D | Makefile | 13 obj-$(CONFIG_MMC_SDHCI) += sdhci.o
14 obj-$(CONFIG_MMC_SDHCI_PCI) += sdhci-pci.o
15 sdhci-pci-y += sdhci-pci-core.o sdhci-pci-o2micro.o sdhci-pci-arasan.o \
16 sdhci-pci-dwc-mshc.o sdhci-pci-gli.o
17 obj-$(CONFIG_MMC_SDHCI_ACPI) += sdhci-acpi.o
18 obj-$(CONFIG_MMC_SDHCI_PXAV3) += sdhci-pxav3.o
19 obj-$(CONFIG_MMC_SDHCI_PXAV2) += sdhci-pxav2.o
20 obj-$(CONFIG_MMC_SDHCI_S3C) += sdhci-s3c.o
22 obj-$(CONFIG_MMC_SDHCI_MILBEAUT) += sdhci-milbeaut.o
23 obj-$(CONFIG_MMC_SDHCI_SPEAR) += sdhci-spear.o
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| H A D | sdhci-spear.c | 46 struct spear_sdhci *sdhci; in sdhci_probe() local
51 host = sdhci_alloc_host(dev, sizeof(*sdhci)); in sdhci_probe()
74 sdhci = sdhci_priv(host); in sdhci_probe()
77 sdhci->clk = devm_clk_get(&pdev->dev, NULL); in sdhci_probe()
78 if (IS_ERR(sdhci->clk)) { in sdhci_probe()
79 ret = PTR_ERR(sdhci->clk); in sdhci_probe()
84 ret = clk_prepare_enable(sdhci->clk); in sdhci_probe()
90 ret = clk_set_rate(sdhci->clk, 50000000); in sdhci_probe()
93 clk_get_rate(sdhci->clk)); in sdhci_probe()
112 clk_disable_unprepare(sdhci->clk); in sdhci_probe()
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| H A D | sdhci-of-aspeed.c | 112 struct aspeed_sdhci *sdhci, in aspeed_sdc_configure_8bit_mode() argument
121 info |= sdhci->width_mask; in aspeed_sdc_configure_8bit_mode()
123 info &= ~sdhci->width_mask; in aspeed_sdc_configure_8bit_mode()
217 struct aspeed_sdhci *sdhci; in aspeed_sdhci_configure_phase() local
221 sdhci = sdhci_pltfm_priv(sdhci_priv(host)); in aspeed_sdhci_configure_phase()
223 if (!sdhci->phase_desc) in aspeed_sdhci_configure_phase()
226 params = &sdhci->phase_map.phase[host->timing]; in aspeed_sdhci_configure_phase()
228 aspeed_sdc_set_phase_taps(sdhci->parent, sdhci->phase_desc, taps); in aspeed_sdhci_configure_phase()
240 struct aspeed_sdhci *sdhci; in aspeed_sdhci_set_clock() local
245 sdhci = sdhci_pltfm_priv(pltfm_host); in aspeed_sdhci_set_clock()
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| /openbmc/qemu/tests/qtest/libqos/ |
| H A D | sdhci.c | 40 QSDHCI_MemoryMapped *smm = container_of(s, QSDHCI_MemoryMapped, sdhci); in sdhci_mm_readw()
46 QSDHCI_MemoryMapped *smm = container_of(s, QSDHCI_MemoryMapped, sdhci); in sdhci_mm_readq()
52 QSDHCI_MemoryMapped *smm = container_of(s, QSDHCI_MemoryMapped, sdhci); in sdhci_mm_writeq()
60 return &smm->sdhci; in sdhci_mm_get_driver()
66 void qos_init_sdhci_mm(QSDHCI_MemoryMapped *sdhci, QTestState *qts, in qos_init_sdhci_mm() argument
69 sdhci->obj.get_driver = sdhci_mm_get_driver; in qos_init_sdhci_mm()
70 sdhci->sdhci.readw = sdhci_mm_readw; in qos_init_sdhci_mm()
71 sdhci->sdhci.readq = sdhci_mm_readq; in qos_init_sdhci_mm()
72 sdhci->sdhci.writeq = sdhci_mm_writeq; in qos_init_sdhci_mm()
73 memcpy(&sdhci->sdhci.props, common, sizeof(QSDHCIProperties)); in qos_init_sdhci_mm()
[all …]
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| H A D | sdhci.h | 51 QSDHCI sdhci; member
59 QSDHCI sdhci; member
67 void qos_init_sdhci_mm(QSDHCI_MemoryMapped *sdhci, QTestState *qts,
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| /openbmc/qemu/docs/devel/testing/ |
| H A D | qgraph.rst | 11 For example, the sdhci device is supported on both x86_64 and ARM boards,
12 therefore a generic sdhci test should test all machines and drivers that
28 Following the above example, an interface would be ``sdhci``,
29 so the sdhci-test should only care of linking its qgraph node with
30 that interface. In this way, if the command line of a sdhci driver
46 - **QNODE_DRIVER**: for example ``generic-sdhci``
47 - **QNODE_INTERFACE**: for example ``sdhci`` (interface for all ``-sdhci``
54 - **QNODE_TEST**: for example ``sdhci-test``. A test consumes an interface
213 Here we continue the ``sdhci`` use case, with the following scenario:
215 - ``sdhci-test`` aims to test the ``read[q,w], writeq`` functions
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| /openbmc/linux/Documentation/devicetree/bindings/mmc/ |
| H A D | sdhci-atmel.txt | 5 sdhci-of-at91 driver.
8 - compatible: Must be "atmel,sama5d2-sdhci" or "microchip,sam9x60-sdhci"
9 or "microchip,sam9x7-sdhci", "microchip,sam9x60-sdhci".
12 "atmel,sama5d2-sdhci".
13 Must be "hclock", "multclk" for "microchip,sam9x60-sdhci".
14 Must be "hclock", "multclk" for "microchip,sam9x7-sdhci".
28 compatible = "atmel,sama5d2-sdhci";
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| H A D | sdhci.txt | 7 - sdhci-caps-mask: The sdhci capabilities register is incorrect. This 64bit
8 property corresponds to the bits in the sdhci capability register. If the bit
10 turned off, before applying sdhci-caps.
11 - sdhci-caps: The sdhci capabilities register is incorrect. This 64bit
12 property corresponds to the bits in the sdhci capability register. If the
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| H A D | sdhci-omap.txt | 8 - compatible: Should be "ti,omap2430-sdhci" for omap2430 controllers
9 Should be "ti,omap3-sdhci" for omap3 controllers
10 Should be "ti,omap4-sdhci" for omap4 and ti81 controllers
11 Should be "ti,omap5-sdhci" for omap5 controllers
12 Should be "ti,dra7-sdhci" for DRA7 and DRA72 controllers
13 Should be "ti,k2g-sdhci" for K2G
14 Should be "ti,am335-sdhci" for am335x controllers
15 Should be "ti,am437-sdhci" for am437x controllers
36 compatible = "ti,dra7-sdhci";
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| H A D | sdhci-st.txt | 1 * STMicroelectronics sdhci-st MMC/SD controller
5 used by the sdhci-st driver.
8 - compatible: Must be "st,sdhci" and it can be compatible to "st,sdhci-stih407"
64 mmc0: sdhci@fe81e000 {
65 compatible = "st,sdhci";
77 mmc1: sdhci@9080000 {
78 compatible = "st,sdhci-stih407", "st,sdhci";
93 mmc0: sdhci@9060000 {
94 compatible = "st,sdhci-stih407", "st,sdhci";
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| H A D | sdhci-spear.txt | 4 and the properties used by the sdhci-spear driver.
7 - compatible: "st,spear300-sdhci"
14 sdhci@fc000000 {
15 compatible = "st,spear300-sdhci";
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| H A D | microchip,sdhci-pic32.txt | 4 and the properties used by the sdhci-pic32 driver.
7 - compatible: Should be "microchip,pic32mzda-sdhci"
19 sdhci@1f8ec000 {
20 compatible = "microchip,pic32mzda-sdhci";
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| H A D | sdhci-milbeaut.txt | 7 - compatible: "socionext,milbeaut-m10v-sdhci-3.0"
12 "iface" - clock used for sdhci interface
13 "core" - core clock for sdhci controller
21 compatible = "socionext,milbeaut-m10v-sdhci-3.0";
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| H A D | fsl-esdhc.txt | 7 by mmc.txt and the properties used by the sdhci-esdhc driver.
28 - sdhci,wp-inverted : specifies that eSDHC controller reports
31 - sdhci,1-bit-only : specifies that a controller can only handle
34 - sdhci,auto-cmd12: specifies that a controller can only handle auto
44 sdhci@2e000 {
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| /openbmc/u-boot/arch/arm/dts/ |
| H A D | exynos4.dtsi | 140 sdhci0: sdhci@12510000 {
143 compatible = "samsung,exynos4412-sdhci";
150 sdhci1: sdhci@12520000 {
153 compatible = "samsung,exynos4412-sdhci";
160 sdhci2: sdhci@12530000 {
163 compatible = "samsung,exynos4412-sdhci";
170 sdhci3: sdhci@12540000 {
173 compatible = "samsung,exynos4412-sdhci";
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| H A D | tegra30-tamonten.dtsi | 21 mmc0 = "/sdhci@78000600";
22 mmc1 = "/sdhci@78000400";
23 mmc2 = "/sdhci@78000000";
57 sdhci@78000400 {
64 sdhci@78000600 {
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| H A D | tegra210-e2220-1170.dts | 15 mmc0 = "/sdhci@700b0600";
16 mmc1 = "/sdhci@700b0000";
24 sdhci@700b0000 {
31 sdhci@700b0600 {
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| H A D | tegra210-p2371-0000.dts | 15 mmc0 = "/sdhci@700b0600";
16 mmc1 = "/sdhci@700b0000";
24 sdhci@700b0000 {
31 sdhci@700b0600 {
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| H A D | tegra186-p2771-0000.dtsi | 12 mmc0 = "/sdhci@3460000";
13 mmc1 = "/sdhci@3400000";
49 sdhci@3400000 {
55 sdhci@3460000 {
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| H A D | tegra114-dalmore.dts | 19 mmc0 = "/sdhci@78000600";
20 mmc1 = "/sdhci@78000400";
60 sdhci@78000400 {
66 sdhci@78000600 {
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| H A D | tegra210-p2571.dts | 20 mmc0 = "/sdhci@700b0600";
21 mmc1 = "/sdhci@700b0000";
77 sdhci@700b0000 {
84 sdhci@700b0600 {
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| H A D | tegra210-p2371-2180.dts | 15 mmc0 = "/sdhci@700b0600";
16 mmc1 = "/sdhci@700b0000";
74 sdhci@700b0000 {
82 sdhci@700b0600 {
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| /openbmc/u-boot/board/broadcom/bcmstb/ |
| H A D | bcmstb.c | 87 char sdhci[16] = { 0 }; in bcmstb_sdhci_address() local
103 sprintf(sdhci, "sdhci%d", alias_index); in bcmstb_sdhci_address()
104 path = fdt_getprop(fdt, node, sdhci, NULL); in bcmstb_sdhci_address()
106 printf("%s: Failed to find alias for %s\n", __func__, sdhci); in bcmstb_sdhci_address()
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