| /openbmc/u-boot/drivers/video/rockchip/ |
| H A D | rk_mipi.c | 207 u32 refclk = priv->ref_clk; in rk_mipi_phy_enable() local
208 u32 remain = refclk; in rk_mipi_phy_enable()
261 max_prediv = (refclk / (5 * MHz)); in rk_mipi_phy_enable()
262 min_prediv = ((refclk / (40 * MHz)) ? (refclk / (40 * MHz) + 1) : 1); in rk_mipi_phy_enable()
274 if ((ddr_clk * i % refclk < remain) && in rk_mipi_phy_enable()
275 (ddr_clk * i / refclk) < max_fbdiv) { in rk_mipi_phy_enable()
277 remain = ddr_clk * i % refclk; in rk_mipi_phy_enable()
280 fbdiv = ddr_clk * prediv / refclk; in rk_mipi_phy_enable()
281 ddr_clk = refclk * fbdiv / prediv; in rk_mipi_phy_enable()
285 __func__, refclk, prediv, fbdiv, ddr_clk); in rk_mipi_phy_enable()
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| /openbmc/qemu/hw/timer/ |
| H A D | armv7m_systick.c | 42 ptimer_set_period_from_clock(s->ptimer, s->refclk, 1); in systick_set_period_from_clock()
101 if (!clock_has_source(s->refclk)) { in systick_read()
105 val = clock_ns_to_ticks(s->refclk, 10 * SCALE_MS) - 1; in systick_read()
107 if (clock_ticks_to_ns(s->refclk, val + 1) != 10 * SCALE_MS) { in systick_read()
142 if (!clock_has_source(s->refclk)) { in systick_write()
206 if (!clock_has_source(s->refclk)) { in systick_reset()
239 ptimer_set_period_from_clock(s->ptimer, s->refclk, 1); in systick_refclk_update()
252 s->refclk = qdev_init_clock_in(DEVICE(obj), "refclk", in systick_instance_init()
279 VMSTATE_CLOCK(refclk, SysTickState),
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| /openbmc/qemu/hw/arm/ |
| H A D | stm32f100_soc.c | 63 s->refclk = qdev_init_clock_in(DEVICE(s), "refclk", NULL, NULL, 0); in stm32f100_soc_initfn()
80 if (clock_has_source(s->refclk)) { in stm32f100_soc_realize()
96 clock_set_mul_div(s->refclk, 8, 1); in stm32f100_soc_realize()
97 clock_set_source(s->refclk, s->sysclk); in stm32f100_soc_realize()
122 qdev_connect_clock_in(armv7m, "refclk", s->refclk); in stm32f100_soc_realize()
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| H A D | msf2-soc.c | 79 s->refclk = qdev_init_clock_in(DEVICE(obj), "refclk", NULL, NULL, 0); in m2sxxx_soc_initfn()
101 if (clock_has_source(s->refclk)) { in m2sxxx_soc_realize()
114 clock_set_mul_div(s->refclk, 32, 1); in m2sxxx_soc_realize()
115 clock_set_source(s->refclk, s->m3clk); in m2sxxx_soc_realize()
140 qdev_connect_clock_in(armv7m, "refclk", s->refclk); in m2sxxx_soc_realize()
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| H A D | stm32f205_soc.c | 80 s->refclk = qdev_init_clock_in(DEVICE(s), "refclk", NULL, NULL, 0); in stm32f205_soc_initfn()
97 if (clock_has_source(s->refclk)) { in stm32f205_soc_realize()
113 clock_set_mul_div(s->refclk, 8, 1); in stm32f205_soc_realize()
114 clock_set_source(s->refclk, s->sysclk); in stm32f205_soc_realize()
134 qdev_connect_clock_in(armv7m, "refclk", s->refclk); in stm32f205_soc_realize()
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| H A D | stm32f405_soc.c | 88 s->refclk = qdev_init_clock_in(DEVICE(s), "refclk", NULL, NULL, 0); in stm32f405_soc_initfn()
105 if (clock_has_source(s->refclk)) { in stm32f405_soc_realize()
121 clock_set_mul_div(s->refclk, 8, 1); in stm32f405_soc_realize()
122 clock_set_source(s->refclk, s->sysclk); in stm32f405_soc_realize()
159 qdev_connect_clock_in(armv7m, "refclk", s->refclk); in stm32f405_soc_realize()
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| H A D | armv7m.c | 276 s->refclk = qdev_init_clock_in(DEVICE(obj), "refclk", NULL, NULL, 0); in armv7m_instance_init()
463 if (clock_has_source(s->refclk)) { in armv7m_realize()
465 s->refclk); in armv7m_realize()
483 if (clock_has_source(s->refclk)) { in armv7m_realize()
485 s->refclk); in armv7m_realize()
574 VMSTATE_CLOCK(refclk, ARMv7MState),
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| H A D | mps2.c | 91 Clock *refclk; member
156 mms->refclk = clock_new(OBJECT(machine), "REFCLK"); in mps2_common_init()
157 clock_set_hz(mms->refclk, REFCLK_FRQ); in mps2_common_init()
241 qdev_connect_clock_in(armv7m, "refclk", mms->refclk); in mps2_common_init()
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| /openbmc/u-boot/arch/arm/dts/ |
| H A D | keystone-k2hk-evm.dts | 25 clock-output-names = "refclk-sys";
32 clock-output-names = "refclk-pass";
39 clock-output-names = "refclk-arm";
46 clock-output-names = "refclk-ddr3a";
53 clock-output-names = "refclk-ddr3b";
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| H A D | keystone-k2e-evm.dts | 26 clock-output-names = "refclk-sys";
33 clock-output-names = "refclk-pass";
40 clock-output-names = "refclk-ddr3a";
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| H A D | armada-xp.dtsi | 173 clocks = <&coreclk 2>, <&refclk>;
179 clocks = <&coreclk 2>, <&refclk>;
264 refclk: oscillator { label
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| /openbmc/qemu/hw/char/ |
| H A D | cadence_uart.c | 178 input_clk = clock_get_hz(s->refclk); in uart_parameters_setup()
242 if (!clock_is_enabled(s->refclk) || device_is_in_reset(DEVICE(s))) { in uart_can_receive()
380 if (!clock_is_enabled(s->refclk) || device_is_in_reset(DEVICE(s))) { in uart_event()
419 if (!clock_is_enabled(s->refclk) || device_is_in_reset(DEVICE(s))) { in uart_write()
488 if (!clock_is_enabled(s->refclk) || device_is_in_reset(DEVICE(s))) { in uart_read()
566 s->refclk = qdev_init_clock_in(DEVICE(obj), "refclk", in cadence_uart_init()
569 clock_set_hz(s->refclk, UART_DEFAULT_REF_CLK); in cadence_uart_init()
579 clock_set_hz(s->refclk, UART_DEFAULT_REF_CLK); in cadence_uart_pre_load()
615 VMSTATE_CLOCK_V(refclk, CadenceUARTState, 3),
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| /openbmc/u-boot/drivers/clk/ |
| H A D | clk_stm32mp1.c | 401 u8 refclk[REFCLK_SIZE]; member
477 .refclk[0] = (p1), \
478 .refclk[1] = (p2), \
479 .refclk[2] = (p3), \
480 .refclk[3] = (p4), \
840 ulong refclk; in pll_get_fref_ck() local
846 refclk = stm32mp1_clk_get_fixed(priv, pll[pll_id].refclk[src]); in pll_get_fref_ck()
848 pll_id, selr, (u32)(refclk / 1000)); in pll_get_fref_ck()
850 return refclk; in pll_get_fref_ck()
864 ulong refclk, fvco; in pll_get_fvco() local
[all …]
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| /openbmc/qemu/include/hw/timer/ |
| H A D | armv7m_systick.h | 46 Clock *refclk; member
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| /openbmc/u-boot/arch/arm/cpu/armv7/bcm235xx/ |
| H A D | clk-core.h | 73 struct refclk *refclk_str_to_clk(const char *name);
409 struct refclk { struct
460 static inline struct refclk *to_refclk(struct clk *clock) in to_refclk()
462 return container_of(clock, struct refclk, clk); in to_refclk()
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| H A D | clk-bcm235xx.c | 24 static struct refclk clk_name = { \
52 struct refclk *procclk;
68 struct refclk *refclk_str_to_clk(const char *name) in refclk_str_to_clk()
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| /openbmc/u-boot/arch/arm/cpu/armv7/bcm281xx/ |
| H A D | clk-core.h | 73 struct refclk *refclk_str_to_clk(const char *name);
409 struct refclk { struct
460 static inline struct refclk *to_refclk(struct clk *clock) in to_refclk()
462 return container_of(clock, struct refclk, clk); in to_refclk()
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| H A D | clk-bcm281xx.c | 24 static struct refclk clk_name = { \
52 struct refclk *procclk;
68 struct refclk *refclk_str_to_clk(const char *name) in refclk_str_to_clk()
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| /openbmc/qemu/include/hw/arm/ |
| H A D | stm32f100_soc.h | 58 Clock *refclk; member
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| H A D | msf2-soc.h | 59 Clock *refclk; member
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| H A D | stm32f205_soc.h | 69 Clock *refclk; member
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| H A D | stm32f405_soc.h | 74 Clock *refclk; member
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| H A D | armv7m.h | 95 Clock *refclk; member
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| /openbmc/qemu/include/hw/char/ |
| H A D | cadence_uart.h | 53 Clock *refclk; member
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| /openbmc/u-boot/arch/arm/mach-imx/mx5/ |
| H A D | clock.c | 163 uint64_t refclk, temp; in decode_pll() local
194 refclk = infreq * 2; in decode_pll()
196 refclk *= 2; in decode_pll()
198 do_div(refclk, pdf + 1); in decode_pll()
199 temp = refclk * mfn_abs; in decode_pll()
201 ret = refclk * mfi; in decode_pll()
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