1*f0a3f349SLokesh Vutla/*
2*f0a3f349SLokesh Vutla * Copyright 2013-2014 Texas Instruments, Inc.
3*f0a3f349SLokesh Vutla *
4*f0a3f349SLokesh Vutla * Keystone 2 Kepler/Hawking EVM device tree
5*f0a3f349SLokesh Vutla *
6*f0a3f349SLokesh Vutla * This program is free software; you can redistribute it and/or modify
7*f0a3f349SLokesh Vutla * it under the terms of the GNU General Public License version 2 as
8*f0a3f349SLokesh Vutla * published by the Free Software Foundation.
9*f0a3f349SLokesh Vutla */
10*f0a3f349SLokesh Vutla/dts-v1/;
11*f0a3f349SLokesh Vutla
12*f0a3f349SLokesh Vutla#include "keystone.dtsi"
13*f0a3f349SLokesh Vutla#include "keystone-k2hk.dtsi"
14*f0a3f349SLokesh Vutla
15*f0a3f349SLokesh Vutla/ {
16*f0a3f349SLokesh Vutla	compatible =  "ti,k2hk-evm","ti,keystone";
17*f0a3f349SLokesh Vutla	model = "Texas Instruments Keystone 2 Kepler/Hawking EVM";
18*f0a3f349SLokesh Vutla
19*f0a3f349SLokesh Vutla	soc {
20*f0a3f349SLokesh Vutla		clocks {
21*f0a3f349SLokesh Vutla			refclksys: refclksys {
22*f0a3f349SLokesh Vutla				#clock-cells = <0>;
23*f0a3f349SLokesh Vutla				compatible = "fixed-clock";
24*f0a3f349SLokesh Vutla				clock-frequency = <122880000>;
25*f0a3f349SLokesh Vutla				clock-output-names = "refclk-sys";
26*f0a3f349SLokesh Vutla			};
27*f0a3f349SLokesh Vutla
28*f0a3f349SLokesh Vutla			refclkpass: refclkpass {
29*f0a3f349SLokesh Vutla				#clock-cells = <0>;
30*f0a3f349SLokesh Vutla				compatible = "fixed-clock";
31*f0a3f349SLokesh Vutla				clock-frequency = <122880000>;
32*f0a3f349SLokesh Vutla				clock-output-names = "refclk-pass";
33*f0a3f349SLokesh Vutla			};
34*f0a3f349SLokesh Vutla
35*f0a3f349SLokesh Vutla			refclkarm: refclkarm {
36*f0a3f349SLokesh Vutla				#clock-cells = <0>;
37*f0a3f349SLokesh Vutla				compatible = "fixed-clock";
38*f0a3f349SLokesh Vutla				clock-frequency = <125000000>;
39*f0a3f349SLokesh Vutla				clock-output-names = "refclk-arm";
40*f0a3f349SLokesh Vutla			};
41*f0a3f349SLokesh Vutla
42*f0a3f349SLokesh Vutla			refclkddr3a: refclkddr3a {
43*f0a3f349SLokesh Vutla				#clock-cells = <0>;
44*f0a3f349SLokesh Vutla				compatible = "fixed-clock";
45*f0a3f349SLokesh Vutla				clock-frequency = <100000000>;
46*f0a3f349SLokesh Vutla				clock-output-names = "refclk-ddr3a";
47*f0a3f349SLokesh Vutla			};
48*f0a3f349SLokesh Vutla
49*f0a3f349SLokesh Vutla			refclkddr3b: refclkddr3b {
50*f0a3f349SLokesh Vutla				#clock-cells = <0>;
51*f0a3f349SLokesh Vutla				compatible = "fixed-clock";
52*f0a3f349SLokesh Vutla				clock-frequency = <100000000>;
53*f0a3f349SLokesh Vutla				clock-output-names = "refclk-ddr3b";
54*f0a3f349SLokesh Vutla			};
55*f0a3f349SLokesh Vutla		};
56*f0a3f349SLokesh Vutla	};
57*f0a3f349SLokesh Vutla
58*f0a3f349SLokesh Vutla	leds {
59*f0a3f349SLokesh Vutla		compatible = "gpio-leds";
60*f0a3f349SLokesh Vutla		debug1_1 {
61*f0a3f349SLokesh Vutla			label = "keystone:green:debug1";
62*f0a3f349SLokesh Vutla			gpios = <&gpio0 12 GPIO_ACTIVE_HIGH>; /* 12 */
63*f0a3f349SLokesh Vutla		};
64*f0a3f349SLokesh Vutla
65*f0a3f349SLokesh Vutla		debug1_2 {
66*f0a3f349SLokesh Vutla			label = "keystone:red:debug1";
67*f0a3f349SLokesh Vutla			gpios = <&gpio0 13 GPIO_ACTIVE_HIGH>; /* 13 */
68*f0a3f349SLokesh Vutla		};
69*f0a3f349SLokesh Vutla
70*f0a3f349SLokesh Vutla		debug2 {
71*f0a3f349SLokesh Vutla			label = "keystone:blue:debug2";
72*f0a3f349SLokesh Vutla			gpios = <&gpio0 14 GPIO_ACTIVE_HIGH>; /* 14 */
73*f0a3f349SLokesh Vutla		};
74*f0a3f349SLokesh Vutla
75*f0a3f349SLokesh Vutla		debug3 {
76*f0a3f349SLokesh Vutla			label = "keystone:blue:debug3";
77*f0a3f349SLokesh Vutla			gpios = <&gpio0 15 GPIO_ACTIVE_HIGH>; /* 15 */
78*f0a3f349SLokesh Vutla		};
79*f0a3f349SLokesh Vutla	};
80*f0a3f349SLokesh Vutla};
81*f0a3f349SLokesh Vutla
82*f0a3f349SLokesh Vutla&usb_phy {
83*f0a3f349SLokesh Vutla	status = "okay";
84*f0a3f349SLokesh Vutla};
85*f0a3f349SLokesh Vutla
86*f0a3f349SLokesh Vutla&usb {
87*f0a3f349SLokesh Vutla	status = "okay";
88*f0a3f349SLokesh Vutla};
89*f0a3f349SLokesh Vutla
90*f0a3f349SLokesh Vutla&aemif {
91*f0a3f349SLokesh Vutla	cs0 {
92*f0a3f349SLokesh Vutla		#address-cells = <2>;
93*f0a3f349SLokesh Vutla		#size-cells = <1>;
94*f0a3f349SLokesh Vutla		clock-ranges;
95*f0a3f349SLokesh Vutla		ranges;
96*f0a3f349SLokesh Vutla
97*f0a3f349SLokesh Vutla		ti,cs-chipselect = <0>;
98*f0a3f349SLokesh Vutla		/* all timings in nanoseconds */
99*f0a3f349SLokesh Vutla		ti,cs-min-turnaround-ns = <12>;
100*f0a3f349SLokesh Vutla		ti,cs-read-hold-ns = <6>;
101*f0a3f349SLokesh Vutla		ti,cs-read-strobe-ns = <23>;
102*f0a3f349SLokesh Vutla		ti,cs-read-setup-ns = <9>;
103*f0a3f349SLokesh Vutla		ti,cs-write-hold-ns = <8>;
104*f0a3f349SLokesh Vutla		ti,cs-write-strobe-ns = <23>;
105*f0a3f349SLokesh Vutla		ti,cs-write-setup-ns = <8>;
106*f0a3f349SLokesh Vutla
107*f0a3f349SLokesh Vutla		nand@0,0 {
108*f0a3f349SLokesh Vutla			compatible = "ti,keystone-nand","ti,davinci-nand";
109*f0a3f349SLokesh Vutla			#address-cells = <1>;
110*f0a3f349SLokesh Vutla			#size-cells = <1>;
111*f0a3f349SLokesh Vutla			reg = <0 0 0x4000000
112*f0a3f349SLokesh Vutla			       1 0 0x0000100>;
113*f0a3f349SLokesh Vutla
114*f0a3f349SLokesh Vutla			ti,davinci-chipselect = <0>;
115*f0a3f349SLokesh Vutla			ti,davinci-mask-ale = <0x2000>;
116*f0a3f349SLokesh Vutla			ti,davinci-mask-cle = <0x4000>;
117*f0a3f349SLokesh Vutla			ti,davinci-mask-chipsel = <0>;
118*f0a3f349SLokesh Vutla			nand-ecc-mode = "hw";
119*f0a3f349SLokesh Vutla			ti,davinci-ecc-bits = <4>;
120*f0a3f349SLokesh Vutla			nand-on-flash-bbt;
121*f0a3f349SLokesh Vutla
122*f0a3f349SLokesh Vutla			partition@0 {
123*f0a3f349SLokesh Vutla				label = "u-boot";
124*f0a3f349SLokesh Vutla				reg = <0x0 0x100000>;
125*f0a3f349SLokesh Vutla				read-only;
126*f0a3f349SLokesh Vutla			};
127*f0a3f349SLokesh Vutla
128*f0a3f349SLokesh Vutla			partition@100000 {
129*f0a3f349SLokesh Vutla				label = "params";
130*f0a3f349SLokesh Vutla				reg = <0x100000 0x80000>;
131*f0a3f349SLokesh Vutla				read-only;
132*f0a3f349SLokesh Vutla			};
133*f0a3f349SLokesh Vutla
134*f0a3f349SLokesh Vutla			partition@180000 {
135*f0a3f349SLokesh Vutla				label = "ubifs";
136*f0a3f349SLokesh Vutla				reg = <0x180000 0x1fe80000>;
137*f0a3f349SLokesh Vutla			};
138*f0a3f349SLokesh Vutla		};
139*f0a3f349SLokesh Vutla	};
140*f0a3f349SLokesh Vutla};
141*f0a3f349SLokesh Vutla
142*f0a3f349SLokesh Vutla&i2c0 {
143*f0a3f349SLokesh Vutla	dtt@50 {
144*f0a3f349SLokesh Vutla		compatible = "at,24c1024";
145*f0a3f349SLokesh Vutla		reg = <0x50>;
146*f0a3f349SLokesh Vutla	};
147*f0a3f349SLokesh Vutla};
148*f0a3f349SLokesh Vutla
149*f0a3f349SLokesh Vutla&spi0 {
150*f0a3f349SLokesh Vutla	status = "okay";
151*f0a3f349SLokesh Vutla	nor_flash: n25q128a11@0 {
152*f0a3f349SLokesh Vutla		#address-cells = <1>;
153*f0a3f349SLokesh Vutla		#size-cells = <1>;
154*f0a3f349SLokesh Vutla		compatible = "Micron,n25q128a11", "spi-flash";
155*f0a3f349SLokesh Vutla		spi-max-frequency = <54000000>;
156*f0a3f349SLokesh Vutla		m25p,fast-read;
157*f0a3f349SLokesh Vutla		reg = <0>;
158*f0a3f349SLokesh Vutla
159*f0a3f349SLokesh Vutla		partition@0 {
160*f0a3f349SLokesh Vutla			label = "u-boot-spl";
161*f0a3f349SLokesh Vutla			reg = <0x0 0x80000>;
162*f0a3f349SLokesh Vutla			read-only;
163*f0a3f349SLokesh Vutla		};
164*f0a3f349SLokesh Vutla
165*f0a3f349SLokesh Vutla		partition@1 {
166*f0a3f349SLokesh Vutla			label = "misc";
167*f0a3f349SLokesh Vutla			reg = <0x80000 0xf80000>;
168*f0a3f349SLokesh Vutla		};
169*f0a3f349SLokesh Vutla	};
170*f0a3f349SLokesh Vutla};
171*f0a3f349SLokesh Vutla
172*f0a3f349SLokesh Vutla&mdio {
173*f0a3f349SLokesh Vutla	status = "ok";
174*f0a3f349SLokesh Vutla	ethphy0: ethernet-phy@0 {
175*f0a3f349SLokesh Vutla		compatible = "marvell,88E1111", "ethernet-phy-ieee802.3-c22";
176*f0a3f349SLokesh Vutla		reg = <0>;
177*f0a3f349SLokesh Vutla	};
178*f0a3f349SLokesh Vutla
179*f0a3f349SLokesh Vutla	ethphy1: ethernet-phy@1 {
180*f0a3f349SLokesh Vutla		compatible = "marvell,88E1111", "ethernet-phy-ieee802.3-c22";
181*f0a3f349SLokesh Vutla		reg = <1>;
182*f0a3f349SLokesh Vutla	};
183*f0a3f349SLokesh Vutla};
184