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Searched refs:out_8 (Results 1 – 25 of 184) sorted by relevance

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/openbmc/u-boot/arch/m68k/cpu/mcf5445x/
H A Dcpu_init.c89 out_8(&gpio->par_fbctl, in cpu_init_f()
93 out_8(&gpio->par_be, in cpu_init_f()
98 out_8(&pm->pmcr0, 17); in cpu_init_f()
101 out_8(&pm->pmcr0, 18); in cpu_init_f()
102 out_8(&pm->pmcr0, 19); in cpu_init_f()
103 out_8(&pm->pmcr0, 20); in cpu_init_f()
106 out_8(&pm->pmcr0, 22); in cpu_init_f()
107 out_8(&pm->pmcr1, 4); in cpu_init_f()
108 out_8(&pm->pmcr1, 7); in cpu_init_f()
111 out_8(&pm->pmcr0, 28); in cpu_init_f()
[all …]
/openbmc/linux/arch/powerpc/platforms/embedded6xx/
H A Dls_uart.c41 out_8(avr_addr + UART_TX, string[i]); in wd_stop()
67 out_8(avr_addr + UART_LCR, cval); /* initialise UART */ in avr_uart_configure()
68 out_8(avr_addr + UART_MCR, 0); in avr_uart_configure()
69 out_8(avr_addr + UART_IER, 0); in avr_uart_configure()
73 out_8(avr_addr + UART_LCR, cval); /* Set character format */ in avr_uart_configure()
75 out_8(avr_addr + UART_LCR, cval | UART_LCR_DLAB); /* set DLAB */ in avr_uart_configure()
76 out_8(avr_addr + UART_DLL, quot & 0xff); /* LS of divisor */ in avr_uart_configure()
77 out_8(avr_addr + UART_DLM, quot >> 8); /* MS of divisor */ in avr_uart_configure()
78 out_8(avr_addr + UART_LCR, cval); /* reset DLAB */ in avr_uart_configure()
79 out_8(avr_addr + UART_FCR, UART_FCR_ENABLE_FIFO); /* enable FIFO */ in avr_uart_configure()
[all …]
/openbmc/u-boot/arch/m68k/cpu/mcf530x/
H A Dcpu_init.c108 out_8(&sim->sypcr, 0x00); in cpu_init_f()
109 out_8(&sim->swivr, 0x0f); in cpu_init_f()
110 out_8(&sim->swsr, 0x00); in cpu_init_f()
111 out_8(&sim->mpark, 0x00); in cpu_init_f()
118 out_8(&icr->icr0, 0x00); /* sw watchdog */ in cpu_init_f()
119 out_8(&icr->icr1, 0x00); /* timer 1 */ in cpu_init_f()
120 out_8(&icr->icr2, 0x88); /* timer 2 */ in cpu_init_f()
121 out_8(&icr->icr3, 0x00); /* i2c */ in cpu_init_f()
122 out_8(&icr->icr4, 0x00); /* uart 0 */ in cpu_init_f()
123 out_8(&icr->icr5, 0x00); /* uart 1 */ in cpu_init_f()
[all …]
/openbmc/linux/drivers/i2c/busses/
H A Di2c-ibm_iic.c127 out_8(&dev->vaddr->intmsk, enable ? INTRMSK_EIMTC : 0); in iic_interrupt_mode()
140 out_8(&iic->lmadr, 0); in iic_dev_init()
141 out_8(&iic->hmadr, 0); in iic_dev_init()
144 out_8(&iic->lsadr, 0); in iic_dev_init()
145 out_8(&iic->hsadr, 0); in iic_dev_init()
148 out_8(&iic->sts, STS_SCMP | STS_IRQA); in iic_dev_init()
149 out_8(&iic->extsts, EXTSTS_IRQP | EXTSTS_IRQD | EXTSTS_LA in iic_dev_init()
153 out_8(&iic->clkdiv, dev->clckdiv); in iic_dev_init()
156 out_8(&iic->xfrcnt, 0); in iic_dev_init()
159 out_8(&iic->xtcntlss, XTCNTLSS_SRC | XTCNTLSS_SRS | XTCNTLSS_SWC in iic_dev_init()
[all …]
H A Di2c-cpm.c129 out_8(&i2c_reg->i2cer, i); in cpm_i2c_interrupt()
147 out_8(&i2c_ram->tfcr, I2C_EB); in cpm_reset_i2c_params()
148 out_8(&i2c_ram->rfcr, I2C_EB); in cpm_reset_i2c_params()
150 out_8(&i2c_ram->tfcr, I2C_EB_CPM2); in cpm_reset_i2c_params()
151 out_8(&i2c_ram->rfcr, I2C_EB_CPM2); in cpm_reset_i2c_params()
177 out_8(&i2c_reg->i2cmr, 0x00); /* Disable all interrupts */ in cpm_i2c_force_close()
178 out_8(&i2c_reg->i2cer, 0xff); in cpm_i2c_force_close()
324 out_8(&cpm->i2c_reg->i2com, I2COM_MASTER); in cpm_i2c_xfer()
338 out_8(&i2c_reg->i2cmr, I2CER_TXE | I2CER_TXB | I2CER_RXB); in cpm_i2c_xfer()
339 out_8(&i2c_reg->i2cer, 0xff); /* Clear interrupt status */ in cpm_i2c_xfer()
[all …]
/openbmc/linux/drivers/macintosh/
H A Dmacio-adb.c116 out_8(&adb->ctrl.r, 0); in macio_init()
117 out_8(&adb->intr.r, 0); in macio_init()
118 out_8(&adb->error.r, 0); in macio_init()
119 out_8(&adb->active_hi.r, 0xff); /* for now, set all devices active */ in macio_init()
120 out_8(&adb->active_lo.r, 0xff); in macio_init()
121 out_8(&adb->autopoll.r, APE); in macio_init()
129 out_8(&adb->intr_enb.r, DFB | TAG); in macio_init()
141 out_8(&adb->active_hi.r, devs >> 8); in macio_adb_autopoll()
142 out_8(&adb->active_lo.r, devs); in macio_adb_autopoll()
143 out_8(&adb->autopoll.r, devs? APE: 0); in macio_adb_autopoll()
[all …]
H A Dvia-cuda.c111 out_8(&via[B], in_8(&via[B]) | TIP); in assert_TIP()
113 out_8(&via[B], in_8(&via[B]) & ~TIP); in assert_TIP()
120 out_8(&via[B], in_8(&via[B]) | TIP | TACK); in assert_TIP_and_TACK()
122 out_8(&via[B], in_8(&via[B]) & ~(TIP | TACK)); in assert_TIP_and_TACK()
129 out_8(&via[B], in_8(&via[B]) | TACK); in assert_TACK()
131 out_8(&via[B], in_8(&via[B]) & ~TACK); in assert_TACK()
136 out_8(&via[B], in_8(&via[B]) ^ TACK); in toggle_TACK()
143 out_8(&via[B], in_8(&via[B]) & ~TACK); in negate_TACK()
145 out_8(&via[B], in_8(&via[B]) | TACK); in negate_TACK()
152 out_8(&via[B], in_8(&via[B]) & ~(TIP | TACK)); in negate_TIP_and_TACK()
[all …]
/openbmc/linux/drivers/scsi/
H A Dmesh.c359 out_8(&mr->exception, 0xff); /* clear all exception bits */ in mesh_init()
360 out_8(&mr->error, 0xff); /* clear all error bits */ in mesh_init()
361 out_8(&mr->sequence, SEQ_RESETMESH); in mesh_init()
364 out_8(&mr->intr_mask, INT_ERROR | INT_EXCEPTION | INT_CMDDONE); in mesh_init()
365 out_8(&mr->source_id, ms->host->this_id); in mesh_init()
366 out_8(&mr->sel_timeout, 25); /* 250ms */ in mesh_init()
367 out_8(&mr->sync_params, ASYNC_PARAMS); in mesh_init()
373 out_8(&mr->bus_status1, BS1_RST); /* assert RST */ in mesh_init()
376 out_8(&mr->bus_status1, 0); /* negate RST */ in mesh_init()
384 out_8(&mr->interrupt, 0xff); /* clear all interrupt bits */ in mesh_init()
[all …]
/openbmc/linux/drivers/rtc/
H A Drtc-mpc5121.c90 out_8(&regs->second_set, tm->tm_sec); in mpc5121_rtc_update_smh()
91 out_8(&regs->minute_set, tm->tm_min); in mpc5121_rtc_update_smh()
92 out_8(&regs->hour_set, tm->tm_hour); in mpc5121_rtc_update_smh()
95 out_8(&regs->set_time, 0x1); in mpc5121_rtc_update_smh()
96 out_8(&regs->set_time, 0x3); in mpc5121_rtc_update_smh()
97 out_8(&regs->set_time, 0x1); in mpc5121_rtc_update_smh()
98 out_8(&regs->set_time, 0x0); in mpc5121_rtc_update_smh()
180 out_8(&regs->month_set, tm->tm_mon + 1); in mpc5200_rtc_set_time()
181 out_8(&regs->weekday_set, tm->tm_wday ? tm->tm_wday : 7); in mpc5200_rtc_set_time()
182 out_8(&regs->date_set, tm->tm_mday); in mpc5200_rtc_set_time()
[all …]
/openbmc/linux/drivers/video/fbdev/
H A Dhpfb.c121 out_8(fb_regs + TC_NBLANK, (blank ? 0x00 : fb_bitmask)); in hpfb_blank()
132 out_8(fb_regs + TC_FBEN, fb_bitmask); in topcat_blit()
134 out_8(fb_regs + TC_WEN, fb_bitmask); in topcat_blit()
135 out_8(fb_regs + WMRR, rr); in topcat_blit()
143 out_8(fb_regs + WMOVE, fb_bitmask); in topcat_blit()
161 out_8(fb_regs + TC_WEN, fb_bitmask & clr); in hpfb_fillrect()
162 out_8(fb_regs + WMRR, (region->rop == ROP_COPY ? RR_SET : RR_INVERT)); in hpfb_fillrect()
165 out_8(fb_regs + TC_WEN, fb_bitmask & ~clr); in hpfb_fillrect()
166 out_8(fb_regs + WMRR, (region->rop == ROP_COPY ? RR_CLEAR : RR_NOOP)); in hpfb_fillrect()
180 out_8(fb_regs + TC_WEN, fb_bitmask); in hpfb_sync()
[all …]
H A Ddnfb.c142 out_8(AP_CONTROL_3A, 0x0); in dnfb_blank()
144 out_8(AP_CONTROL_3A, 0x1); in dnfb_blank()
169 out_8(AP_CONTROL_0, in dnfb_copyarea()
179 out_8(AP_CONTROL_0, in dnfb_copyarea()
188 out_8(AP_CONTROL_3A, 0xc | (dest >> 16)); in dnfb_copyarea()
196 out_8(AP_WRITE_ENABLE, start_mask); in dnfb_copyarea()
200 out_8(AP_WRITE_ENABLE, 0); in dnfb_copyarea()
208 out_8(AP_WRITE_ENABLE, start_mask); in dnfb_copyarea()
213 out_8(AP_WRITE_ENABLE, start_mask | end_mask); in dnfb_copyarea()
221 out_8(AP_CONTROL_0, NORMAL_MODE); in dnfb_copyarea()
[all …]
H A Dvalkyriefb.c136 out_8(&valkyrie_regs->status.r, 0); in valkyriefb_set_par()
141 out_8(&valkyrie_regs->mode.r, init->mode | 0x80); in valkyriefb_set_par()
142 out_8(&valkyrie_regs->depth.r, par->cmode + 3); in valkyriefb_set_par()
147 out_8(&valkyrie_regs->mode.r, init->mode); in valkyriefb_set_par()
192 out_8(&p->valkyrie_regs->mode.r, init->mode); in valkyriefb_blank()
203 out_8(&p->valkyrie_regs->mode.r, init->mode | 0x40); in valkyriefb_blank()
206 out_8(&p->valkyrie_regs->mode.r, 0x66); in valkyriefb_blank()
227 out_8(&p->cmap_regs->addr, regno); in valkyriefb_setcolreg()
230 out_8(&cmap_regs->lut, red); in valkyriefb_setcolreg()
231 out_8(&cmap_regs->lut, green); in valkyriefb_setcolreg()
[all …]
/openbmc/u-boot/board/freescale/m5253demo/
H A Dm5253demo.c111 out_8(&ata->cr, 0); in ide_set_reset()
120 out_8(&ata->t1, CALC_TIMING(piotms[2][0])); in ide_set_reset()
121 out_8(&ata->t2w, CALC_TIMING(piotms[2][1])); in ide_set_reset()
122 out_8(&ata->t2r, CALC_TIMING(piotms[2][1])); in ide_set_reset()
123 out_8(&ata->ta, CALC_TIMING(piotms[2][8])); in ide_set_reset()
124 out_8(&ata->trd, CALC_TIMING(piotms[2][7])); in ide_set_reset()
125 out_8(&ata->t4, CALC_TIMING(piotms[2][3])); in ide_set_reset()
126 out_8(&ata->t9, CALC_TIMING(piotms[2][6])); in ide_set_reset()
129 out_8(&ata->cr, 0x40); in ide_set_reset()
/openbmc/linux/arch/powerpc/platforms/powermac/
H A Dnvram.c158 out_8(&nvram_data[(addr & (NVRAM_SIZE - 1)) * nvram_mult], val); in direct_nvram_write_byte()
168 out_8(nvram_addr, addr >> 5); in indirect_nvram_read_byte()
180 out_8(nvram_addr, addr >> 5); in indirect_nvram_write_byte()
181 out_8(&nvram_data[(addr & 0x1f) << 4], val); in indirect_nvram_write_byte()
289 out_8(base, SM_FLASH_CMD_ERASE_SETUP); in sm_erase_bank()
290 out_8(base, SM_FLASH_CMD_ERASE_CONFIRM); in sm_erase_bank()
297 out_8(base, SM_FLASH_CMD_READ_STATUS); in sm_erase_bank()
301 out_8(base, SM_FLASH_CMD_CLEAR_STATUS); in sm_erase_bank()
302 out_8(base, SM_FLASH_CMD_RESET); in sm_erase_bank()
321 out_8(base+i, SM_FLASH_CMD_WRITE_SETUP); in sm_write_bank()
[all …]
H A Dudbg_scc.c28 out_8(sccd, c); in udbg_scc_putc()
124 out_8(sccc, 0x09); /* reset A or B side */ in udbg_scc_init()
125 out_8(sccc, 0xc0); in udbg_scc_init()
131 out_8(sccc, 13); in udbg_scc_init()
133 out_8(sccc, 12); in udbg_scc_init()
148 out_8(sccc, scc_inittab[i]); in udbg_scc_init()
/openbmc/linux/drivers/block/
H A Dswim3.c276 out_8(&sw->select, RELAX); in swim3_select()
278 out_8(&sw->control_bis, SELECT); in swim3_select()
280 out_8(&sw->control_bic, SELECT); in swim3_select()
281 out_8(&sw->select, sel & CA_MASK); in swim3_select()
290 out_8(&sw->select, sw->select | LSTRB); in swim3_action()
292 out_8(&sw->select, sw->select & ~LSTRB); in swim3_action()
379 out_8(&sw->intr_enable, SEEN_SECTOR); in scan_track()
380 out_8(&sw->control_bis, DO_ACTION); in scan_track()
400 out_8(&sw->intr_enable, SEEK_DONE); in seek_track()
401 out_8(&sw->control_bis, DO_SEEK); in seek_track()
[all …]
/openbmc/linux/drivers/net/can/mscan/
H A Dmscan.c61 out_8(&regs->cantarq, priv->tx_active); in mscan_set_mode()
63 out_8(&regs->cantier, 0); in mscan_set_mode()
133 out_8(&regs->canrier, 0); in mscan_start()
145 out_8(&regs->canmisc, MSCAN_BOHOLD); in mscan_start()
156 out_8(&regs->cantier, 0); in mscan_start()
159 out_8(&regs->canrier, MSCAN_RX_INTS_ENABLE); in mscan_start()
174 out_8(&regs->canmisc, MSCAN_BOHOLD); in mscan_restart()
176 out_8(&regs->canrier, MSCAN_RX_INTS_ENABLE); in mscan_restart()
197 out_8(&regs->cantier, 0); in mscan_start_xmit()
225 out_8(&regs->cantbsel, i); in mscan_start_xmit()
[all …]
/openbmc/linux/drivers/spi/
H A Dspi-mpc52xx-psc.c123 out_8(&psc->command, MPC52xx_PSC_TX_ENABLE | MPC52xx_PSC_RX_ENABLE); in mpc52xx_psc_spi_transfer_rxtx()
138 out_8(&psc->ircr2, 0x01); in mpc52xx_psc_spi_transfer_rxtx()
141 out_8(&psc->mpc52xx_psc_buffer_8, tx_buf[sb]); in mpc52xx_psc_spi_transfer_rxtx()
143 out_8(&psc->mpc52xx_psc_buffer_8, 0); in mpc52xx_psc_spi_transfer_rxtx()
151 out_8(&psc->command, MPC52xx_PSC_SEL_MODE_REG_1); in mpc52xx_psc_spi_transfer_rxtx()
153 out_8(&psc->mode, 0); in mpc52xx_psc_spi_transfer_rxtx()
155 out_8(&psc->mode, MPC52xx_PSC_MODE_FFULL); in mpc52xx_psc_spi_transfer_rxtx()
173 out_8(&psc->command, MPC52xx_PSC_TX_DISABLE | MPC52xx_PSC_RX_DISABLE); in mpc52xx_psc_spi_transfer_rxtx()
256 out_8(&psc->command, MPC52xx_PSC_RST_RX); in mpc52xx_psc_spi_port_config()
257 out_8(&psc->command, MPC52xx_PSC_RST_TX); in mpc52xx_psc_spi_port_config()
[all …]
/openbmc/u-boot/board/freescale/p1022ds/
H A Ddiu.c172 out_8(&pixis->brdcfg1, temp); in platform_diu_init()
185 out_8(lbc_lcs0_ba, offsetof(ngpixis_t, brdcfg0)); in platform_diu_init()
187 out_8(lbc_lcs1_ba, px_brdcfg0 | PX_BRDCFG0_ELBC_DIU); in platform_diu_init()
224 out_8(lbc_lcs0_ba, offsetof(ngpixis_t, brdcfg0)); in set_mux_to_lbc()
225 out_8(lbc_lcs1_ba, px_brdcfg0); in set_mux_to_lbc()
229 out_8(lbc_lcs0_ba, offsetof(ngpixis_t, csr)); in set_mux_to_lbc()
268 out_8(lbc_lcs0_ba, offsetof(ngpixis_t, brdcfg0)); in set_mux_to_diu()
269 out_8(lbc_lcs1_ba, px_brdcfg0 | PX_BRDCFG0_ELBC_DIU); in set_mux_to_diu()
290 out_8(lbc_lcs0_ba, reg); in pixis_read()
312 out_8(lbc_lcs0_ba, reg); in pixis_write()
[all …]
/openbmc/u-boot/arch/m68k/cpu/mcf547x_8x/
H A Dcpu.c29 out_8(&gptmr->mode, GPT_TMS_SGPIO); in do_reset()
30 out_8(&gptmr->ctrl, GPT_CTRL_WDEN | GPT_CTRL_CE); in do_reset()
102 out_8(&gptmr->ocpw, 0xa5); in hw_watchdog_reset()
110 out_8(&gptmr->mode, 0); in watchdog_disable()
111 out_8(&gptmr->ctrl, 0); in watchdog_disable()
125 out_8(&gptmr->mode, GPT_TMS_SGPIO); in watchdog_init()
126 out_8(&gptmr->ctrl, GPT_CTRL_CE | GPT_CTRL_WDEN); in watchdog_init()
/openbmc/u-boot/board/freescale/m54455evb/
H A Dm54455evb.c46 out_8(&gpio->mscr_sdram, CONFIG_SYS_SDRAM_DRV_STRENGTH); in dram_init()
130 out_8(&ata->cr, 0); in ide_set_reset()
137 out_8(&ata->t1, CALC_TIMING(piotms[2][0])); in ide_set_reset()
138 out_8(&ata->t2w, CALC_TIMING(piotms[2][1])); in ide_set_reset()
139 out_8(&ata->t2r, CALC_TIMING(piotms[2][1])); in ide_set_reset()
140 out_8(&ata->ta, CALC_TIMING(piotms[2][8])); in ide_set_reset()
141 out_8(&ata->trd, CALC_TIMING(piotms[2][7])); in ide_set_reset()
142 out_8(&ata->t4, CALC_TIMING(piotms[2][3])); in ide_set_reset()
143 out_8(&ata->t9, CALC_TIMING(piotms[2][6])); in ide_set_reset()
146 out_8(&ata->cr, 0x40); in ide_set_reset()
/openbmc/u-boot/board/keymile/km83xx/
H A Dkm83xx_i2c.c19 out_8(&base->cr, (I2C_CR_MEN | I2C_CR_MSTA)); in i2c_write_start_seq()
21 out_8(&base->cr, (I2C_CR_MEN)); in i2c_write_start_seq()
35 out_8(&base->cr, (I2C_CR_MSTA)); in i2c_make_abort()
37 out_8(&base->cr, (I2C_CR_MEN | I2C_CR_MSTA)); in i2c_make_abort()
60 out_8(&base->cr, (I2C_CR_MEN)); in i2c_make_abort()
63 out_8(&base->sr, 0); in i2c_make_abort()
/openbmc/linux/arch/powerpc/platforms/52xx/
H A Dmpc52xx_pm.c44 out_8(&gpiow->wkup_gpioe, in_8(&gpiow->wkup_gpioe) | (1 << pin)); in mpc52xx_set_wakeup_gpio()
46 out_8(&gpiow->wkup_ddr, in_8(&gpiow->wkup_ddr) & ~(1 << pin)); in mpc52xx_set_wakeup_gpio()
48 out_8(&gpiow->wkup_inten, in_8(&gpiow->wkup_inten) | (1 << pin)); in mpc52xx_set_wakeup_gpio()
55 out_8(&gpiow->wkup_maste, 1); in mpc52xx_set_wakeup_gpio()
140 out_8(&cdm->ccs_sleep_enable, 1); in mpc52xx_pm_enter()
141 out_8(&cdm->osc_sleep_enable, 1); in mpc52xx_pm_enter()
142 out_8(&cdm->ccs_qreq_test, 1); in mpc52xx_pm_enter()
174 out_8(&cdm->ccs_sleep_enable, 0); in mpc52xx_pm_enter()
175 out_8(&cdm->osc_sleep_enable, 0); in mpc52xx_pm_enter()
/openbmc/linux/drivers/net/ethernet/apple/
H A Dmace.c327 out_8(&mb->biucc, SWRST); in mace_reset()
339 out_8(&mb->imr, 0xff); /* disable all intrs for now */ in mace_reset()
341 out_8(&mb->maccc, 0); /* turn off tx, rx */ in mace_reset()
343 out_8(&mb->biucc, XMTSP_64); in mace_reset()
344 out_8(&mb->utr, RTRD); in mace_reset()
345 out_8(&mb->fifocc, RCVFW_32 | XMTFW_16 | XMTFWU | RCVFWU | XMTBRST); in mace_reset()
346 out_8(&mb->xmtfc, AUTO_PAD_XMIT); /* auto-pad short frames */ in mace_reset()
347 out_8(&mb->rcvfc, 0); in mace_reset()
354 out_8(&mb->iac, LOGADDR); in mace_reset()
356 out_8(&mb->iac, ADDRCHG | LOGADDR); in mace_reset()
[all …]
/openbmc/u-boot/board/freescale/mpc8568mds/
H A Dbcsr.c49 out_8(&bcsr[8], in_8(&bcsr[8]) & ~BCSR_UCC1_GETH_EN); in reset_8568mds_uccs()
50 out_8(&bcsr[9], in_8(&bcsr[9]) & ~BCSR_UCC2_GETH_EN); in reset_8568mds_uccs()
53 out_8(&bcsr[11], in_8(&bcsr[11]) & ~(BCSR_UCC1_MODE_MSK | in reset_8568mds_uccs()
57 out_8(&bcsr[8], in_8(&bcsr[8]) | BCSR_UCC1_GETH_EN); in reset_8568mds_uccs()
58 out_8(&bcsr[9], in_8(&bcsr[9]) | BCSR_UCC2_GETH_EN); in reset_8568mds_uccs()

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