1*83d290c5STom Rini // SPDX-License-Identifier: GPL-2.0+
2a4145534SPeter Tyser /*
3a4145534SPeter Tyser *
4a4145534SPeter Tyser * (C) Copyright 2000-2003
5a4145534SPeter Tyser * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
6a4145534SPeter Tyser *
7a4110eecSAlison Wang * (C) Copyright 2007, 2012 Freescale Semiconductor, Inc.
8a4145534SPeter Tyser * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
9a4145534SPeter Tyser */
10a4145534SPeter Tyser
11a4145534SPeter Tyser #include <common.h>
12a4145534SPeter Tyser #include <MCD_dma.h>
13a4145534SPeter Tyser #include <asm/immap.h>
14a4110eecSAlison Wang #include <asm/io.h>
15a4145534SPeter Tyser
16a4145534SPeter Tyser #if defined(CONFIG_CMD_NET)
17a4145534SPeter Tyser #include <config.h>
18a4145534SPeter Tyser #include <net.h>
19a4145534SPeter Tyser #include <asm/fsl_mcdmafec.h>
20a4145534SPeter Tyser #endif
21a4145534SPeter Tyser
22a4145534SPeter Tyser /*
23a4145534SPeter Tyser * Breath some life into the CPU...
24a4145534SPeter Tyser *
25a4145534SPeter Tyser * Set up the memory map,
26a4145534SPeter Tyser * initialize a bunch of registers,
27a4145534SPeter Tyser * initialize the UPM's
28a4145534SPeter Tyser */
cpu_init_f(void)29a4145534SPeter Tyser void cpu_init_f(void)
30a4145534SPeter Tyser {
31a4110eecSAlison Wang gpio_t *gpio = (gpio_t *) MMAP_GPIO;
32a4110eecSAlison Wang fbcs_t *fbcs = (fbcs_t *) MMAP_FBCS;
33a4110eecSAlison Wang xlbarb_t *xlbarb = (xlbarb_t *) MMAP_XARB;
34a4145534SPeter Tyser
35a4110eecSAlison Wang out_be32(&xlbarb->adrto, 0x2000);
36a4110eecSAlison Wang out_be32(&xlbarb->datto, 0x2500);
37a4110eecSAlison Wang out_be32(&xlbarb->busto, 0x3000);
38a4145534SPeter Tyser
39a4110eecSAlison Wang out_be32(&xlbarb->cfg, XARB_CFG_AT | XARB_CFG_DT);
40a4145534SPeter Tyser
41a4145534SPeter Tyser /* Master Priority Enable */
42a4110eecSAlison Wang out_be32(&xlbarb->prien, 0xff);
43a4110eecSAlison Wang out_be32(&xlbarb->pri, 0);
44a4145534SPeter Tyser
45a4145534SPeter Tyser #if (defined(CONFIG_SYS_CS0_BASE) && defined(CONFIG_SYS_CS0_MASK) && defined(CONFIG_SYS_CS0_CTRL))
46a4110eecSAlison Wang out_be32(&fbcs->csar0, CONFIG_SYS_CS0_BASE);
47a4110eecSAlison Wang out_be32(&fbcs->cscr0, CONFIG_SYS_CS0_CTRL);
48a4110eecSAlison Wang out_be32(&fbcs->csmr0, CONFIG_SYS_CS0_MASK);
49a4145534SPeter Tyser #endif
50a4145534SPeter Tyser
51a4145534SPeter Tyser #if (defined(CONFIG_SYS_CS1_BASE) && defined(CONFIG_SYS_CS1_MASK) && defined(CONFIG_SYS_CS1_CTRL))
52a4110eecSAlison Wang out_be32(&fbcs->csar1, CONFIG_SYS_CS1_BASE);
53a4110eecSAlison Wang out_be32(&fbcs->cscr1, CONFIG_SYS_CS1_CTRL);
54a4110eecSAlison Wang out_be32(&fbcs->csmr1, CONFIG_SYS_CS1_MASK);
55a4145534SPeter Tyser #endif
56a4145534SPeter Tyser
57a4145534SPeter Tyser #if (defined(CONFIG_SYS_CS2_BASE) && defined(CONFIG_SYS_CS2_MASK) && defined(CONFIG_SYS_CS2_CTRL))
58a4110eecSAlison Wang out_be32(&fbcs->csar2, CONFIG_SYS_CS2_BASE);
59a4110eecSAlison Wang out_be32(&fbcs->cscr2, CONFIG_SYS_CS2_CTRL);
60a4110eecSAlison Wang out_be32(&fbcs->csmr2, CONFIG_SYS_CS2_MASK);
61a4145534SPeter Tyser #endif
62a4145534SPeter Tyser
63a4145534SPeter Tyser #if (defined(CONFIG_SYS_CS3_BASE) && defined(CONFIG_SYS_CS3_MASK) && defined(CONFIG_SYS_CS3_CTRL))
64a4110eecSAlison Wang out_be32(&fbcs->csar3, CONFIG_SYS_CS3_BASE);
65a4110eecSAlison Wang out_be32(&fbcs->cscr3, CONFIG_SYS_CS3_CTRL);
66a4110eecSAlison Wang out_be32(&fbcs->csmr3, CONFIG_SYS_CS3_MASK);
67a4145534SPeter Tyser #endif
68a4145534SPeter Tyser
69a4145534SPeter Tyser #if (defined(CONFIG_SYS_CS4_BASE) && defined(CONFIG_SYS_CS4_MASK) && defined(CONFIG_SYS_CS4_CTRL))
70a4110eecSAlison Wang out_be32(&fbcs->csar4, CONFIG_SYS_CS4_BASE);
71a4110eecSAlison Wang out_be32(&fbcs->cscr4, CONFIG_SYS_CS4_CTRL);
72a4110eecSAlison Wang out_be32(&fbcs->csmr4, CONFIG_SYS_CS4_MASK);
73a4145534SPeter Tyser #endif
74a4145534SPeter Tyser
75a4145534SPeter Tyser #if (defined(CONFIG_SYS_CS5_BASE) && defined(CONFIG_SYS_CS5_MASK) && defined(CONFIG_SYS_CS5_CTRL))
76a4110eecSAlison Wang out_be32(&fbcs->csar5, CONFIG_SYS_CS5_BASE);
77a4110eecSAlison Wang out_be32(&fbcs->cscr5, CONFIG_SYS_CS5_CTRL);
78a4110eecSAlison Wang out_be32(&fbcs->csmr5, CONFIG_SYS_CS5_MASK);
79a4145534SPeter Tyser #endif
80a4145534SPeter Tyser
8100f792e0SHeiko Schocher #ifdef CONFIG_SYS_I2C_FSL
82a4110eecSAlison Wang out_be16(&gpio->par_feci2cirq,
83a4110eecSAlison Wang GPIO_PAR_FECI2CIRQ_SCL | GPIO_PAR_FECI2CIRQ_SDA);
84a4145534SPeter Tyser #endif
85a4145534SPeter Tyser
86a4145534SPeter Tyser icache_enable();
87a4145534SPeter Tyser }
88a4145534SPeter Tyser
89a4145534SPeter Tyser /*
90a4145534SPeter Tyser * initialize higher level parts of CPU like timers
91a4145534SPeter Tyser */
cpu_init_r(void)92a4145534SPeter Tyser int cpu_init_r(void)
93a4145534SPeter Tyser {
94a4145534SPeter Tyser #if defined(CONFIG_CMD_NET) && defined(CONFIG_FSLDMAFEC)
95a4145534SPeter Tyser MCD_initDma((dmaRegs *) (MMAP_MCDMA), (void *)(MMAP_SRAM + 512),
96a4145534SPeter Tyser MCD_RELOC_TASKS);
97a4145534SPeter Tyser #endif
98a4145534SPeter Tyser return (0);
99a4145534SPeter Tyser }
100a4145534SPeter Tyser
uart_port_conf(int port)101a4145534SPeter Tyser void uart_port_conf(int port)
102a4145534SPeter Tyser {
103a4110eecSAlison Wang gpio_t *gpio = (gpio_t *) MMAP_GPIO;
104a4110eecSAlison Wang u8 *pscsicr = (u8 *) (CONFIG_SYS_UART_BASE + 0x40);
105a4145534SPeter Tyser
106a4145534SPeter Tyser /* Setup Ports: */
107a4145534SPeter Tyser switch (port) {
108a4145534SPeter Tyser case 0:
109a4110eecSAlison Wang out_8(&gpio->par_psc0, GPIO_PAR_PSC0_TXD0 | GPIO_PAR_PSC0_RXD0);
110a4145534SPeter Tyser break;
111a4145534SPeter Tyser case 1:
112a4110eecSAlison Wang out_8(&gpio->par_psc1, GPIO_PAR_PSC1_TXD1 | GPIO_PAR_PSC1_RXD1);
113a4145534SPeter Tyser break;
114a4145534SPeter Tyser case 2:
115a4110eecSAlison Wang out_8(&gpio->par_psc2, GPIO_PAR_PSC2_TXD2 | GPIO_PAR_PSC2_RXD2);
116a4145534SPeter Tyser break;
117a4145534SPeter Tyser case 3:
118a4110eecSAlison Wang out_8(&gpio->par_psc3, GPIO_PAR_PSC3_TXD3 | GPIO_PAR_PSC3_RXD3);
119a4145534SPeter Tyser break;
120a4145534SPeter Tyser }
121a4145534SPeter Tyser
122a4110eecSAlison Wang clrbits_8(pscsicr, 0x07);
123a4145534SPeter Tyser }
124a4145534SPeter Tyser
125a4145534SPeter Tyser #if defined(CONFIG_CMD_NET)
fecpin_setclear(struct eth_device * dev,int setclear)126a4145534SPeter Tyser int fecpin_setclear(struct eth_device *dev, int setclear)
127a4145534SPeter Tyser {
128a4110eecSAlison Wang gpio_t *gpio = (gpio_t *) MMAP_GPIO;
129a4145534SPeter Tyser struct fec_info_dma *info = (struct fec_info_dma *)dev->priv;
130a4145534SPeter Tyser
131a4145534SPeter Tyser if (setclear) {
132a4145534SPeter Tyser if (info->iobase == CONFIG_SYS_FEC0_IOBASE)
133a4110eecSAlison Wang setbits_be16(&gpio->par_feci2cirq, 0xf000);
134a4145534SPeter Tyser else
135a4110eecSAlison Wang setbits_be16(&gpio->par_feci2cirq, 0x0fc0);
136a4145534SPeter Tyser } else {
137a4145534SPeter Tyser if (info->iobase == CONFIG_SYS_FEC0_IOBASE)
138a4110eecSAlison Wang clrbits_be16(&gpio->par_feci2cirq, 0xf000);
139a4145534SPeter Tyser else
140a4110eecSAlison Wang clrbits_be16(&gpio->par_feci2cirq, 0x0fc0);
141a4145534SPeter Tyser }
142a4145534SPeter Tyser return 0;
143a4145534SPeter Tyser }
144a4145534SPeter Tyser #endif
145