| /openbmc/qemu/hw/misc/ |
| H A D | imx7_ccm.c | 93 const uint32_t *mmio = opaque; in imx7_set_clr_tog_read() local
95 return mmio[CCM_INDEX(offset)]; in imx7_set_clr_tog_read()
103 uint32_t *mmio = opaque; in imx7_set_clr_tog_write() local
107 mmio[index] = value; in imx7_set_clr_tog_write()
110 mmio[index] |= value; in imx7_set_clr_tog_write()
113 mmio[index] &= ~value; in imx7_set_clr_tog_write()
116 mmio[index] ^= value; in imx7_set_clr_tog_write()
176 memory_region_init(&s->mmio.container, obj, TYPE_IMX7_ANALOG, in imx7_analog_init()
179 memory_region_init_io(&s->mmio.analog, in imx7_analog_init()
186 memory_region_add_subregion(&s->mmio.container, in imx7_analog_init()
[all …]
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| H A D | imx8mp_ccm.c | 41 const uint32_t *mmio = opaque; in imx8mp_set_clr_tog_read() local
43 return mmio[CCM_INDEX(offset)]; in imx8mp_set_clr_tog_read()
51 uint32_t *mmio = opaque; in imx8mp_set_clr_tog_write() local
55 mmio[index] = value; in imx8mp_set_clr_tog_write()
58 mmio[index] |= value; in imx8mp_set_clr_tog_write()
61 mmio[index] &= ~value; in imx8mp_set_clr_tog_write()
64 mmio[index] ^= value; in imx8mp_set_clr_tog_write()
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| H A D | auxbus.c | 90 memory_region_add_subregion(bus->aux_io, addr, aux_dev->mmio); in aux_map_slave()
304 object_property_get_uint(OBJECT(s->mmio), "addr", NULL), in aux_slave_dev_print()
305 memory_region_size(s->mmio)); in aux_slave_dev_print()
308 void aux_init_mmio(AUXSlave *aux_slave, MemoryRegion *mmio) in aux_init_mmio() argument
310 assert(!aux_slave->mmio); in aux_init_mmio()
311 aux_slave->mmio = mmio; in aux_init_mmio()
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| H A D | imx8mp_analog.c | 122 memory_region_init(&s->mmio.container, obj, TYPE_IMX8MP_ANALOG, 0x10000); in imx8mp_analog_init()
124 memory_region_init_io(&s->mmio.analog, obj, &imx8mp_analog_ops, s, in imx8mp_analog_init()
126 memory_region_add_subregion(&s->mmio.container, 0, &s->mmio.analog); in imx8mp_analog_init()
128 sysbus_init_mmio(sd, &s->mmio.container); in imx8mp_analog_init()
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| H A D | sifive_test.c | 75 memory_region_init_io(&s->mmio, obj, &sifive_test_ops, s, in sifive_test_init()
77 sysbus_init_mmio(SYS_BUS_DEVICE(obj), &s->mmio); in sifive_test_init()
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| /openbmc/qemu/hw/core/ |
| H A D | sysbus.c | 127 if (dev->mmio[n].addr == addr) { in sysbus_mmio_map_common()
131 if (dev->mmio[n].addr != (hwaddr)-1) { in sysbus_mmio_map_common()
133 memory_region_del_subregion(get_system_memory(), dev->mmio[n].memory); in sysbus_mmio_map_common()
135 dev->mmio[n].addr = addr; in sysbus_mmio_map_common()
139 dev->mmio[n].memory, in sysbus_mmio_map_common()
145 dev->mmio[n].memory); in sysbus_mmio_map_common()
157 if (!strcmp(dev->mmio[i].memory->name, name)) { in sysbus_mmio_map_name()
189 dev->mmio[n].addr = -1; in sysbus_init_mmio()
190 dev->mmio[n].memory = memory; in sysbus_init_mmio()
196 return dev->mmio[n].memory; in sysbus_mmio_get_region()
[all …]
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| H A D | platform-bus.c | 57 MemoryRegion *pbus_mr = &pbus->mmio; in platform_bus_get_mmio_addr()
148 MemoryRegion *mr = memory_region_find(&pbus->mmio, off, size).mr; in platform_bus_map_mmio()
164 memory_region_add_subregion(&pbus->mmio, off, sbdev_mr); in platform_bus_map_mmio()
193 memory_region_init(&pbus->mmio, OBJECT(dev), "platform bus", in platform_bus_realize()
195 sysbus_init_mmio(d, &pbus->mmio); in platform_bus_realize()
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| /openbmc/u-boot/arch/riscv/dts/ |
| H A D | ae350_32.dts | 153 compatible = "virtio,mmio";
160 compatible = "virtio,mmio";
167 compatible = "virtio,mmio";
174 compatible = "virtio,mmio";
181 compatible = "virtio,mmio";
188 compatible = "virtio,mmio";
195 compatible = "virtio,mmio";
202 compatible = "virtio,mmio";
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| H A D | ae350_64.dts | 153 compatible = "virtio,mmio";
160 compatible = "virtio,mmio";
167 compatible = "virtio,mmio";
174 compatible = "virtio,mmio";
181 compatible = "virtio,mmio";
188 compatible = "virtio,mmio";
195 compatible = "virtio,mmio";
202 compatible = "virtio,mmio";
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| /openbmc/libmctp/tests/ |
| H A D | test_astlpc.c | 48 struct mctp_binding_astlpc_mmio mmio; member
70 struct mctp_binding_astlpc_mmio *mmio = binding_to_mmio(data); in mctp_astlpc_mmio_kcs_read() local
72 *val = (*mmio->kcs)[reg]; in mctp_astlpc_mmio_kcs_read()
78 uint8_t flag = mmio->bmc ? KCS_STATUS_IBF : KCS_STATUS_OBF; in mctp_astlpc_mmio_kcs_read()
79 (*mmio->kcs)[MCTP_ASTLPC_KCS_REG_STATUS] &= ~flag; in mctp_astlpc_mmio_kcs_read()
89 struct mctp_binding_astlpc_mmio *mmio = binding_to_mmio(data); in mctp_astlpc_mmio_kcs_write() local
96 uint8_t flag = mmio->bmc ? KCS_STATUS_OBF : KCS_STATUS_IBF; in mctp_astlpc_mmio_kcs_write()
97 (*mmio->kcs)[MCTP_ASTLPC_KCS_REG_STATUS] |= flag; in mctp_astlpc_mmio_kcs_write()
100 regp = &(*mmio->kcs)[reg]; in mctp_astlpc_mmio_kcs_write()
119 struct mctp_binding_astlpc_mmio *mmio = binding_to_mmio(data); in mctp_astlpc_mmio_lpc_read() local
[all …]
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| /openbmc/qemu/hw/display/ |
| H A D | vga-pci.c | 52 MemoryRegion mmio; member
257 memory_region_init_io(&d->mmio, OBJECT(dev), &unassigned_io_ops, NULL, in pci_std_vga_realize()
267 pci_std_vga_mmio_region_init(s, OBJECT(dev), &d->mmio, d->mrs, in pci_std_vga_realize()
270 pci_register_bar(&d->dev, 2, PCI_BASE_ADDRESS_SPACE_MEMORY, &d->mmio); in pci_std_vga_realize()
288 memory_region_init_io(&d->mmio, OBJECT(dev), &unassigned_io_ops, NULL, in pci_secondary_vga_realize()
298 pci_std_vga_mmio_region_init(s, OBJECT(dev), &d->mmio, d->mrs, qext, edid); in pci_secondary_vga_realize()
301 pci_register_bar(&d->dev, 2, PCI_BASE_ADDRESS_SPACE_MEMORY, &d->mmio); in pci_secondary_vga_realize()
310 memory_region_del_subregion(&d->mmio, &d->mrs[0]); in pci_secondary_vga_exit()
311 memory_region_del_subregion(&d->mmio, &d->mrs[1]); in pci_secondary_vga_exit()
313 memory_region_del_subregion(&d->mmio, &d->mrs[2]); in pci_secondary_vga_exit()
[all …]
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| /openbmc/u-boot/drivers/video/ |
| H A D | atmel_lcdfb.c | 48 #define lcdc_readl(mmio, reg) __raw_readl((mmio)+(reg)) argument
49 #define lcdc_writel(mmio, reg, val) __raw_writel((val), (mmio)+(reg)) argument
54 return (ushort *)(panel_info.mmio + ATMEL_LCDC_LUT(0)); in configuration_get_cmap()
95 lcdc_writel(panel_info.mmio, ATMEL_LCDC_LUT(regno), in lcd_setcolreg()
98 lcdc_writel(panel_info.mmio, ATMEL_LCDC_LUT(regno), in lcd_setcolreg()
230 atmel_fb_init(panel_info.mmio, &timing, panel_info.vl_bpix, in lcd_ctrl_init()
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| /openbmc/qemu/hw/pci/ |
| H A D | pcie_host.c | 81 memory_region_init_io(&e->mmio, OBJECT(e), &pcie_mmcfg_ops, e, "pcie-mmcfg-mmio", in pcie_host_init()
88 memory_region_del_subregion(get_system_memory(), &e->mmio); in pcie_host_mmcfg_unmap()
99 memory_region_set_size(&e->mmio, e->size); in pcie_host_mmcfg_init()
107 memory_region_add_subregion(get_system_memory(), e->base_addr, &e->mmio); in pcie_host_mmcfg_map()
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| /openbmc/qemu/hw/ide/ |
| H A D | sii3112.c | 34 MemoryRegion mmio; member
262 memory_region_init_io(&d->mmio, OBJECT(d), &sii3112_reg_ops, d, in sii3112_pci_realize()
264 pci_register_bar(dev, 5, PCI_BASE_ADDRESS_SPACE_MEMORY, &d->mmio); in sii3112_pci_realize()
268 memory_region_init_alias(mr, OBJECT(d), "sii3112.bar0", &d->mmio, 0x80, 8); in sii3112_pci_realize()
271 memory_region_init_alias(mr, OBJECT(d), "sii3112.bar1", &d->mmio, 0x88, 4); in sii3112_pci_realize()
274 memory_region_init_alias(mr, OBJECT(d), "sii3112.bar2", &d->mmio, 0xc0, 8); in sii3112_pci_realize()
277 memory_region_init_alias(mr, OBJECT(d), "sii3112.bar3", &d->mmio, 0xc8, 4); in sii3112_pci_realize()
280 memory_region_init_alias(mr, OBJECT(d), "sii3112.bar4", &d->mmio, 0, 16); in sii3112_pci_realize()
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| /openbmc/qemu/include/hw/pci-host/ |
| H A D | aspeed_pcie.h | 67 MemoryRegion mmio; member
87 MemoryRegion mmio; member
114 MemoryRegion mmio; member
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| /openbmc/qemu/include/hw/adc/ |
| H A D | aspeed_adc.h | 34 MemoryRegion mmio; member
45 MemoryRegion mmio; member
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| /openbmc/qemu/docs/system/i386/ |
| H A D | xenpvh.rst | 48 …20832,pci-ecam-size=268435456,pci-mmio-base=4026531840,pci-mmio-size=33554432,pci-mmio-high-base=8…
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| /openbmc/qemu/hw/mem/ |
| H A D | sparse-mem.c | 28 MemoryRegion mmio; member
116 return &SPARSE_MEM(dev)->mmio; in sparse_mem_init()
134 memory_region_init_io(&s->mmio, OBJECT(s), &sparse_mem_ops, s, in sparse_mem_realize()
136 sysbus_init_mmio(sbd, &s->mmio); in sparse_mem_realize()
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| H A D | npcm7xx_mc.c | 63 memory_region_init_io(&s->mmio, OBJECT(s), &npcm7xx_mc_ops, s, "regs", in npcm7xx_mc_realize()
65 sysbus_init_mmio(SYS_BUS_DEVICE(s), &s->mmio); in npcm7xx_mc_realize()
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| /openbmc/qemu/hw/i386/xen/ |
| H A D | xen_pvdevice.c | 53 MemoryRegion mmio; member
111 memory_region_init_io(&d->mmio, NULL, &xen_pv_mmio_ops, d, in xen_pv_realize()
115 &d->mmio); in xen_pv_realize()
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| /openbmc/u-boot/drivers/ata/ |
| H A D | ahci.c | 186 void __iomem *mmio = uc_priv->mmio_base; in ahci_host_init() local
194 cap_save = readl(mmio + HOST_CAP); in ahci_host_init()
202 writel_with_flush(HOST_AHCI_EN, mmio + HOST_CTL); in ahci_host_init()
203 writel(cap_save, mmio + HOST_CAP); in ahci_host_init()
204 writel_with_flush(0xf, mmio + HOST_PORTS_IMPL); in ahci_host_init()
225 uc_priv->cap = readl(mmio + HOST_CAP); in ahci_host_init()
226 uc_priv->port_map = readl(mmio + HOST_PORTS_IMPL); in ahci_host_init()
241 uc_priv->port[i].port_mmio = ahci_port_base(mmio, i); in ahci_host_init()
243 ahci_setup_port(&uc_priv->port[i], mmio, i); in ahci_host_init()
323 writel(1 << i, mmio + HOST_IRQ_STAT); in ahci_host_init()
[all …]
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| /openbmc/qemu/hw/pci-host/ |
| H A D | xilinx-pcie.c | 124 memory_region_init(&s->mmio, OBJECT(s), "mmio", UINT64_MAX); in xilinx_pcie_host_realize()
125 memory_region_set_enabled(&s->mmio, false); in xilinx_pcie_host_realize()
133 sysbus_init_mmio(sbd, &pex->mmio); in xilinx_pcie_host_realize()
134 sysbus_init_mmio(sbd, &s->mmio); in xilinx_pcie_host_realize()
137 pci_swizzle_map_irq_fn, s, &s->mmio, in xilinx_pcie_host_realize()
250 memory_region_set_enabled(&s->mmio, val & ROOTCFG_RPSCR_BRIDGEEN); in xilinx_pcie_root_config_write()
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| /openbmc/qemu/include/hw/intc/ |
| H A D | riscv_aclint.h | 39 MemoryRegion mmio; member
64 MemoryRegion mmio; member
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| /openbmc/qemu/include/hw/misc/ |
| H A D | auxbus.h | 84 MemoryRegion *mmio; member
133 void aux_init_mmio(AUXSlave *aux_slave, MemoryRegion *mmio);
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| /openbmc/qemu/hw/usb/ |
| H A D | hcd-dwc2.c | 705 uint32_t *mmio; in dwc2_glbreg_write() local
715 mmio = &s->glbreg[index]; in dwc2_glbreg_write()
716 old = *mmio; in dwc2_glbreg_write()
792 *mmio = val; in dwc2_glbreg_write()
822 uint32_t *mmio; in dwc2_fszreg_write() local
831 mmio = &s->fszreg[index]; in dwc2_fszreg_write()
832 old = *mmio; in dwc2_fszreg_write()
835 *mmio = val; in dwc2_fszreg_write()
878 uint32_t *mmio; in dwc2_hreg0_write() local
889 mmio = &s->hreg0[index]; in dwc2_hreg0_write()
[all …]
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