Home
last modified time | relevance | path

Searched refs:mmDPCSTX4_DPCSTX_PLL_UPDATE_ADDR (Results 1 – 4 of 4) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dpcs/
H A Ddpcs_2_1_0_offset.h468 #define mmDPCSTX4_DPCSTX_PLL_UPDATE_ADDR … macro
H A Ddpcs_3_0_0_offset.h407 #define mmDPCSTX4_DPCSTX_PLL_UPDATE_ADDR … macro
H A Ddpcs_2_0_0_offset.h458 #define mmDPCSTX4_DPCSTX_PLL_UPDATE_ADDR … macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_11_2_d.h10034 #define mmDPCSTX4_DPCSTX_PLL_UPDATE_ADDR 0x9b58 macro