Home
last modified time | relevance | path

Searched refs:grp (Results 1 – 25 of 67) sorted by relevance

123

/openbmc/u-boot/drivers/pinctrl/uniphier/
H A Dpinctrl-uniphier.h116 #define __UNIPHIER_PINCTRL_GROUP(grp) \ argument
118 .name = #grp, \
119 .pins = grp##_pins, \
120 .num_pins = ARRAY_SIZE(grp##_pins), \
121 .muxvals = grp##_muxvals + \
122 BUILD_BUG_ON_ZERO(ARRAY_SIZE(grp##_pins) != \
123 ARRAY_SIZE(grp##_muxvals)), \
133 #define UNIPHIER_PINCTRL_GROUP(grp) \ argument
134 { .num_pins = ARRAY_SIZE(grp##_pins) + ARRAY_SIZE(grp##_muxvals) }
137 #define UNIPHIER_PINCTRL_GROUP(grp) __UNIPHIER_PINCTRL_GROUP(grp) argument
[all …]
H A Dpinctrl-uniphier-core.c317 const struct uniphier_pinctrl_group *grp = in uniphier_pinconf_group_set() local
321 for (i = 0; i < grp->num_pins; i++) { in uniphier_pinconf_group_set()
322 ret = uniphier_pinconf_set(dev, grp->pins[i], param, arg); in uniphier_pinconf_group_set()
389 const struct uniphier_pinctrl_group *grp = in uniphier_pinmux_group_set() local
393 for (i = 0; i < grp->num_pins; i++) in uniphier_pinmux_group_set()
394 uniphier_pinmux_set_one(dev, grp->pins[i], grp->muxvals[i]); in uniphier_pinmux_group_set()
/openbmc/u-boot/arch/arm/mach-tegra/
H A Dpinmux-common.c84 #define MUX_REG(grp) _R(0x80 + ((tegra_soc_pingroups[grp].ctl_id / 16) * 4)) argument
85 #define MUX_SHIFT(grp) ((tegra_soc_pingroups[grp].ctl_id % 16) * 2) argument
87 #define PULL_REG(grp) _R(0xa0 + ((tegra_soc_pingroups[grp].pull_id / 16) * 4)) argument
88 #define PULL_SHIFT(grp) ((tegra_soc_pingroups[grp].pull_id % 16) * 2) argument
90 #define TRI_REG(grp) _R(0x14 + (((grp) / 32) * 4)) argument
91 #define TRI_SHIFT(grp) ((grp) % 32) argument
382 u32 *reg = REG(grp); in pinmux_set_schmt()
407 u32 *reg = REG(grp); in pinmux_set_hsm()
515 static void pinmux_set_drvup_slwf(enum pmux_drvgrp grp, int slwf) in pinmux_set_drvup_slwf() argument
517 u32 *reg = DRV_REG(grp); in pinmux_set_drvup_slwf()
[all …]
/openbmc/u-boot/arch/arm/mach-mvebu/serdes/axp/
H A Dboard_env_spec.h100 #define GPP_DATA_OUT_REG(grp) (MV_GPP_REGS_BASE(grp) + 0x00) argument
102 #define GPP_DATA_OUT_EN_REG(grp) (MV_GPP_REGS_BASE(grp) + 0x04) argument
103 #define GPP_BLINK_EN_REG(grp) (MV_GPP_REGS_BASE(grp) + 0x08) argument
104 #define GPP_DATA_IN_POL_REG(grp) (MV_GPP_REGS_BASE(grp) + 0x0C) argument
105 #define GPP_DATA_IN_REG(grp) (MV_GPP_REGS_BASE(grp) + 0x10) argument
106 #define GPP_INT_CAUSE_REG(grp) (MV_GPP_REGS_BASE(grp) + 0x14) argument
107 #define GPP_INT_MASK_REG(grp) (MV_GPP_REGS_BASE(grp) + 0x18) argument
108 #define GPP_INT_LVL_REG(grp) (MV_GPP_REGS_BASE(grp) + 0x1C) argument
109 #define GPP_OUT_SET_REG(grp) (0x18130 + ((grp) * 0x40)) argument
111 #define GPP_OUT_CLEAR_REG(grp) (0x18134 + ((grp) * 0x40)) argument
/openbmc/u-boot/arch/arm/dts/
H A Dimx6ull-colibri.dts200 pinctrl_gpio1: gpio1-grp {
215 pinctrl_gpio2: gpio2-grp { /* Camera */
225 pinctrl_gpio3: gpio3-grp { /* CAN2 */
232 pinctrl_gpio4: gpio4-grp {
238 pinctrl_gpio5: gpio5-grp { /* ATMEL MXT TOUCH */
244 pinctrl_gpio6: gpio6-grp { /* Wifi pins */
256 pinctrl_can_int: canint-grp {
262 pinctrl_enet2: enet2-grp {
277 pinctrl_ecspi1_cs: ecspi1-cs-grp {
283 pinctrl_ecspi1: ecspi1-grp {
[all …]
H A Dimx7-colibri.dtsi51 pinctrl_i2c4: i2c4-grp {
58 pinctrl_i2c4_gpio: i2c4-gpio-grp {
65 pinctrl_uart1: uart1-grp {
74 pinctrl_uart1_ctrl1: uart1-ctrl1-grp {
81 pinctrl_usdhc1: usdhc1-grp {
94 pinctrl_i2c1: i2c1-grp {
101 pinctrl_i2c1_gpio: i2c1-gpio-grp {
108 pinctrl_cd_usdhc1: usdhc1-cd-grp {
/openbmc/u-boot/arch/arm/mach-imx/mx6/
H A Dddr.c602 const struct mx6sx_iomux_grp_regs *grp) in mx6sx_dram_iocfg() argument
611 writel(grp->grp_ddr_type, &mx6_grp_iomux->grp_ddr_type); in mx6sx_dram_iocfg()
612 writel(grp->grp_ddrpke, &mx6_grp_iomux->grp_ddrpke); in mx6sx_dram_iocfg()
620 writel(grp->grp_addds, &mx6_grp_iomux->grp_addds); in mx6sx_dram_iocfg()
629 writel(grp->grp_ctlds, &mx6_grp_iomux->grp_ctlds); in mx6sx_dram_iocfg()
632 writel(grp->grp_ddrmode_ctl, &mx6_grp_iomux->grp_ddrmode_ctl); in mx6sx_dram_iocfg()
641 writel(grp->grp_ddrmode, &mx6_grp_iomux->grp_ddrmode); in mx6sx_dram_iocfg()
642 writel(grp->grp_b0ds, &mx6_grp_iomux->grp_b0ds); in mx6sx_dram_iocfg()
643 writel(grp->grp_b1ds, &mx6_grp_iomux->grp_b1ds); in mx6sx_dram_iocfg()
645 writel(grp->grp_b2ds, &mx6_grp_iomux->grp_b2ds); in mx6sx_dram_iocfg()
[all …]
/openbmc/u-boot/drivers/ddr/marvell/a38x/
H A Dmv_ddr_sys_env_lib.h18 #define GPP_DATA_OUT_REG(grp) (MV_GPP_REGS_BASE(grp) + 0x00) argument
19 #define GPP_DATA_OUT_EN_REG(grp) (MV_GPP_REGS_BASE(grp) + 0x04) argument
20 #define GPP_DATA_IN_REG(grp) (MV_GPP_REGS_BASE(grp) + 0x10) argument
/openbmc/u-boot/drivers/pinctrl/mvebu/
H A Dpinctrl-armada-37xx.c219 static int armada_37xx_get_func_reg(struct armada_37xx_pin_group *grp, in armada_37xx_get_func_reg() argument
224 for (f = 0; (f < NB_FUNCS) && grp->funcs[f]; f++) in armada_37xx_get_func_reg()
225 if (!strcmp(grp->funcs[f], func)) in armada_37xx_get_func_reg()
268 struct armada_37xx_pin_group *grp) in armada_37xx_pmx_set_by_name() argument
272 unsigned int mask = grp->reg_mask; in armada_37xx_pmx_set_by_name()
276 name, grp->name); in armada_37xx_pmx_set_by_name()
278 func = armada_37xx_get_func_reg(grp, name); in armada_37xx_pmx_set_by_name()
283 val = grp->val[func]; in armada_37xx_pmx_set_by_name()
295 struct armada_37xx_pin_group *grp = &info->groups[group_selector]; in armada_37xx_pmx_group_set() local
298 return armada_37xx_pmx_set_by_name(dev, name, grp); in armada_37xx_pmx_group_set()
[all …]
/openbmc/pam-ipmi/src/pam_ipmicheck/
H A Dpam_ipmicheck.c88 struct group *grp; in pam_sm_chauthtok() local
91 grp = pam_modutil_getgrnam(pamh, spec_grp_name); in pam_sm_chauthtok()
92 if (grp != NULL) { in pam_sm_chauthtok()
93 while (*(grp->gr_mem) != NULL) { in pam_sm_chauthtok()
94 if (strcmp(user, *grp->gr_mem) == 0) { in pam_sm_chauthtok()
98 (grp->gr_mem)++; in pam_sm_chauthtok()
/openbmc/u-boot/drivers/pinctrl/meson/
H A Dpinctrl-meson-gx.h25 #define GROUP(grp, r, b) \ argument
27 .name = #grp, \
28 .pins = grp ## _pins, \
29 .num_pins = ARRAY_SIZE(grp ## _pins), \
H A Dpinctrl-meson-axg.h43 #define GROUP(grp, f) \ argument
45 .name = #grp, \
46 .pins = grp ## _pins, \
47 .num_pins = ARRAY_SIZE(grp ## _pins), \
/openbmc/openbmc/meta-openembedded/meta-networking/recipes-connectivity/samba/samba/
H A Dsamba-4.3.9-remove-getpwent_r.patch80 struct group *grp, grp1, grp2;
83 - torture_assert(tctx, test_enum_r_group(tctx, &grp, &num_grp),
84 + torture_assert(tctx, test_enum_group(tctx, &grp, &num_grp),
89 struct group *grp, grp1, grp2, grp3, grp4;
92 - torture_assert(tctx, test_enum_r_group(tctx, &grp, &num_grp),
93 + torture_assert(tctx, test_enum_group(tctx, &grp, &num_grp),
/openbmc/openbmc/meta-openembedded/meta-oe/recipes-core/sdbus-c++/sdbus-c++-libsystemd/
H A D0014-Handle-missing-gshadow.patch24 if (isempty(grp->gr_name))
28 if (sgrp && !streq_ptr(sgrp->sg_namp, grp->gr_name))
36 g->gid = grp->gr_gid;
50 @@ -387,6 +391,7 @@ int nss_sgrp_for_group(const struct group *grp, struct sgrp *ret_sgrp, char **re
58 @@ -415,6 +420,9 @@ int nss_sgrp_for_group(const struct group *grp, struct sgrp *ret_sgrp, char **re
69 struct group grp, *result;
97 struct group grp, *result;
131 #include <grp.h>
/openbmc/u-boot/drivers/ddr/altera/
H A Dsequencer.c258 static void scc_mgr_set(u32 off, u32 grp, u32 val) in scc_mgr_set() argument
260 writel(val, SDR_PHYGRP_SCCGRP_ADDRESS | off | (grp << 2)); in scc_mgr_set()
375 static void scc_mgr_set_all_ranks(const u32 off, const u32 grp, const u32 val, in scc_mgr_set_all_ranks() argument
382 scc_mgr_set(off, grp, val); in scc_mgr_set_all_ranks()
385 writel(grp, &sdr_scc_mgr->dqs_ena); in scc_mgr_set_all_ranks()
1480 rw_mgr_mem_calibrate_read_test_all_ranks(const u32 grp, const u32 num_tries, in rw_mgr_mem_calibrate_read_test_all_ranks() argument
1485 return rw_mgr_mem_calibrate_read_test(0, grp, num_tries, all_correct, in rw_mgr_mem_calibrate_read_test_all_ranks()
1495 static void rw_mgr_incr_vfifo(const u32 grp) in rw_mgr_incr_vfifo() argument
1497 writel(grp, &phy_mgr_cmd->inc_vfifo_hard_phy); in rw_mgr_incr_vfifo()
1506 static void rw_mgr_decr_vfifo(const u32 grp) in rw_mgr_decr_vfifo() argument
[all …]
/openbmc/qemu/hw/pci-bridge/
H A Dgen_pcie_root_port.c80 GenPCIERootPort *grp = GEN_PCIE_ROOT_PORT(d); in gen_rp_realize() local
95 if (s->hide_native_hotplug_cap && grp->res_reserve.io == -1 && s->hotplug) { in gen_rp_realize()
96 grp->res_reserve.io = GEN_PCIE_ROOT_DEFAULT_IO_RANGE; in gen_rp_realize()
99 grp->res_reserve, errp); in gen_rp_realize()
106 if (!grp->res_reserve.io) { in gen_rp_realize()
/openbmc/u-boot/arch/arm/mach-tegra/tegra20/
H A Dfuncmux.c15 #define PINMUX(grp, mux, pupd, tri) \ argument
16 {PMUX_PINGRP_##grp, PMUX_FUNC_##mux, PMUX_PULL_##pupd, PMUX_TRI_##tri}
210 enum pmux_pingrp grp[] = {PMUX_PINGRP_KBCA, in funcmux_select() enum
216 for (i = 0; i < ARRAY_SIZE(grp); i++) { in funcmux_select()
217 pinmux_tristate_disable(grp[i]); in funcmux_select()
218 pinmux_set_func(grp[i], PMUX_FUNC_KBC); in funcmux_select()
219 pinmux_set_pullupdown(grp[i], PMUX_PULL_UP); in funcmux_select()
/openbmc/u-boot/arch/arm/mach-mvebu/serdes/a38x/
H A Dsys_env_lib.h241 #define GPP_DATA_OUT_REG(grp) (MV_GPP_REGS_BASE(grp) + 0x00) argument
242 #define GPP_DATA_OUT_EN_REG(grp) (MV_GPP_REGS_BASE(grp) + 0x04) argument
243 #define GPP_DATA_IN_REG(grp) (MV_GPP_REGS_BASE(grp) + 0x10) argument
/openbmc/openbmc/poky/meta/recipes-core/systemd/systemd/
H A D0014-Handle-missing-gshadow.patch24 if (isempty(grp->gr_name))
28 if (sgrp && !streq_ptr(sgrp->sg_namp, grp->gr_name))
36 g->gid = grp->gr_gid;
50 @@ -345,6 +349,7 @@ int nss_sgrp_for_group(const struct group *grp, struct sgrp *ret_sgrp, char **re
58 @@ -373,6 +378,9 @@ int nss_sgrp_for_group(const struct group *grp, struct sgrp *ret_sgrp, char **re
130 #include <grp.h>
/openbmc/u-boot/drivers/net/phy/
H A Dmicrel_ksz90x1.c77 const struct ksz90x1_reg_field *grp; member
118 val[i] = dev_read_u32_default(dev, ofcfg->grp[i].name, ~0); in ksz90x1_of_config_group()
119 offset = ofcfg->grp[i].off; in ksz90x1_of_config_group()
122 regval |= ofcfg->grp[i].dflt << offset; in ksz90x1_of_config_group()
126 max = (1 << ofcfg->grp[i].size) - 1; in ksz90x1_of_config_group()
/openbmc/u-boot/drivers/pinctrl/mediatek/
H A Dpinctrl-mtk-common.c266 const struct mtk_group_desc *grp = in mtk_pinmux_group_set() local
270 for (i = 0; i < grp->num_pins; i++) { in mtk_pinmux_group_set()
271 int *pin_modes = grp->data; in mtk_pinmux_group_set()
273 mtk_hw_set_value(dev, grp->pins[i], PINCTRL_PIN_REG_MODE, in mtk_pinmux_group_set()
401 const struct mtk_group_desc *grp = in mtk_pinconf_group_set() local
405 for (i = 0; i < grp->num_pins; i++) { in mtk_pinconf_group_set()
406 ret = mtk_pinconf_set(dev, grp->pins[i], param, arg); in mtk_pinconf_group_set()
/openbmc/openbmc/meta-openembedded/meta-oe/recipes-support/daemontools/daemontools/
H A Dwarnings.patch16 +#include <grp.h>
47 +#include <grp.h>
/openbmc/pam-ipmi/src/pam_ipmisave/
H A Dpam_ipmisave.c661 struct group *grp; in pam_sm_chauthtok() local
664 grp = pam_modutil_getgrnam(pamh, spec_grp_name); in pam_sm_chauthtok()
665 if (grp != NULL) { in pam_sm_chauthtok()
666 while (*(grp->gr_mem) != NULL) { in pam_sm_chauthtok()
667 if (strcmp(user, *grp->gr_mem) == 0) { in pam_sm_chauthtok()
671 (grp->gr_mem)++; in pam_sm_chauthtok()
/openbmc/u-boot/drivers/net/mscc_eswitch/
H A Dmscc_xfer.c61 u8 grp = 0; /* Recv everything on CPU group 0 */ in mscc_recv() local
66 BIT(grp))) in mscc_recv()
/openbmc/u-boot/drivers/pinctrl/renesas/
H A Dpfc.c512 const struct sh_pfc_pin_group *grp = &priv->pfc.info->groups[group_selector]; in sh_pfc_pinctrl_group_set() local
516 for (i = 0; i < grp->nr_pins; ++i) { in sh_pfc_pinctrl_group_set()
517 int idx = sh_pfc_get_pin_index(pfc, grp->pins[i]); in sh_pfc_pinctrl_group_set()
526 for (i = 0; i < grp->nr_pins; ++i) { in sh_pfc_pinctrl_group_set()
527 ret = sh_pfc_config_mux(pfc, grp->mux[i], PINMUX_TYPE_FUNCTION); in sh_pfc_pinctrl_group_set()
721 const struct sh_pfc_pin_group *grp = &pfc->info->groups[group_selector]; in sh_pfc_pinconf_group_set() local
724 for (i = 0; i < grp->nr_pins; i++) in sh_pfc_pinconf_group_set()
725 sh_pfc_pinconf_set(pmx, grp->pins[i], param, arg); in sh_pfc_pinconf_group_set()

123