1*2b4ffbf6SChris Packham /* SPDX-License-Identifier: GPL-2.0 */ 2*2b4ffbf6SChris Packham /* 3*2b4ffbf6SChris Packham * Copyright (C) Marvell International Ltd. and its affiliates 4*2b4ffbf6SChris Packham */ 5*2b4ffbf6SChris Packham 6*2b4ffbf6SChris Packham #ifndef _MV_DDR_SYS_ENV_LIB_H 7*2b4ffbf6SChris Packham #define _MV_DDR_SYS_ENV_LIB_H 8*2b4ffbf6SChris Packham 9*2b4ffbf6SChris Packham #include "ddr_ml_wrapper.h" 10*2b4ffbf6SChris Packham 11*2b4ffbf6SChris Packham /* device revision */ 12*2b4ffbf6SChris Packham #define DEV_ID_REG 0x18238 13*2b4ffbf6SChris Packham #define DEV_VERSION_ID_REG 0x1823c 14*2b4ffbf6SChris Packham #define REVISON_ID_OFFS 8 15*2b4ffbf6SChris Packham #define REVISON_ID_MASK 0xf00 16*2b4ffbf6SChris Packham 17*2b4ffbf6SChris Packham #define MPP_CONTROL_REG(id) (0x18000 + (id * 4)) 18*2b4ffbf6SChris Packham #define GPP_DATA_OUT_REG(grp) (MV_GPP_REGS_BASE(grp) + 0x00) 19*2b4ffbf6SChris Packham #define GPP_DATA_OUT_EN_REG(grp) (MV_GPP_REGS_BASE(grp) + 0x04) 20*2b4ffbf6SChris Packham #define GPP_DATA_IN_REG(grp) (MV_GPP_REGS_BASE(grp) + 0x10) 21*2b4ffbf6SChris Packham #define MV_GPP_REGS_BASE(unit) (0x18100 + ((unit) * 0x40)) 22*2b4ffbf6SChris Packham 23*2b4ffbf6SChris Packham #define MPP_REG_NUM(GPIO_NUM) (GPIO_NUM / 8) 24*2b4ffbf6SChris Packham #define MPP_MASK(GPIO_NUM) (0xf << 4 * (GPIO_NUM - \ 25*2b4ffbf6SChris Packham (MPP_REG_NUM(GPIO_NUM) * 8))); 26*2b4ffbf6SChris Packham #define GPP_REG_NUM(GPIO_NUM) (GPIO_NUM / 32) 27*2b4ffbf6SChris Packham #define GPP_MASK(GPIO_NUM) (1 << GPIO_NUM % 32) 28*2b4ffbf6SChris Packham 29*2b4ffbf6SChris Packham /* device ID */ 30*2b4ffbf6SChris Packham /* Board ID numbers */ 31*2b4ffbf6SChris Packham #define MARVELL_BOARD_ID_MASK 0x10 32*2b4ffbf6SChris Packham 33*2b4ffbf6SChris Packham /* Customer boards for A38x */ 34*2b4ffbf6SChris Packham #define A38X_CUSTOMER_BOARD_ID_BASE 0x0 35*2b4ffbf6SChris Packham #define A38X_CUSTOMER_BOARD_ID0 (A38X_CUSTOMER_BOARD_ID_BASE + 0) 36*2b4ffbf6SChris Packham #define A38X_CUSTOMER_BOARD_ID1 (A38X_CUSTOMER_BOARD_ID_BASE + 1) 37*2b4ffbf6SChris Packham #define A38X_MV_MAX_CUSTOMER_BOARD_ID (A38X_CUSTOMER_BOARD_ID_BASE + 2) 38*2b4ffbf6SChris Packham #define A38X_MV_CUSTOMER_BOARD_NUM (A38X_MV_MAX_CUSTOMER_BOARD_ID - \ 39*2b4ffbf6SChris Packham A38X_CUSTOMER_BOARD_ID_BASE) 40*2b4ffbf6SChris Packham 41*2b4ffbf6SChris Packham /* Marvell boards for A38x */ 42*2b4ffbf6SChris Packham #define A38X_MARVELL_BOARD_ID_BASE 0x10 43*2b4ffbf6SChris Packham #define RD_NAS_68XX_ID (A38X_MARVELL_BOARD_ID_BASE + 0) 44*2b4ffbf6SChris Packham #define DB_68XX_ID (A38X_MARVELL_BOARD_ID_BASE + 1) 45*2b4ffbf6SChris Packham #define RD_AP_68XX_ID (A38X_MARVELL_BOARD_ID_BASE + 2) 46*2b4ffbf6SChris Packham #define DB_AP_68XX_ID (A38X_MARVELL_BOARD_ID_BASE + 3) 47*2b4ffbf6SChris Packham #define DB_GP_68XX_ID (A38X_MARVELL_BOARD_ID_BASE + 4) 48*2b4ffbf6SChris Packham #define DB_BP_6821_ID (A38X_MARVELL_BOARD_ID_BASE + 5) 49*2b4ffbf6SChris Packham #define DB_AMC_6820_ID (A38X_MARVELL_BOARD_ID_BASE + 6) 50*2b4ffbf6SChris Packham #define A38X_MV_MAX_MARVELL_BOARD_ID (A38X_MARVELL_BOARD_ID_BASE + 7) 51*2b4ffbf6SChris Packham #define A38X_MV_MARVELL_BOARD_NUM (A38X_MV_MAX_MARVELL_BOARD_ID - \ 52*2b4ffbf6SChris Packham A38X_MARVELL_BOARD_ID_BASE) 53*2b4ffbf6SChris Packham 54*2b4ffbf6SChris Packham /* Marvell boards for A39x */ 55*2b4ffbf6SChris Packham #define A39X_MARVELL_BOARD_ID_BASE 0x30 56*2b4ffbf6SChris Packham #define A39X_DB_69XX_ID (A39X_MARVELL_BOARD_ID_BASE + 0) 57*2b4ffbf6SChris Packham #define A39X_RD_69XX_ID (A39X_MARVELL_BOARD_ID_BASE + 1) 58*2b4ffbf6SChris Packham #define A39X_MV_MAX_MARVELL_BOARD_ID (A39X_MARVELL_BOARD_ID_BASE + 2) 59*2b4ffbf6SChris Packham #define A39X_MV_MARVELL_BOARD_NUM (A39X_MV_MAX_MARVELL_BOARD_ID - \ 60*2b4ffbf6SChris Packham A39X_MARVELL_BOARD_ID_BASE) 61*2b4ffbf6SChris Packham 62*2b4ffbf6SChris Packham struct board_wakeup_gpio { 63*2b4ffbf6SChris Packham u32 board_id; 64*2b4ffbf6SChris Packham int gpio_num; 65*2b4ffbf6SChris Packham }; 66*2b4ffbf6SChris Packham 67*2b4ffbf6SChris Packham enum suspend_wakeup_status { 68*2b4ffbf6SChris Packham SUSPEND_WAKEUP_DISABLED, 69*2b4ffbf6SChris Packham SUSPEND_WAKEUP_ENABLED, 70*2b4ffbf6SChris Packham SUSPEND_WAKEUP_ENABLED_GPIO_DETECTED, 71*2b4ffbf6SChris Packham }; 72*2b4ffbf6SChris Packham 73*2b4ffbf6SChris Packham /* 74*2b4ffbf6SChris Packham * GPIO status indication for Suspend Wakeup: 75*2b4ffbf6SChris Packham * If suspend to RAM is supported and GPIO inidcation is implemented, 76*2b4ffbf6SChris Packham * set the gpio number 77*2b4ffbf6SChris Packham * If suspend to RAM is supported but GPIO indication is not implemented 78*2b4ffbf6SChris Packham * set '-2' 79*2b4ffbf6SChris Packham * If suspend to RAM is not supported set '-1' 80*2b4ffbf6SChris Packham */ 81*2b4ffbf6SChris Packham #ifdef CONFIG_CUSTOMER_BOARD_SUPPORT 82*2b4ffbf6SChris Packham #ifdef CONFIG_ARMADA_38X 83*2b4ffbf6SChris Packham #define MV_BOARD_WAKEUP_GPIO_INFO { \ 84*2b4ffbf6SChris Packham {A38X_CUSTOMER_BOARD_ID0, -1 }, \ 85*2b4ffbf6SChris Packham {A38X_CUSTOMER_BOARD_ID0, -1 }, \ 86*2b4ffbf6SChris Packham }; 87*2b4ffbf6SChris Packham #else 88*2b4ffbf6SChris Packham #define MV_BOARD_WAKEUP_GPIO_INFO { \ 89*2b4ffbf6SChris Packham {A39X_CUSTOMER_BOARD_ID0, -1 }, \ 90*2b4ffbf6SChris Packham {A39X_CUSTOMER_BOARD_ID0, -1 }, \ 91*2b4ffbf6SChris Packham }; 92*2b4ffbf6SChris Packham #endif /* CONFIG_ARMADA_38X */ 93*2b4ffbf6SChris Packham 94*2b4ffbf6SChris Packham #else 95*2b4ffbf6SChris Packham 96*2b4ffbf6SChris Packham #ifdef CONFIG_ARMADA_38X 97*2b4ffbf6SChris Packham #define MV_BOARD_WAKEUP_GPIO_INFO { \ 98*2b4ffbf6SChris Packham {RD_NAS_68XX_ID, -2 }, \ 99*2b4ffbf6SChris Packham {DB_68XX_ID, -1 }, \ 100*2b4ffbf6SChris Packham {RD_AP_68XX_ID, -2 }, \ 101*2b4ffbf6SChris Packham {DB_AP_68XX_ID, -2 }, \ 102*2b4ffbf6SChris Packham {DB_GP_68XX_ID, -2 }, \ 103*2b4ffbf6SChris Packham {DB_BP_6821_ID, -2 }, \ 104*2b4ffbf6SChris Packham {DB_AMC_6820_ID, -2 }, \ 105*2b4ffbf6SChris Packham }; 106*2b4ffbf6SChris Packham #else 107*2b4ffbf6SChris Packham #define MV_BOARD_WAKEUP_GPIO_INFO { \ 108*2b4ffbf6SChris Packham {A39X_RD_69XX_ID, -1 }, \ 109*2b4ffbf6SChris Packham {A39X_DB_69XX_ID, -1 }, \ 110*2b4ffbf6SChris Packham }; 111*2b4ffbf6SChris Packham #endif /* CONFIG_ARMADA_38X */ 112*2b4ffbf6SChris Packham #endif /* CONFIG_CUSTOMER_BOARD_SUPPORT */ 113*2b4ffbf6SChris Packham 114*2b4ffbf6SChris Packham enum suspend_wakeup_status mv_ddr_sys_env_suspend_wakeup_check(void); 115*2b4ffbf6SChris Packham u32 mv_ddr_sys_env_get_cs_ena_from_reg(void); 116*2b4ffbf6SChris Packham 117*2b4ffbf6SChris Packham #endif /* _MV_DDR_SYS_ENV_LIB_H */ 118