/openbmc/linux/drivers/gpu/drm/amd/display/dc/dce120/ |
H A D | dce120_timing_generator.c | 177 uint32_t field = get_reg_field_value( in dce120_timing_generator_get_vblank_counter() 194 position->horizontal_count = get_reg_field_value(value, in dce120_timing_generator_get_crtc_position() 197 position->vertical_count = get_reg_field_value(value, in dce120_timing_generator_get_crtc_position() 205 position->nominal_vcount = get_reg_field_value(value, in dce120_timing_generator_get_crtc_position() 256 get_reg_field_value(value_crtc_vtotal, in dce120_timing_generator_setup_global_swap_lock() 319 if (get_reg_field_value(pol_value, in dce120_timing_generator_enable_reset_trigger() 379 return get_reg_field_value(value, in dce120_timing_generator_did_triggered_reset_occur() 610 *v_blank_end = get_reg_field_value(v_blank_start_end, in dce120_timing_generator_get_crtc_scanoutpos() 717 if (get_reg_field_value( in dce120_tg_is_blanked() 721 get_reg_field_value( in dce120_tg_is_blanked() [all …]
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H A D | dce120_hw_sequencer.c | 115 chunk_int = get_reg_field_value( 120 chunk_mul = get_reg_field_value(
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H A D | dce120_resource.c | 670 straps->audio_stream_number = get_reg_field_value(reg_val, in read_dce_straps() 673 straps->hdmi_disable = get_reg_field_value(reg_val, in read_dce_straps() 678 straps->dc_pinstraps_audio = get_reg_field_value(reg_val, in read_dce_straps()
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/openbmc/linux/drivers/gpu/drm/amd/display/dc/dce110/ |
H A D | dce110_timing_generator.c | 200 struc_en = get_reg_field_value( 205 struc_stereo_sel_ovr = get_reg_field_value( 517 uint32_t field = get_reg_field_value( in dce110_timing_generator_get_vblank_counter() 546 position->vertical_count = get_reg_field_value( in dce110_timing_generator_get_position() 582 *v_blank_start = get_reg_field_value(value, in dce110_timing_generator_get_crtc_scanoutpos() 585 *v_blank_end = get_reg_field_value(value, in dce110_timing_generator_get_crtc_scanoutpos() 1506 if (get_reg_field_value(pol_value, in dce110_timing_generator_enable_reset_trigger() 1782 bool force = get_reg_field_value(value, in dce110_timing_generator_did_triggered_reset_occur() 1785 bool vert_sync = get_reg_field_value(value1, in dce110_timing_generator_did_triggered_reset_occur() 1972 if (get_reg_field_value( in dce110_tg_is_blanked() [all …]
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H A D | dce110_timing_generator_v.c | 148 field = get_reg_field_value(value, CRTCV_STATUS, CRTC_V_BLANK); in dce110_timing_generator_v_is_in_vertical_blank() 162 h1 = get_reg_field_value( in dce110_timing_generator_v_is_counter_moving() 167 v1 = get_reg_field_value( in dce110_timing_generator_v_is_counter_moving() 174 h2 = get_reg_field_value( in dce110_timing_generator_v_is_counter_moving() 179 v2 = get_reg_field_value( in dce110_timing_generator_v_is_counter_moving() 606 uint32_t field = get_reg_field_value( in dce110_timing_generator_v_get_vblank_counter()
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H A D | dce110_compressor.c | 120 if (get_reg_field_value( in wait_for_fbc_state_changed() 273 if (get_reg_field_value(value, FBC_STATUS, FBC_ENABLE_STATUS)) { in dce110_compressor_is_fbc_enabled_in_hw() 280 if (get_reg_field_value(value, FBC_MISC, FBC_STOP_ON_HFLIP_EVENT)) { in dce110_compressor_is_fbc_enabled_in_hw() 283 if (get_reg_field_value(value, FBC_CNTL, FBC_GRPH_COMP_EN)) { in dce110_compressor_is_fbc_enabled_in_hw()
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H A D | dce110_opp_regamma_v.c | 72 if (get_reg_field_value(value, in power_on_lut() 75 get_reg_field_value(value, in power_on_lut()
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H A D | dce110_transform_v.c | 192 get_reg_field_value(value, SCLV_MODE, SCL_MODE), in setup_scaling_configuration() 197 get_reg_field_value(value, SCLV_MODE, SCL_PSCL_EN), in setup_scaling_configuration() 308 if (get_reg_field_value( in program_multi_taps_filter()
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H A D | dce110_opp_csc_v.c | 115 bool use_set_a = (get_reg_field_value(cntl_value, in program_color_matrix_v() 556 use_set_a = get_reg_field_value( in program_input_csc()
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/openbmc/linux/drivers/gpu/drm/amd/display/dc/dce112/ |
H A D | dce112_hw_sequencer.c | 79 chunk_int = get_reg_field_value( in dce112_init_pte() 84 chunk_mul = get_reg_field_value( in dce112_init_pte()
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H A D | dce112_compressor.c | 300 if (get_reg_field_value( in wait_for_fbc_state_changed() 447 if (get_reg_field_value(value, FBC_STATUS, FBC_ENABLE_STATUS)) { in dce112_compressor_is_fbc_enabled_in_hw() 454 if (get_reg_field_value(value, FBC_MISC, FBC_STOP_ON_HFLIP_EVENT)) { in dce112_compressor_is_fbc_enabled_in_hw() 457 if (get_reg_field_value(value, FBC_CNTL, FBC_GRPH_COMP_EN)) { in dce112_compressor_is_fbc_enabled_in_hw() 473 return get_reg_field_value( in dce112_compressor_is_lpt_enabled_in_hw() 628 channels = get_reg_field_value(value_control, in dce112_compressor_enable_lpt()
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/openbmc/linux/drivers/gpu/drm/amd/display/dc/dce/ |
H A D | dce_aux.c | 100 uint32_t field = get_reg_field_value( in is_engine_available() 113 uint32_t field = get_reg_field_value( in acquire_engine() 121 field = get_reg_field_value(value, in acquire_engine() 166 field = get_reg_field_value( in acquire_engine() 378 *returned_bytes = get_reg_field_value(value, in get_channel_status()
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H A D | dce_audio.c | 451 field = get_reg_field_value(value, in dce_aud_az_configure() 975 port_connectivity = get_reg_field_value(value, in dce_aud_endpoint_valid()
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/openbmc/linux/drivers/gpu/drm/amd/display/dc/dce60/ |
H A D | dce60_timing_generator.c | 187 field = get_reg_field_value(value, CRTC_CONTROL, in dce60_is_tg_enabled()
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/openbmc/linux/drivers/gpu/drm/amd/display/dc/irq/dce80/ |
H A D | irq_service_dce80.c | 47 get_reg_field_value( in hpd_ack()
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/openbmc/linux/drivers/gpu/drm/amd/display/dc/irq/dce120/ |
H A D | irq_service_dce120.c | 47 get_reg_field_value( in hpd_ack()
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/openbmc/linux/drivers/gpu/drm/amd/display/dc/irq/dce60/ |
H A D | irq_service_dce60.c | 56 get_reg_field_value( in hpd_ack()
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/openbmc/linux/drivers/gpu/drm/amd/display/dc/irq/dcn303/ |
H A D | irq_service_dcn303.c | 65 uint32_t current_status = get_reg_field_value(value, HPD0_DC_HPD_INT_STATUS, DC_HPD_SENSE_DELAYED); in hpd_ack()
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/openbmc/linux/drivers/gpu/drm/amd/display/dc/irq/dcn201/ |
H A D | irq_service_dcn201.c | 90 get_reg_field_value( in hpd_ack()
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/openbmc/linux/drivers/gpu/drm/amd/display/dc/ |
H A D | dm_services.h | 96 #define get_reg_field_value(reg_value, reg_name, reg_field)\ macro
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/openbmc/linux/drivers/gpu/drm/amd/display/dc/irq/dcn10/ |
H A D | irq_service_dcn10.c | 139 get_reg_field_value( in hpd_ack()
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/openbmc/linux/drivers/gpu/drm/amd/display/dc/irq/dcn20/ |
H A D | irq_service_dcn20.c | 142 get_reg_field_value( in hpd_ack()
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/openbmc/linux/drivers/gpu/drm/amd/display/dc/irq/dce110/ |
H A D | irq_service_dce110.c | 47 uint32_t current_status = get_reg_field_value(value, in hpd_ack()
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/openbmc/linux/drivers/gpu/drm/amd/display/dc/irq/dcn302/ |
H A D | irq_service_dcn302.c | 133 uint32_t current_status = get_reg_field_value(value, HPD0_DC_HPD_INT_STATUS, DC_HPD_SENSE_DELAYED); in hpd_ack()
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/openbmc/linux/drivers/gpu/drm/amd/display/dc/irq/dcn21/ |
H A D | irq_service_dcn21.c | 144 get_reg_field_value( in hpd_ack()
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