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Searched refs:fpscr (Results 1 – 25 of 69) sorted by relevance

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/openbmc/linux/arch/powerpc/include/asm/
H A Dkvm_fpu.h14 extern void fps_fres(u64 *fpscr, u32 *dst, u32 *src1);
15 extern void fps_frsqrte(u64 *fpscr, u32 *dst, u32 *src1);
16 extern void fps_fsqrts(u64 *fpscr, u32 *dst, u32 *src1);
18 extern void fps_fadds(u64 *fpscr, u32 *dst, u32 *src1, u32 *src2);
19 extern void fps_fdivs(u64 *fpscr, u32 *dst, u32 *src1, u32 *src2);
20 extern void fps_fmuls(u64 *fpscr, u32 *dst, u32 *src1, u32 *src2);
21 extern void fps_fsubs(u64 *fpscr, u32 *dst, u32 *src1, u32 *src2);
23 extern void fps_fmadds(u64 *fpscr, u32 *dst, u32 *src1, u32 *src2,
25 extern void fps_fmsubs(u64 *fpscr, u32 *dst, u32 *src1, u32 *src2,
27 extern void fps_fnmadds(u64 *fpscr, u32 *dst, u32 *src1, u32 *src2,
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/openbmc/linux/arch/arm/vfp/
H A Dvfpsingle.c69 #define vfp_single_normaliseround(sd,vsd,fpscr,except,func) __vfp_single_normaliseround(sd,vsd,fpsc… argument
70 u32 __vfp_single_normaliseround(int sd, struct vfp_single *vs, u32 fpscr, u32 exceptions) in __vfp_single_normaliseround() argument
72 u32 vfp_single_normaliseround(int sd, struct vfp_single *vs, u32 fpscr, u32 exceptions, const char … in __vfp_single_normaliseround()
134 rmode = fpscr & FPSCR_RMODE_MASK; in __vfp_single_normaliseround()
216 struct vfp_single *vsm, u32 fpscr) in vfp_propagate_nan() argument
226 if (fpscr & FPSCR_DEFAULT_NAN) in vfp_propagate_nan()
259 static u32 vfp_single_fabs(int sd, int unused, s32 m, u32 fpscr) in vfp_single_fabs() argument
265 static u32 vfp_single_fcpy(int sd, int unused, s32 m, u32 fpscr) in vfp_single_fcpy() argument
271 static u32 vfp_single_fneg(int sd, int unused, s32 m, u32 fpscr) in vfp_single_fneg() argument
316 static u32 vfp_single_fsqrt(int sd, int unused, s32 m, u32 fpscr) in vfp_single_fsqrt() argument
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H A Dvfpdouble.c70 u32 vfp_double_normaliseround(int dd, struct vfp_double *vd, u32 fpscr, u32 exceptions, const char … in vfp_double_normaliseround() argument
129 rmode = fpscr & FPSCR_RMODE_MASK; in vfp_double_normaliseround()
208 struct vfp_double *vdm, u32 fpscr) in vfp_propagate_nan() argument
218 if (fpscr & FPSCR_DEFAULT_NAN) in vfp_propagate_nan()
250 static u32 vfp_double_fabs(int dd, int unused, int dm, u32 fpscr) in vfp_double_fabs() argument
256 static u32 vfp_double_fcpy(int dd, int unused, int dm, u32 fpscr) in vfp_double_fcpy() argument
262 static u32 vfp_double_fneg(int dd, int unused, int dm, u32 fpscr) in vfp_double_fneg() argument
268 static u32 vfp_double_fsqrt(int dd, int unused, int dm, u32 fpscr) in vfp_double_fsqrt() argument
279 ret = vfp_propagate_nan(vdp, &vdm, NULL, fpscr); in vfp_double_fsqrt()
349 return vfp_double_normaliseround(dd, &vdd, fpscr, 0, "fsqrt"); in vfp_double_fsqrt()
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H A Dvfpmodule.c112 vfp->hard.fpscr = FPSCR_ROUND_NEAREST; in vfp_thread_flush()
243 static void vfp_raise_exceptions(u32 exceptions, u32 inst, u32 fpscr, struct pt_regs *regs) in vfp_raise_exceptions() argument
261 fpscr &= ~(FPSCR_N|FPSCR_Z|FPSCR_C|FPSCR_V); in vfp_raise_exceptions()
263 fpscr |= exceptions; in vfp_raise_exceptions()
265 fmxr(FPSCR, fpscr); in vfp_raise_exceptions()
268 if (exceptions & stat && fpscr & en) \ in vfp_raise_exceptions()
287 static u32 vfp_emulate_instruction(u32 inst, u32 fpscr, struct pt_regs *regs) in vfp_emulate_instruction() argument
291 pr_debug("VFP: emulate: INST=0x%08x SCR=0x%08x\n", inst, fpscr); in vfp_emulate_instruction()
299 exceptions = vfp_single_cpdo(inst, fpscr); in vfp_emulate_instruction()
301 exceptions = vfp_double_cpdo(inst, fpscr); in vfp_emulate_instruction()
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H A Dvfpinstr.h101 u32 vfp_single_cpdo(u32 inst, u32 fpscr);
102 u32 vfp_single_cprt(u32 inst, u32 fpscr, struct pt_regs *regs);
104 u32 vfp_double_cpdo(u32 inst, u32 fpscr);
H A Dvfp.h245 #define vfp_single_normaliseround(sd,vsd,fpscr,except,func) __vfp_single_normaliseround(sd,vsd,fpsc… argument
246 u32 __vfp_single_normaliseround(int sd, struct vfp_single *vs, u32 fpscr, u32 exceptions);
248 u32 vfp_single_normaliseround(int sd, struct vfp_single *vs, u32 fpscr, u32 exceptions, const char …
343 u32 vfp_double_normaliseround(int dd, struct vfp_double *vd, u32 fpscr, u32 exceptions, const char …
373 u32 (* const fn)(int dd, int dn, int dm, u32 fpscr);
/openbmc/linux/arch/powerpc/math-emu/
H A Dmath.c170 u32 fpscr; in record_exception() local
172 fpscr = __FPU_FPSCR; in record_exception()
175 fpscr |= FPSCR_FX; in record_exception()
177 fpscr |= FPSCR_OX; in record_exception()
179 fpscr |= FPSCR_UX; in record_exception()
181 fpscr |= FPSCR_ZX; in record_exception()
183 fpscr |= FPSCR_XX; in record_exception()
185 fpscr |= FPSCR_VX; in record_exception()
187 fpscr |= FPSCR_VXSNAN; in record_exception()
189 fpscr |= FPSCR_VXISI; in record_exception()
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H A Dmtfsf.c13 u32 fpscr; in mtfsf() local
30 fpscr = ((__FPU_FPSCR & ~mask) | (frB[1] & mask)) & in mtfsf()
33 if (fpscr & (FPSCR_VXSNAN | FPSCR_VXISI | FPSCR_VXIDI | in mtfsf()
36 fpscr |= FPSCR_VX; in mtfsf()
42 if (fpscr & (fpscr >> 22) & 0xf8) in mtfsf()
43 fpscr |= FPSCR_FEX; in mtfsf()
45 __FPU_FPSCR = fpscr; in mtfsf()
H A Dfctiwz.c15 u32 fpscr; in fctiwz() local
18 fpscr = __FPU_FPSCR; in fctiwz()
26 __FPU_FPSCR = fpscr; in fctiwz()
/openbmc/linux/arch/sh/kernel/cpu/sh4/
H A Dfpu.c230 if ((tsk->thread.xstate->hardfpu.fpscr & FPSCR_CAUSE_ERROR)) in ieee_fpe_handler()
242 int fpscr; in ieee_fpe_handler() local
250 fpscr = tsk->thread.xstate->hardfpu.fpscr; in ieee_fpe_handler()
251 prec = fpscr & FPSCR_DBL_PRECISION; in ieee_fpe_handler()
253 if ((fpscr & FPSCR_CAUSE_ERROR) in ieee_fpe_handler()
266 } else if ((fpscr & FPSCR_CAUSE_ERROR) in ieee_fpe_handler()
280 int fpscr; in ieee_fpe_handler() local
288 fpscr = tsk->thread.xstate->hardfpu.fpscr; in ieee_fpe_handler()
289 prec = fpscr & FPSCR_DBL_PRECISION; in ieee_fpe_handler()
291 if ((fpscr & FPSCR_CAUSE_ERROR) in ieee_fpe_handler()
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/openbmc/linux/arch/powerpc/kvm/
H A Dbook3s_paired_singles.c493 void (*func)(u64 *fpscr, in kvmppc_ps_three_in() argument
513 func(&vcpu->arch.fp.fpscr, &ps0_out, &ps0_in1, &ps0_in2, &ps0_in3); in kvmppc_ps_three_in()
530 func(&vcpu->arch.fp.fpscr, &qpr[reg_out], &ps1_in1, &ps1_in2, &ps1_in3); in kvmppc_ps_three_in()
541 void (*func)(u64 *fpscr, in kvmppc_ps_two_in() argument
562 func(&vcpu->arch.fp.fpscr, &ps0_out, &ps0_in1, &ps0_in2); in kvmppc_ps_two_in()
578 func(&vcpu->arch.fp.fpscr, &ps1_out, &ps1_in1, &ps1_in2); in kvmppc_ps_two_in()
604 func(&vcpu->arch.fp.fpscr, &ps0_out, &ps0_in); in kvmppc_ps_one_in()
613 func(&vcpu->arch.fp.fpscr, &qpr[reg_out], &ps1_in); in kvmppc_ps_one_in()
1101 fpd_fadds(&vcpu->arch.fp.fpscr, &cr, fpr_d, fpr_a, fpr_b); in kvmppc_emulate_paired_single()
1105 fpd_fsubs(&vcpu->arch.fp.fpscr, &cr, fpr_d, fpr_a, fpr_b); in kvmppc_emulate_paired_single()
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/openbmc/linux/arch/sh/kernel/cpu/sh2a/
H A Dfpu.c456 if ((tsk->thread.xstate->hardfpu.fpscr & FPSCR_FPU_ERROR)) { in ieee_fpe_handler()
467 int fpscr; in ieee_fpe_handler() local
475 fpscr = tsk->thread.xstate->hardfpu.fpscr; in ieee_fpe_handler()
476 prec = fpscr & (1 << 19); in ieee_fpe_handler()
478 if ((fpscr & FPSCR_FPU_ERROR) in ieee_fpe_handler()
494 } else if ((fpscr & FPSCR_FPU_ERROR) in ieee_fpe_handler()
510 int fpscr; in ieee_fpe_handler() local
518 fpscr = tsk->thread.xstate->hardfpu.fpscr; in ieee_fpe_handler()
519 prec = fpscr & (1 << 19); in ieee_fpe_handler()
521 if ((fpscr & FPSCR_FPU_ERROR) in ieee_fpe_handler()
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/openbmc/qemu/target/arm/tcg/
H A Dtranslate-m-nocp.c330 TCGv_i32 fpscr; in gen_M_fp_sysreg_write() local
344 fpscr = load_cpu_field_low32(vfp.fpsr); in gen_M_fp_sysreg_write()
345 tcg_gen_andi_i32(fpscr, fpscr, ~FPSR_NZCV_MASK); in gen_M_fp_sysreg_write()
346 tcg_gen_or_i32(fpscr, fpscr, tmp); in gen_M_fp_sysreg_write()
347 store_cpu_field_low32(fpscr, vfp.fpsr); in gen_M_fp_sysreg_write()
474 TCGv_i32 control, sfpa, fpscr; in gen_M_fp_sysreg_read() local
495 fpscr = load_cpu_field(v7m.fpdscr[M_REG_NS]); in gen_M_fp_sysreg_read()
496 gen_helper_vfp_set_fpscr(tcg_env, fpscr); in gen_M_fp_sysreg_read()
502 TCGv_i32 control, sfpa, fpscr, fpdscr; in gen_M_fp_sysreg_read() local
530 fpscr = tcg_temp_new_i32(); in gen_M_fp_sysreg_read()
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/openbmc/qemu/target/ppc/
H A Dfpu_helper.c165 env->fpscr = (env->fpscr & ~FP_FPRF) | fprf; \
177 env->fpscr |= FP_VX; in COMPUTE_FPRF()
179 env->fpscr |= FP_FX; in COMPUTE_FPRF()
180 if (env->fpscr & FP_VE) { in COMPUTE_FPRF()
182 env->fpscr |= FP_FEX; in COMPUTE_FPRF()
193 env->fpscr &= ~(FP_FR | FP_FI); in finish_invalid_op_arith()
194 if (!(env->fpscr & FP_VE)) { in finish_invalid_op_arith()
196 env->fpscr &= ~FP_FPCC; in finish_invalid_op_arith()
197 env->fpscr |= (FP_C | FP_FU); in finish_invalid_op_arith()
206 env->fpscr |= FP_VXSNAN; in float_invalid_op_vxsnan()
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H A Dcpu.c199 switch (env->fpscr & FP_RN) { in fpscr_set_rounding_mode()
230 env->fpscr = val; in ppc_store_fpscr()
231 env->fp_status.rebias_overflow = (FP_OE & env->fpscr) ? true : false; in ppc_store_fpscr()
232 env->fp_status.rebias_underflow = (FP_UE & env->fpscr) ? true : false; in ppc_store_fpscr()
/openbmc/qemu/tests/tcg/ppc64/
H A Dmffsce.c20 uint64_t frt, fpscr; in main() local
25 MFFS(fpscr); /* read the value that mffsce stored to cpu fpscr */ in main()
34 assert((fpscr & 0xff) == (test_value & 0x7)); in main()
H A Dmtfsf.c28 uint64_t fpscr; in main() local
45 MFFS(fpscr); in main()
46 assert((fpscr & FP_FI) != 0); in main()
/openbmc/qemu/target/sh4/
H A Dop_helper.c207 env->fpscr = val & FPSCR_MASK; in helper_ld_fpscr()
223 env->fpscr &= ~FPSCR_CAUSE_MASK; in update_fpscr()
227 env->fpscr |= FPSCR_CAUSE_V; in update_fpscr()
230 env->fpscr |= FPSCR_CAUSE_Z; in update_fpscr()
233 env->fpscr |= FPSCR_CAUSE_O; in update_fpscr()
236 env->fpscr |= FPSCR_CAUSE_U; in update_fpscr()
239 env->fpscr |= FPSCR_CAUSE_I; in update_fpscr()
243 env->fpscr |= (env->fpscr & FPSCR_CAUSE_MASK) in update_fpscr()
247 cause = (env->fpscr & FPSCR_CAUSE_MASK) >> FPSCR_CAUSE_SHIFT; in update_fpscr()
248 enable = (env->fpscr & FPSCR_ENABLE_MASK) >> FPSCR_ENABLE_SHIFT; in update_fpscr()
H A Dgdbstub.c57 return gdb_get_regl(mem_buf, env->fpscr); in superh_cpu_gdb_read_register()
59 if (env->fpscr & FPSCR_FR) { in superh_cpu_gdb_read_register()
116 env->fpscr = ldl_p(mem_buf); in superh_cpu_gdb_write_register()
119 if (env->fpscr & FPSCR_FR) { in superh_cpu_gdb_write_register()
/openbmc/qemu/target/ppc/translate/
H A Dfp-impl.c.inc483 /* FEX and VX need to be updated, so don't set fpscr directly */
490 TCGv_i64 fpscr = tcg_temp_new_i64();
493 tcg_gen_extu_tl_i64(fpscr, cpu_fpscr);
494 tcg_gen_andi_i64(fpscr_masked, fpscr, mask);
497 return fpscr;
500 static void store_fpscr_masked(TCGv_i64 fpscr, uint64_t clear_mask,
506 tcg_gen_andi_i64(fpscr_masked, fpscr, ~clear_mask);
541 TCGv_i64 fpscr;
546 fpscr = place_from_fpscr(a->rt, UINT64_MAX);
547 store_fpscr_masked(fpscr, FP_ENABLES, tcg_constant_i64(0), 0x0003);
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/openbmc/linux/arch/arm64/kernel/
H A Dsignal32.c28 compat_ulong_t fpscr; member
98 compat_ulong_t fpscr, fpexc; in compat_preserve_vfp_context() local
126 fpscr = (fpsimd->fpsr & VFP_FPSCR_STAT_MASK) | in compat_preserve_vfp_context()
128 __put_user_error(fpscr, &frame->ufp.fpscr, err); in compat_preserve_vfp_context()
147 compat_ulong_t fpscr; in compat_restore_vfp_context() local
168 __get_user_error(fpscr, &frame->ufp.fpscr, err); in compat_restore_vfp_context()
169 fpsimd.fpsr = fpscr & VFP_FPSCR_STAT_MASK; in compat_restore_vfp_context()
170 fpsimd.fpcr = fpscr & VFP_FPSCR_CTRL_MASK; in compat_restore_vfp_context()
/openbmc/linux/arch/powerpc/kernel/ptrace/
H A Dptrace-vsx.c32 buf[32] = target->thread.fp_state.fpscr; in fpr_get()
60 buf[32] = target->thread.fp_state.fpscr; in fpr_set()
69 target->thread.fp_state.fpscr = buf[32]; in fpr_set()
H A Dptrace-novsx.c25 BUILD_BUG_ON(offsetof(struct thread_fp_state, fpscr) != in fpr_get()
54 BUILD_BUG_ON(offsetof(struct thread_fp_state, fpscr) != in fpr_set()
H A Dptrace-fpu.c27 *data = child->thread.fp_state.fpscr; in ptrace_get_fpr()
53 child->thread.fp_state.fpscr = data; in ptrace_put_fpr()
/openbmc/linux/arch/sh/kernel/cpu/
H A Dfpu.c32 fp->fpscr = FPSCR_INIT; in init_fpu()
36 fp->fpscr = FPSCR_INIT; in init_fpu()

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