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Searched refs:flashes (Results 1 – 15 of 15) sorted by relevance

/openbmc/u-boot/doc/device-tree-bindings/leds/
H A Dcommon.txt13 "heartbeat" - LED "double" flashes at a load average based rate
15 "timer" - LED flashes at a fixed, configurable rate
/openbmc/u-boot/drivers/mtd/ubi/
H A DKconfig35 The default value should be OK for SLC NAND flashes, NOR flashes and
36 other flashes which have eraseblock life-cycle 100000 or more.
37 However, in case of MLC NAND flashes which typically have eraseblock
52 Valid Blocks) for the flashes' endurance lifetime. The maximum
/openbmc/u-boot/doc/SPI/
H A Dstatus.txt11 - Bank Address Register (Accessing flashes > 16Mbytes in 3-byte addressing)
/openbmc/qemu/include/hw/ssi/
H A Daspeed_smc.h81 AspeedSMCFlash flashes[ASPEED_SMC_CS_MAX];
84 AspeedSMCFlash flashes[ASPEED_SMC_CS_MAX]; global() member
/openbmc/u-boot/drivers/spi/
H A Daspeed_spi.c271 struct aspeed_spi_flash flashes[ASPEED_SPI_MAX_CS]; member
296 return &priv->flashes[cs]; in aspeed_spi_get_flash()
692 struct aspeed_spi_flash *flash = &priv->flashes[cs]; in aspeed_spi_controller_init()
700 flash->ahb_base = priv->flashes[0].ahb_base + 0x4000000; /* cs0 + 64MB */ in aspeed_spi_controller_init()
705 flash->ahb_base = priv->flashes[0].ahb_base + 0x4000000 * 2; /* cs0 + 128MB : use 64MB */ in aspeed_spi_controller_init()
719 struct aspeed_spi_flash *flash = &priv->flashes[cs]; in aspeed_spi_controller_init()
1612 struct aspeed_spi_flash *flash = &priv->flashes[cs]; in aspeed_spi_flash_set_segment()
/openbmc/u-boot/drivers/mtd/spi/
H A DKconfig78 bool "SFDP table parsing support for SPI NOR flashes"
82 SPI NOR flashes using Serial Flash Discoverable Parameters (SFDP)
/openbmc/u-boot/doc/
H A DREADME.ramboot-ppc85xx20 - In case the support to program the flashes on the board is not available.
H A DREADME.x86239 The board has two 8MB SPI flashes mounted, which are called SPI-0 and SPI-1 in
/openbmc/qemu/hw/ssi/
H A Daspeed_smc.c266 AspeedSMCFlash *fl = &s->flashes[cs]; in aspeed_smc_flash_set_segment_region()
1129 aspeed_smc_flash_update_ctrl(&s->flashes[cs], value); in aspeed_smc_write()
1179 object_initialize_child(obj, "flash[*]", &s->flashes[i], in aspeed_smc_instance_init()
1254 AspeedSMCFlash *fl = &s->flashes[i]; in aspeed_smc_realize()
/openbmc/qemu/hw/arm/
H A Daspeed_ast2400.c379 MemoryRegion *fmc0_mmio = &s->fmc.flashes[0].mmio; in aspeed_ast2400_soc_realize()
H A Daspeed_ast2600.c525 MemoryRegion *fmc0_mmio = &s->fmc.flashes[0].mmio; in aspeed_soc_ast2600_realize()
H A Daspeed_ast27x0.c937 MemoryRegion *fmc0_mmio = &s->fmc.flashes[0].mmio; in aspeed_soc_ast2700_realize()
/openbmc/u-boot/arch/arm/cpu/armv8/fsl-layerscape/
H A DKconfig375 bus for those flashes to support the full QSPI flash size.
/openbmc/u-boot/common/spl/
H A DKconfig799 bool "SFDP table parsing support for SPI NOR flashes"
803 SPI NOR flashes using Serial Flash Discoverable Parameters (SFDP)
/openbmc/u-boot/
H A DREADME2353 The default value should be OK for SLC NAND flashes, NOR flashes and
2354 other flashes which have eraseblock life-cycle 100000 or more.
2355 However, in case of MLC NAND flashes which typically have eraseblock
2368 (Number of Valid Blocks) for the flashes' endurance lifetime.