History log of /openbmc/linux/Documentation/devicetree/bindings/mtd/jedec,spi-nor.yaml (Results 1 – 11 of 11)
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Revision tags: v6.6.25, v6.6.24, v6.6.23, v6.6.16, v6.6.15, v6.6.14, v6.6.13, v6.6.12, v6.6.11, v6.6.10, v6.6.9, v6.6.8, v6.6.7, v6.6.6, v6.6.5, v6.6.4, v6.6.3, v6.6.2, v6.5.11, v6.6.1, v6.5.10, v6.6, v6.5.9, v6.5.8, v6.5.7, v6.5.6, v6.5.5, v6.5.4, v6.5.3, v6.5.2, v6.1.51, v6.5.1, v6.1.50, v6.5, v6.1.49, v6.1.48, v6.1.46, v6.1.45, v6.1.44, v6.1.43, v6.1.42, v6.1.41, v6.1.40, v6.1.39, v6.1.38, v6.1.37, v6.1.36, v6.4, v6.1.35
# 4b0cb4e7 16-Jun-2023 Miquel Raynal <miquel.raynal@bootlin.com>

dt-bindings: mtd: spi-nor: clarify the need for spi-nor compatibles

Most SPI NOR devices do not require a specific compatible, their ID can
in general be discovered with the JEDEC READ ID opcode. In

dt-bindings: mtd: spi-nor: clarify the need for spi-nor compatibles

Most SPI NOR devices do not require a specific compatible, their ID can
in general be discovered with the JEDEC READ ID opcode. In this case,
only the "jedec,spi-nor" generic compatible is expected. Clarify this
information in the compatible description to (i) help device-tree
writers and (ii) prevent further attempts to extend this list with
useless information.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20230616140054.2788684-1-miquel.raynal@bootlin.com
[ta: s/JEDEC/JEDEC SFDP for clarity and s/JEDEC READ ID/READ ID as
the opcode is not part of the JEDEC SFDP standard.]
Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org>

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# cfc2928c 30-Jun-2023 Amit Kumar Mahapatra <amit.kumar-mahapatra@amd.com>

dt-bindings: mtd: jedec, spi-nor: Add DT property to avoid setting SRWD bit in status register

If the WP# signal of the flash device is either not connected or is wrongly
tied to GND (that includes

dt-bindings: mtd: jedec, spi-nor: Add DT property to avoid setting SRWD bit in status register

If the WP# signal of the flash device is either not connected or is wrongly
tied to GND (that includes internal pull-downs), and the software sets the
status register write disable (SRWD) bit in the status register then the
status register permanently becomes read-only. To avoid this added a new
boolean DT property "no-wp". If this property is set in the DT then the
software avoids setting the SRWD during status register write operation.

Signed-off-by: Amit Kumar Mahapatra <amit.kumar-mahapatra@amd.com>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Michael Walle <michael@walle.cc>
Link: https://lore.kernel.org/r/20230630142233.63585-2-amit.kumar-mahapatra@amd.com
Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org>

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Revision tags: v6.1.34, v6.1.33, v6.1.32, v6.1.31, v6.1.30, v6.1.29, v6.1.28, v6.1.27, v6.1.26, v6.3, v6.1.25, v6.1.24, v6.1.23, v6.1.22, v6.1.21
# 1f79a611 17-Mar-2023 Rob Herring <robh@kernel.org>

dt-bindings: mtd: Drop unneeded quotes

Cleanup bindings dropping unneeded quotes. Once all these are fixed,
checking for this can be enabled in yamllint.

Signed-off-by: Rob Herring <robh@kernel.org

dt-bindings: mtd: Drop unneeded quotes

Cleanup bindings dropping unneeded quotes. Once all these are fixed,
checking for this can be enabled in yamllint.

Signed-off-by: Rob Herring <robh@kernel.org>
Acked-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Reviewed-by: Heiko Stuebner <heiko@sntech.de> #rockchip
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20230317233631.3968509-1-robh@kernel.org

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Revision tags: v6.1.20, v6.1.19, v6.1.18, v6.1.17, v6.1.16, v6.1.15, v6.1.14, v6.1.13, v6.2, v6.1.12
# a56cde41 14-Feb-2023 Geert Uytterhoeven <geert+renesas@glider.be>

dt-bindings: mtd: jedec,spi-nor: Document CPOL/CPHA support

SPI EEPROMs typically support both SPI Mode 0 (CPOL=CPHA=0) and Mode 3
(CPOL=CPHA=1). However, using the latter is currently flagged as a

dt-bindings: mtd: jedec,spi-nor: Document CPOL/CPHA support

SPI EEPROMs typically support both SPI Mode 0 (CPOL=CPHA=0) and Mode 3
(CPOL=CPHA=1). However, using the latter is currently flagged as an
error by "make dtbs_check", e.g.:

arch/arm/boot/dts/r8a7791-koelsch.dtb: flash@0: Unevaluated properties are not allowed ('spi-cpha', 'spi-cpol' were unexpected)
From schema: Documentation/devicetree/bindings/mtd/jedec,spi-nor.yaml

Fix this by documenting support for CPOL=CPHA=1.

Fixes: 233363aba72ac638 ("spi/panel: dt-bindings: drop CPHA and CPOL from common properties")
Cc: stable@vger.kernel.org
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Tudor Ambarus <tudor.ambarus@linaro.org>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/afe470603028db9374930b0c57464b1f6d52bdd3.1676384304.git.geert+renesas@glider.be

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Revision tags: v6.1.11, v6.1.10, v6.1.9, v6.1.8, v6.1.7, v6.1.6, v6.1.5, v6.0.19, v6.0.18, v6.1.4, v6.1.3, v6.0.17, v6.1.2, v6.0.16, v6.1.1, v6.0.15, v6.0.14, v6.0.13, v6.1, v6.0.12, v6.0.11, v6.0.10, v5.15.80, v6.0.9, v5.15.79
# e9a399ca 14-Nov-2022 Miquel Raynal <miquel.raynal@bootlin.com>

dt-bindings: mtd: spi-nor: Drop common properties

When redefining common properties does not bring any additional
information, just drop them from the SPI-NOR bindings because these
properties alrea

dt-bindings: mtd: spi-nor: Drop common properties

When redefining common properties does not bring any additional
information, just drop them from the SPI-NOR bindings because these
properties already are definied in mtd.yaml.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/linux-mtd/20221114090315.848208-10-miquel.raynal@bootlin.com

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Revision tags: v6.0.8, v5.15.78, v6.0.7, v5.15.77, v5.15.76, v6.0.6, v6.0.5, v5.15.75, v6.0.4, v6.0.3, v6.0.2, v5.15.74, v5.15.73, v6.0.1, v5.15.72, v6.0, v5.15.71, v5.15.70, v5.15.69, v5.15.68, v5.15.67, v5.15.66
# 7f2937ef 08-Sep-2022 Sai Krishna Potthuri <sai.krishna.potthuri@amd.com>

dt-bindings: mtd: spi-nor: Add reset-gpios property

SPI-NOR flashes have RESET pin which can be toggled using GPIO
controller, for those platforms reset-gpios property can be used to
reset the flash

dt-bindings: mtd: spi-nor: Add reset-gpios property

SPI-NOR flashes have RESET pin which can be toggled using GPIO
controller, for those platforms reset-gpios property can be used to
reset the flash device.

Signed-off-by: Sai Krishna Potthuri <sai.krishna.potthuri@amd.com>
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20220908064428.2962-2-sai.krishna.potthuri@amd.com

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Revision tags: v5.15.65, v5.15.64, v5.15.63, v5.15.62, v5.15.61, v5.15.60, v5.15.59, v5.19, v5.15.58, v5.15.57, v5.15.56, v5.15.55, v5.15.54, v5.15.53, v5.15.52, v5.15.51, v5.15.50, v5.15.49, v5.15.48, v5.15.47, v5.15.46, v5.15.45, v5.15.44, v5.15.43, v5.15.42, v5.18, v5.15.41, v5.15.40, v5.15.39, v5.15.38, v5.15.37, v5.15.36, v5.15.35, v5.15.34, v5.15.33
# 9547c4e7 08-Apr-2022 Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>

dt-bindings: mtd: jedec, spi-nor: remove unneeded properties

After conversion the jedec,spi-nor DT schema to reference other schemas
(SPI and MTD) and use unevaluatedProperties, few properties are
r

dt-bindings: mtd: jedec, spi-nor: remove unneeded properties

After conversion the jedec,spi-nor DT schema to reference other schemas
(SPI and MTD) and use unevaluatedProperties, few properties are
redundant.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Pratyush Yadav <p.yadav@ti.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20220408063720.12826-1-krzysztof.kozlowski@linaro.org

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Revision tags: v5.15.32, v5.15.31, v5.17, v5.15.30, v5.15.29, v5.15.28, v5.15.27, v5.15.26, v5.15.25, v5.15.24, v5.15.23, v5.15.22, v5.15.21, v5.15.20, v5.15.19, v5.15.18, v5.15.17
# b252ada2 26-Jan-2022 Miquel Raynal <miquel.raynal@bootlin.com>

dt-bindings: mtd: spi-nor: Allow two CS per device

The Xilinx QSPI controller has two advanced modes which allow the
controller to behave differently and consider two flashes as one single
storage.

dt-bindings: mtd: spi-nor: Allow two CS per device

The Xilinx QSPI controller has two advanced modes which allow the
controller to behave differently and consider two flashes as one single
storage.

One of these two modes is quite complex to support from a binding point
of view and is the dual parallel memories. In this mode, each byte of
data is stored in both devices: the even bits in one, the odd bits in
the other. The split is automatically handled by the QSPI controller and
is transparent for the user.

The other mode is simpler to support, it is called dual stacked
memories. The controller shares the same SPI bus but each of the devices
contain half of the data. Once in this mode, the controller does not
follow CS requests but instead internally wires the two CS levels with
the value of the most significant address bit.

Supporting these two modes will involve core changes which include the
possibility of providing two CS for a single SPI device

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Acked-by: Rob Herring <robh@kernel.org>
Reviewed-by: Pratyush Yadav <p.yadav@ti.com>
Link: https://lore.kernel.org/r/20220126112608.955728-2-miquel.raynal@bootlin.com
Signed-off-by: Mark Brown <broonie@kernel.org>

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Revision tags: v5.4.173, v5.15.16, v5.15.15, v5.16, v5.15.10, v5.15.9, v5.15.8, v5.15.7, v5.15.6, v5.15.5, v5.15.4, v5.15.3, v5.15.2
# e9d7c323 09-Nov-2021 Pratyush Yadav <p.yadav@ti.com>

dt-bindings: mtd: spi-nor: Add a reference to spi-peripheral-props.yaml

The spi-peripheral-props.yaml schema contains peripheral-specific
properties for SPI controllers that should be present in the

dt-bindings: mtd: spi-nor: Add a reference to spi-peripheral-props.yaml

The spi-peripheral-props.yaml schema contains peripheral-specific
properties for SPI controllers that should be present in the peripheral
node. Add a reference to that so its constraints are followed.

additionalProperties: false cannot be used since it marks the controller
properties as unknown. Use unevaluatedProperties: false instead. This
has the side effect of allowing extra properties that are not specified
in the schema. The alternative is to list all the controller properties
in this schema but that would mean every peripheral binding would have
to repeat the same set of properties for each controller.

Signed-off-by: Pratyush Yadav <p.yadav@ti.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20211109181911.2251-4-p.yadav@ti.com
Signed-off-by: Mark Brown <broonie@kernel.org>

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Revision tags: v5.15.1, v5.15, v5.14.14, v5.14.13, v5.14.12, v5.14.11, v5.14.10, v5.14.9, v5.14.8, v5.14.7, v5.14.6, v5.10.67, v5.10.66, v5.14.5, v5.14.4, v5.10.65, v5.14.3, v5.10.64, v5.14.2, v5.10.63, v5.14.1, v5.10.62, v5.14, v5.10.61, v5.10.60, v5.10.53, v5.10.52, v5.10.51, v5.10.50, v5.10.49, v5.13, v5.10.46, v5.10.43, v5.10.42, v5.10.41, v5.10.40, v5.10.39, v5.4.119, v5.10.36, v5.10.35, v5.10.34, v5.4.116, v5.10.33, v5.12
# 96d3af22 24-Apr-2021 Michael Walle <michael@walle.cc>

dt-bindings: mtd: spi-nor: add otp property

SPI-NOR flashes may have OTP regions and have a nvmem binding. This
binding is described in mtd.yaml.

Signed-off-by: Michael Walle <michael@walle.cc>
Rev

dt-bindings: mtd: spi-nor: add otp property

SPI-NOR flashes may have OTP regions and have a nvmem binding. This
binding is described in mtd.yaml.

Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20210424110608.15748-5-michael@walle.cc

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Revision tags: v5.10.32, v5.10.31, v5.10.30, v5.10.27, v5.10.26, v5.10.25, v5.10.24, v5.10.23, v5.10.22, v5.10.21, v5.10.20, v5.10.19, v5.4.101, v5.10.18, v5.10.17, v5.11, v5.10.16, v5.10.15, v5.10.14
# 3ff9ee2a 02-Feb-2021 Rob Herring <robh@kernel.org>

dt-bindings: mtd: spi-nor: Convert to DT schema format

Convert the SPI-NOR binding to DT schema format. Like other memory chips,
the compatible strings are a mess with vendor prefixes not being used

dt-bindings: mtd: spi-nor: Convert to DT schema format

Convert the SPI-NOR binding to DT schema format. Like other memory chips,
the compatible strings are a mess with vendor prefixes not being used
consistently and some compatibles not documented. The resulting schema
passes on 'compatible' checks for most in tree users with the exception
of some oddballs.

I dropped the 'm25p.*-nonjedec' compatible strings as these don't appear
to be used anywhere.

Cc: Miquel Raynal <miquel.raynal@bootlin.com>
Cc: Richard Weinberger <richard@nod.at>
Cc: Vignesh Raghavendra <vigneshr@ti.com>
Cc: linux-mtd@lists.infradead.org
Signed-off-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20210202175340.3902494-1-robh@kernel.org

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