1ec8f24b7SThomas Gleixner# SPDX-License-Identifier: GPL-2.0-only 28ac326fcSBrian Norrismenuconfig MTD_SPI_NOR 31ac71ec0STudor Ambarus tristate "SPI NOR device support" 4b199489dSHuang Shijie depends on MTD 5b35b9a10SBoris Brezillon depends on MTD && SPI_MASTER 6b35b9a10SBoris Brezillon select SPI_MEM 7b199489dSHuang Shijie help 8b199489dSHuang Shijie This is the framework for the SPI NOR which can be used by the SPI 91ac71ec0STudor Ambarus device drivers and the SPI NOR device driver. 10e43b2061SBrian Norris 11e43b2061SBrian Norrisif MTD_SPI_NOR 12e43b2061SBrian Norris 1357cf26c1SRafał Miłeckiconfig MTD_SPI_NOR_USE_4K_SECTORS 1457cf26c1SRafał Miłecki bool "Use small 4096 B erase sectors" 1557cf26c1SRafał Miłecki default y 1657cf26c1SRafał Miłecki help 1757cf26c1SRafał Miłecki Many flash memories support erasing small (4096 B) sectors. Depending 1857cf26c1SRafał Miłecki on the usage this feature may provide performance gain in comparison 1957cf26c1SRafał Miłecki to erasing whole blocks (32/64 KiB). 2057cf26c1SRafał Miłecki Changing a small part of the flash's contents is usually faster with 2157cf26c1SRafał Miłecki small sectors. On the other hand erasing should be faster when using 2257cf26c1SRafał Miłecki 64 KiB block instead of 16 × 4 KiB sectors. 2357cf26c1SRafał Miłecki 2457cf26c1SRafał Miłecki Please note that some tools/drivers/filesystems may not work with 2557cf26c1SRafał Miłecki 4096 B erase size (e.g. UBIFS requires 15 KiB as a minimum). 2657cf26c1SRafał Miłecki 27*31ad3effSMichael Wallechoice 28*31ad3effSMichael Walle prompt "Software write protection at boot" 29*31ad3effSMichael Walle default MTD_SPI_NOR_SWP_DISABLE_ON_VOLATILE 30*31ad3effSMichael Walle 31*31ad3effSMichael Walleconfig MTD_SPI_NOR_SWP_DISABLE 32*31ad3effSMichael Walle bool "Disable SWP on any flashes (legacy behavior)" 33*31ad3effSMichael Walle help 34*31ad3effSMichael Walle This option disables the software write protection on any SPI 35*31ad3effSMichael Walle flashes at boot-up. 36*31ad3effSMichael Walle 37*31ad3effSMichael Walle Depending on the flash chip this either clears the block protection 38*31ad3effSMichael Walle bits or does a "Global Unprotect" command. 39*31ad3effSMichael Walle 40*31ad3effSMichael Walle Don't use this if you intent to use the software write protection 41*31ad3effSMichael Walle of your SPI flash. This is only to keep backwards compatibility. 42*31ad3effSMichael Walle 43*31ad3effSMichael Walleconfig MTD_SPI_NOR_SWP_DISABLE_ON_VOLATILE 44*31ad3effSMichael Walle bool "Disable SWP on flashes w/ volatile protection bits" 45*31ad3effSMichael Walle help 46*31ad3effSMichael Walle Some SPI flashes have volatile block protection bits, ie. after a 47*31ad3effSMichael Walle power-up or a reset the flash is software write protected by 48*31ad3effSMichael Walle default. 49*31ad3effSMichael Walle 50*31ad3effSMichael Walle This option disables the software write protection for these kind 51*31ad3effSMichael Walle of flashes while keeping it enabled for any other SPI flashes 52*31ad3effSMichael Walle which have non-volatile write protection bits. 53*31ad3effSMichael Walle 54*31ad3effSMichael Walle If the software write protection will be disabled depending on 55*31ad3effSMichael Walle the flash either the block protection bits are cleared or a 56*31ad3effSMichael Walle "Global Unprotect" command is issued. 57*31ad3effSMichael Walle 58*31ad3effSMichael Walle If you are unsure, select this option. 59*31ad3effSMichael Walle 60*31ad3effSMichael Walleconfig MTD_SPI_NOR_SWP_KEEP 61*31ad3effSMichael Walle bool "Keep software write protection as is" 62*31ad3effSMichael Walle help 63*31ad3effSMichael Walle If you select this option the software write protection of any 64*31ad3effSMichael Walle SPI flashes will not be changed. If your flash is software write 65*31ad3effSMichael Walle protected or will be automatically software write protected after 66*31ad3effSMichael Walle power-up you have to manually unlock it before you are able to 67*31ad3effSMichael Walle write to it. 68*31ad3effSMichael Walle 69*31ad3effSMichael Walleendchoice 70*31ad3effSMichael Walle 71a0900d01SBoris Brezillonsource "drivers/mtd/spi-nor/controllers/Kconfig" 728afda8b2SMika Westerberg 73e43b2061SBrian Norrisendif # MTD_SPI_NOR 74