| /openbmc/u-boot/board/xilinx/zynqmp/ |
| H A D | tap_delays.c | 65 void zynqmp_dll_reset(u8 deviceid) in zynqmp_dll_reset() argument
68 if (deviceid == 0) in zynqmp_dll_reset()
78 if (deviceid == 0) in zynqmp_dll_reset()
84 static void arasan_zynqmp_tap_sdr104(u8 deviceid, u8 timing, u8 bank) in arasan_zynqmp_tap_sdr104() argument
86 if (deviceid == 0) { in arasan_zynqmp_tap_sdr104()
105 static void arasan_zynqmp_tap_hs(u8 deviceid, u8 timing, u8 bank) in arasan_zynqmp_tap_hs() argument
107 if (deviceid == 0) { in arasan_zynqmp_tap_hs()
142 static void arasan_zynqmp_tap_ddr50(u8 deviceid, u8 timing, u8 bank) in arasan_zynqmp_tap_ddr50() argument
144 if (deviceid == 0) { in arasan_zynqmp_tap_ddr50()
187 static void arasan_zynqmp_tap_sdr50(u8 deviceid, u8 timing, u8 bank) in arasan_zynqmp_tap_sdr50() argument
[all …]
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| /openbmc/qemu/hw/i3c/ |
| H A D | trace-events | 8 dw_i3c_read(uint32_t deviceid, uint64_t offset, uint64_t data) "I3C Dev[%u] read: offset 0x%" PRIx6…
9 dw_i3c_write(uint32_t deviceid, uint64_t offset, uint64_t data) "I3C Dev[%u] write: offset 0x%" PRI…
10 dw_i3c_send(uint32_t deviceid, uint32_t num_bytes) "I3C Dev[%u] send %" PRId32 " bytes to bus"
11 dw_i3c_recv_data(uint32_t deviceid, uint32_t num_bytes) "I3C Dev[%u] recv %" PRId32 " bytes from bu…
12 dw_i3c_ibi_recv(uint32_t deviceid, uint8_t ibi_byte) "I3C Dev[%u] recv IBI byte 0x%" PRIx8
13 dw_i3c_ibi_handle(uint32_t deviceid, uint8_t addr, bool rnw) "I3C Dev[%u] handle IBI from address 0…
14 dw_i3c_reset(uint32_t deviceid) "I3C Dev[%u] reset"
15 dw_i3c_pop_rx(uint32_t deviceid, uint32_t data) "I3C Dev[%u] pop 0x%" PRIx32 " from RX FIFO"
16 dw_i3c_resp_queue_push(uint32_t deviceid, uint32_t data) "I3C Dev[%u] push 0x%" PRIx32 " to respons…
17 dw_i3c_push_tx(uint32_t deviceid, uint32_t data) "I3C Dev[%u] push 0x%" PRIx32 " to TX FIFO"
[all …]
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| /openbmc/u-boot/drivers/mmc/ |
| H A D | zynq_sdhci.c | 28 u8 deviceid; member
58 static void arasan_zynqmp_dll_reset(struct sdhci_host *host, u8 deviceid) in arasan_zynqmp_dll_reset() argument
68 zynqmp_dll_reset(deviceid); in arasan_zynqmp_dll_reset()
95 u8 deviceid; in arasan_sdhci_execute_tuning() local
100 deviceid = priv->deviceid; in arasan_sdhci_execute_tuning()
108 arasan_zynqmp_dll_reset(host, deviceid); in arasan_sdhci_execute_tuning()
154 arasan_zynqmp_dll_reset(host, deviceid); in arasan_sdhci_execute_tuning()
174 arasan_zynqmp_set_tapdelay(priv->deviceid, uhsmode, in arasan_sdhci_set_tapdelay()
303 priv->deviceid = dev_read_u32_default(dev, "xlnx,device_id", -1); in arasan_sdhci_ofdata_to_platdata()
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| /openbmc/u-boot/include/ |
| H A D | zynqmp_tap_delay.h | 12 void zynqmp_dll_reset(u8 deviceid);
15 inline void zynqmp_dll_reset(u8 deviceid) {} in zynqmp_dll_reset() argument
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| /openbmc/qemu/tests/qtest/ |
| H A D | riscv-iommu-test.c | 44 uint16_t vendorid, deviceid, classid; in test_pci_config() local
47 deviceid = qpci_config_readw(dev, PCI_DEVICE_ID); in test_pci_config()
51 g_assert_cmpuint(deviceid, ==, RISCV_IOMMU_PCI_DEVICE_ID); in test_pci_config()
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| /openbmc/u-boot/arch/arm/mach-omap2/am33xx/ |
| H A D | sys_info.c | 140 sil_rev = readl(&cdev->deviceid) >> 28; in am335x_get_efuse_mpu_max_freq()
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| /openbmc/u-boot/board/eets/pdu001/ |
| H A D | board.c | 141 sil_rev = readl(&cdev->deviceid) >> 28; in set_mpu_and_core_voltage()
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| /openbmc/u-boot/board/bosch/shc/ |
| H A D | board.c | 318 sil_rev = readl(&cdev->deviceid) >> 28; in am33xx_spl_board_init()
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| /openbmc/u-boot/board/vscom/baltos/ |
| H A D | board.c | 197 sil_rev = readl(&cdev->deviceid) >> 28; in am33xx_spl_board_init()
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| /openbmc/u-boot/arch/arm/include/asm/arch-am33xx/ |
| H A D | cpu.h | 494 unsigned int deviceid; /* offset 0x00 */ member
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| /openbmc/u-boot/board/ti/am335x/ |
| H A D | board.c | 442 sil_rev = readl(&cdev->deviceid) >> 28; in scale_vcores_generic()
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