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Searched refs:dcfclk_khz (Results 1 – 23 of 23) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn201/
H A Ddcn201_clk_mgr.c116 new_clocks->dcfclk_khz = (new_clocks->dcfclk_khz > (dc->debug.force_min_dcfclk_mhz * 1000)) ? in dcn201_update_clocks()
117 new_clocks->dcfclk_khz : (dc->debug.force_min_dcfclk_mhz * 1000); in dcn201_update_clocks()
119 if (should_set_clock(safe_to_lower, new_clocks->dcfclk_khz, clk_mgr_base->clks.dcfclk_khz)) in dcn201_update_clocks()
120 clk_mgr_base->clks.dcfclk_khz = new_clocks->dcfclk_khz; in dcn201_update_clocks()
/openbmc/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn10/
H A Drv1_clk_mgr.c230 || new_clocks->dcfclk_khz > clk_mgr_base->clks.dcfclk_khz) in rv1_update_clocks()
248 if (should_set_clock(safe_to_lower, new_clocks->dcfclk_khz, clk_mgr_base->clks.dcfclk_khz)) { in rv1_update_clocks()
249 clk_mgr_base->clks.dcfclk_khz = new_clocks->dcfclk_khz; in rv1_update_clocks()
268 pp_smu->set_hard_min_dcfclk_by_freq(&pp_smu->pp_smu, khz_to_mhz_ceil(new_clocks->dcfclk_khz)); in rv1_update_clocks()
288 pp_smu->set_hard_min_dcfclk_by_freq(&pp_smu->pp_smu, khz_to_mhz_ceil(new_clocks->dcfclk_khz)); in rv1_update_clocks()
/openbmc/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn20/
H A Ddcn20_clk_mgr.c259 new_clocks->dcfclk_khz = (new_clocks->dcfclk_khz > (dc->debug.force_min_dcfclk_mhz * 1000)) ? in dcn2_update_clocks()
260 new_clocks->dcfclk_khz : (dc->debug.force_min_dcfclk_mhz * 1000); in dcn2_update_clocks()
262 if (should_set_clock(safe_to_lower, new_clocks->dcfclk_khz, clk_mgr_base->clks.dcfclk_khz)) { in dcn2_update_clocks()
263 clk_mgr_base->clks.dcfclk_khz = new_clocks->dcfclk_khz; in dcn2_update_clocks()
265 …_smu->set_hard_min_dcfclk_by_freq(&pp_smu->pp_smu, khz_to_mhz_ceil(clk_mgr_base->clks.dcfclk_khz)); in dcn2_update_clocks()
357 if (should_set_clock(safe_to_lower, new_clocks->dcfclk_khz, clk_mgr->clks.dcfclk_khz)) { in dcn2_update_clocks_fpga()
358 clk_mgr->clks.dcfclk_khz = new_clocks->dcfclk_khz; in dcn2_update_clocks_fpga()
478 else if (a->dcfclk_khz != b->dcfclk_khz) in dcn2_are_clock_states_equal()
/openbmc/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn30/
H A Ddcn30_clk_mgr.c231 new_clocks->dcfclk_khz = (new_clocks->dcfclk_khz > (dc->debug.force_min_dcfclk_mhz * 1000)) ? in dcn3_update_clocks()
232 new_clocks->dcfclk_khz : (dc->debug.force_min_dcfclk_mhz * 1000); in dcn3_update_clocks()
234 if (should_set_clock(safe_to_lower, new_clocks->dcfclk_khz, clk_mgr_base->clks.dcfclk_khz)) { in dcn3_update_clocks()
235 clk_mgr_base->clks.dcfclk_khz = new_clocks->dcfclk_khz; in dcn3_update_clocks()
236 …0_smu_set_hard_min_by_freq(clk_mgr, PPCLK_DCEFCLK, khz_to_mhz_ceil(clk_mgr_base->clks.dcfclk_khz)); in dcn3_update_clocks()
442 else if (a->dcfclk_khz != b->dcfclk_khz) in dcn3_are_clock_states_equal()
/openbmc/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn31/
H A Ddcn31_clk_mgr.c201 if (should_set_clock(safe_to_lower, new_clocks->dcfclk_khz, clk_mgr_base->clks.dcfclk_khz)) { in dcn31_update_clocks()
202 clk_mgr_base->clks.dcfclk_khz = new_clocks->dcfclk_khz; in dcn31_update_clocks()
203 dcn31_smu_set_hard_min_dcfclk(clk_mgr, clk_mgr_base->clks.dcfclk_khz); in dcn31_update_clocks()
250 cmd.notify_clocks.clocks.dcfclk_khz = clk_mgr_base->clks.dcfclk_khz; in dcn31_update_clocks()
316 else if (a->dcfclk_khz != b->dcfclk_khz) in dcn31_are_clock_states_equal()
/openbmc/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn316/
H A Ddcn316_clk_mgr.c190 if (should_set_clock(safe_to_lower, new_clocks->dcfclk_khz, clk_mgr_base->clks.dcfclk_khz)) { in dcn316_update_clocks()
191 clk_mgr_base->clks.dcfclk_khz = new_clocks->dcfclk_khz; in dcn316_update_clocks()
192 dcn316_smu_set_hard_min_dcfclk(clk_mgr, clk_mgr_base->clks.dcfclk_khz); in dcn316_update_clocks()
241 cmd.notify_clocks.clocks.dcfclk_khz = clk_mgr_base->clks.dcfclk_khz; in dcn316_update_clocks()
/openbmc/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn315/
H A Ddcn315_clk_mgr.c182 new_clocks->dcfclk_khz = UNSUPPORTED_DCFCLK; in dcn315_update_clocks()
183 if (should_set_clock(safe_to_lower, new_clocks->dcfclk_khz, clk_mgr_base->clks.dcfclk_khz)) { in dcn315_update_clocks()
184 clk_mgr_base->clks.dcfclk_khz = new_clocks->dcfclk_khz; in dcn315_update_clocks()
185 dcn315_smu_set_hard_min_dcfclk(clk_mgr, clk_mgr_base->clks.dcfclk_khz); in dcn315_update_clocks()
237 cmd.notify_clocks.clocks.dcfclk_khz = clk_mgr_base->clks.dcfclk_khz; in dcn315_update_clocks()
/openbmc/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn314/
H A Ddcn314_clk_mgr.c229 if (should_set_clock(safe_to_lower, new_clocks->dcfclk_khz, clk_mgr_base->clks.dcfclk_khz)) { in dcn314_update_clocks()
230 clk_mgr_base->clks.dcfclk_khz = new_clocks->dcfclk_khz; in dcn314_update_clocks()
231 dcn314_smu_set_hard_min_dcfclk(clk_mgr, clk_mgr_base->clks.dcfclk_khz); in dcn314_update_clocks()
278 cmd.notify_clocks.clocks.dcfclk_khz = clk_mgr_base->clks.dcfclk_khz; in dcn314_update_clocks()
331 else if (a->dcfclk_khz != b->dcfclk_khz) in dcn314_are_clock_states_equal()
/openbmc/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/
H A Ddcn32_clk_mgr.c510 new_clocks->dcfclk_khz = (new_clocks->dcfclk_khz > (dc->debug.force_min_dcfclk_mhz * 1000)) ? in dcn32_update_clocks()
511 new_clocks->dcfclk_khz : (dc->debug.force_min_dcfclk_mhz * 1000); in dcn32_update_clocks()
513 if (should_set_clock(safe_to_lower, new_clocks->dcfclk_khz, clk_mgr_base->clks.dcfclk_khz) && in dcn32_update_clocks()
515 clk_mgr_base->clks.dcfclk_khz = new_clocks->dcfclk_khz; in dcn32_update_clocks()
516 …32_smu_set_hard_min_by_freq(clk_mgr, PPCLK_DCFCLK, khz_to_mhz_ceil(clk_mgr_base->clks.dcfclk_khz)); in dcn32_update_clocks()
891 else if (a->dcfclk_khz != b->dcfclk_khz) in dcn32_are_clock_states_equal()
/openbmc/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/
H A Drn_clk_mgr.c174 if (should_set_clock(safe_to_lower, new_clocks->dcfclk_khz, clk_mgr_base->clks.dcfclk_khz)) { in rn_update_clocks()
175 clk_mgr_base->clks.dcfclk_khz = new_clocks->dcfclk_khz; in rn_update_clocks()
176 rn_vbios_smu_set_hard_min_dcfclk(clk_mgr, clk_mgr_base->clks.dcfclk_khz); in rn_update_clocks()
535 else if (a->dcfclk_khz != b->dcfclk_khz) in rn_are_clock_states_equal()
/openbmc/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn301/
H A Dvg_clk_mgr.c142 …if (should_set_clock(safe_to_lower, new_clocks->dcfclk_khz, clk_mgr_base->clks.dcfclk_khz) && !dc-… in vg_update_clocks()
143 clk_mgr_base->clks.dcfclk_khz = new_clocks->dcfclk_khz; in vg_update_clocks()
144 dcn301_smu_set_hard_min_dcfclk(clk_mgr, clk_mgr_base->clks.dcfclk_khz); in vg_update_clocks()
472 else if (a->dcfclk_khz != b->dcfclk_khz) in vg_are_clock_states_equal()
/openbmc/linux/drivers/gpu/drm/amd/display/dc/core/
H A Ddc_debug.c353 context->bw_ctx.bw.dcn.clk.dcfclk_khz, in context_clock_trace()
361 context->bw_ctx.bw.dcn.clk.dcfclk_khz, in context_clock_trace()
H A Ddc.c4656 info->engineClock = (unsigned int)state->bw_ctx.bw.dcn.clk.dcfclk_khz; in get_clock_requirements_for_state()
/openbmc/linux/drivers/gpu/drm/amd/display/amdgpu_dm/
H A Damdgpu_dm_trace.h497 __field(int, dcfclk_khz)
515 __entry->dcfclk_khz = clk->dcfclk_khz;
540 __entry->dcfclk_khz,
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dml/dcn31/
H A Ddcn31_fpu.c501 context->bw_ctx.bw.dcn.clk.dcfclk_khz = dcfclk; // always should be vlevel 0 in dcn31_calculate_wm_and_dlg_fp()
559 context->bw_ctx.bw.dcn.clk.dcfclk_khz = 0; in dcn31_calculate_wm_and_dlg_fp()
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn10/
H A Ddcn10_hw_sequencer_debug.c476 dc->current_state->bw_ctx.bw.dcn.clk.dcfclk_khz, in dcn10_get_clock_states()
H A Ddcn10_hw_sequencer.c464 dc->current_state->bw_ctx.bw.dcn.clk.dcfclk_khz, in dcn10_log_hw_state()
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dml/calcs/
H A Ddcn_calcs.c1163 context->bw_ctx.bw.dcn.clk.dcfclk_khz = (int)(v->dcfclk * 1000); in dcn_validate_bandwidth()
1427 dc, DM_PP_CLOCK_TYPE_DCFCLK, clocks->dcfclk_khz); in dcn_find_dcfclk_suits_all()
/openbmc/linux/drivers/gpu/drm/amd/display/dc/
H A Ddc.h529 int dcfclk_khz; member
/openbmc/linux/drivers/gpu/drm/amd/display/dmub/inc/
H A Ddmub_cmd.h1402 uint32_t dcfclk_khz; /**< dcfclk kHz */ member
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn32/
H A Ddcn32_hwseq.c742 clocks->dcfclk_khz = dc->clk_mgr->bw_params->clk_table.entries[0].dcfclk_mhz * 1000; in dcn32_initialize_min_clocks()
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dml/dcn32/
H A Ddcn32_fpu.c1362 context->bw_ctx.bw.dcn.clk.dcfclk_khz = context->bw_ctx.dml.vba.DCFCLK * 1000; in dcn32_calculate_dlg_params()
1472 context->bw_ctx.bw.dcn.clk.dcfclk_khz = 0; in dcn32_calculate_dlg_params()
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dml/dcn20/
H A Ddcn20_fpu.c1148 context->bw_ctx.bw.dcn.clk.dcfclk_khz = context->bw_ctx.dml.vba.DCFCLK * 1000; in dcn20_calculate_dlg_params()