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Searched refs:ctrl_set (Results 1 – 7 of 7) sorted by relevance

/openbmc/qemu/hw/riscv/
H A Driscv-iommu.c1962 uint32_t ctrl_set = riscv_iommu_reg_get32(s, RISCV_IOMMU_REG_CQCSR); in riscv_iommu_process_cq_control() local
1964 bool enable = !!(ctrl_set & RISCV_IOMMU_CQCSR_CQEN); in riscv_iommu_process_cq_control()
1965 bool active = !!(ctrl_set & RISCV_IOMMU_CQCSR_CQON); in riscv_iommu_process_cq_control()
1974 ctrl_set = RISCV_IOMMU_CQCSR_CQON; in riscv_iommu_process_cq_control()
1980 ctrl_set = 0; in riscv_iommu_process_cq_control()
1983 ctrl_set = 0; in riscv_iommu_process_cq_control()
1987 riscv_iommu_reg_mod32(s, RISCV_IOMMU_REG_CQCSR, ctrl_set, ctrl_clr); in riscv_iommu_process_cq_control()
1993 uint32_t ctrl_set = riscv_iommu_reg_get32(s, RISCV_IOMMU_REG_FQCSR); in riscv_iommu_process_fq_control() local
1995 bool enable = !!(ctrl_set & RISCV_IOMMU_FQCSR_FQEN); in riscv_iommu_process_fq_control()
1996 bool active = !!(ctrl_set & RISCV_IOMMU_FQCSR_FQON); in riscv_iommu_process_fq_control()
[all …]
/openbmc/u-boot/include/linux/soc/ti/
H A Dti_sci_protocol.h252 u32 ctrl_set, u32 ctrl_clr);
/openbmc/u-boot/arch/arm/include/asm/arch-imx8m/
H A Dimx-regs.h156 u32 ctrl_set; member
/openbmc/u-boot/arch/arm/include/asm/arch-vf610/
H A Dimx-regs.h391 u32 ctrl_set; member
/openbmc/u-boot/arch/arm/include/asm/arch-mx6/
H A Dimx-regs.h728 u32 ctrl_set; member
/openbmc/u-boot/arch/arm/include/asm/arch-mx7ulp/
H A Dimx-regs.h949 u32 ctrl_set; member
/openbmc/u-boot/arch/arm/include/asm/arch-mx7/
H A Dimx-regs.h894 u32 ctrl_set; member