/openbmc/linux/drivers/gpu/drm/armada/ |
H A D | armada_plane.c | 145 u32 cfg, cfg_mask, val; in armada_drm_primary_plane_atomic_update() local 200 cfg_mask = CFG_GRAFORMAT | in armada_drm_primary_plane_atomic_update() 207 cfg_mask = CFG_GRA_ENA; in armada_drm_primary_plane_atomic_update() 209 cfg = cfg_mask = 0; in armada_drm_primary_plane_atomic_update() 213 cfg_mask |= CFG_GRA_HSMOOTH; in armada_drm_primary_plane_atomic_update() 219 if (cfg_mask) in armada_drm_primary_plane_atomic_update() 220 armada_reg_queue_mod(regs, idx, cfg, cfg_mask, in armada_drm_primary_plane_atomic_update()
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H A D | armada_overlay.c | 80 u32 cfg, cfg_mask, val; in armada_drm_overlay_plane_atomic_update() local 155 cfg_mask = CFG_CBSH_ENA | CFG_DMAFORMAT | in armada_drm_overlay_plane_atomic_update() 162 cfg_mask = CFG_DMA_ENA; in armada_drm_overlay_plane_atomic_update() 164 cfg = cfg_mask = 0; in armada_drm_overlay_plane_atomic_update() 168 cfg_mask |= CFG_DMA_HSMOOTH; in armada_drm_overlay_plane_atomic_update() 174 if (cfg_mask) in armada_drm_overlay_plane_atomic_update() 175 armada_reg_queue_mod(regs, idx, cfg, cfg_mask, in armada_drm_overlay_plane_atomic_update()
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/openbmc/linux/drivers/pinctrl/bcm/ |
H A D | pinctrl-bcm281xx.c | 1331 u32 cfg_val, cfg_mask; in bcm281xx_pinctrl_pin_config_set() local 1335 cfg_mask = 0; in bcm281xx_pinctrl_pin_config_set() 1342 num_configs, &cfg_val, &cfg_mask); in bcm281xx_pinctrl_pin_config_set() 1347 num_configs, &cfg_val, &cfg_mask); in bcm281xx_pinctrl_pin_config_set() 1352 num_configs, &cfg_val, &cfg_mask); in bcm281xx_pinctrl_pin_config_set() 1367 __func__, pdata->pins[pin].name, pin, cfg_val, cfg_mask); in bcm281xx_pinctrl_pin_config_set() 1369 rc = regmap_update_bits(pdata->regmap, offset, cfg_mask, cfg_val); in bcm281xx_pinctrl_pin_config_set()
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/openbmc/linux/drivers/net/wireless/realtek/rtw88/ |
H A D | main.c | 1155 u64 cfg_mask = GENMASK_ULL(63, 0); in rtw_rate_mask_cfg() local 1164 cfg_mask = mask->control[band].legacy; in rtw_rate_mask_cfg() 1167 cfg_mask = u64_encode_bits(mask->control[band].legacy, in rtw_rate_mask_cfg() 1173 cfg_mask |= u64_encode_bits(mask->control[band].ht_mcs[0], in rtw_rate_mask_cfg() 1176 cfg_mask |= u64_encode_bits(mask->control[band].ht_mcs[1], in rtw_rate_mask_cfg() 1180 cfg_mask |= u64_encode_bits(mask->control[band].vht_mcs[0], in rtw_rate_mask_cfg() 1183 cfg_mask |= u64_encode_bits(mask->control[band].vht_mcs[1], in rtw_rate_mask_cfg() 1187 ra_mask &= cfg_mask; in rtw_rate_mask_cfg()
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/openbmc/qemu/hw/ppc/ |
H A D | ppc440_uc.c | 745 uint32_t cfg_mask; member 799 ret = s->cfg_mask; in dcr_read_pcie() 879 s->cfg_mask = val; in dcr_write_pcie()
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/openbmc/linux/drivers/net/ethernet/qlogic/qed/ |
H A D | qed_init_fw_funcs.c | 1398 u32 reg_val, cfg_mask; in qed_set_vxlan_no_l2_enable() local 1404 cfg_mask = BIT(PRS_ETH_VXLAN_NO_L2_ENABLE_OFFSET); in qed_set_vxlan_no_l2_enable() 1408 reg_val |= cfg_mask; in qed_set_vxlan_no_l2_enable() 1417 reg_val &= ~cfg_mask; in qed_set_vxlan_no_l2_enable()
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/openbmc/qemu/hw/virtio/ |
H A D | virtio-pci.c | 2044 struct virtio_pci_cfg_cap *cfg_mask; in virtio_pci_device_plugged() local 2071 cfg_mask = (void *)(proxy->pci_dev.wmask + proxy->config_cap); in virtio_pci_device_plugged() 2072 pci_set_byte(&cfg_mask->cap.bar, ~0x0); in virtio_pci_device_plugged() 2073 pci_set_long((uint8_t *)&cfg_mask->cap.offset, ~0x0); in virtio_pci_device_plugged() 2074 pci_set_long((uint8_t *)&cfg_mask->cap.length, ~0x0); in virtio_pci_device_plugged() 2075 pci_set_long(cfg_mask->pci_cfg_data, ~0x0); in virtio_pci_device_plugged()
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/openbmc/linux/drivers/net/wireless/realtek/rtw89/ |
H A D | phy.c | 142 u64 cfg_mask; in rtw89_phy_ra_mask_cfg() local 150 cfg_mask = u64_encode_bits(mask->control[NL80211_BAND_2GHZ].legacy, in rtw89_phy_ra_mask_cfg() 155 cfg_mask = u64_encode_bits(mask->control[NL80211_BAND_5GHZ].legacy, in rtw89_phy_ra_mask_cfg() 160 cfg_mask = u64_encode_bits(mask->control[NL80211_BAND_6GHZ].legacy, in rtw89_phy_ra_mask_cfg() 169 cfg_mask |= u64_encode_bits(mask->control[band].he_mcs[0], in rtw89_phy_ra_mask_cfg() 171 cfg_mask |= u64_encode_bits(mask->control[band].he_mcs[1], in rtw89_phy_ra_mask_cfg() 174 cfg_mask |= u64_encode_bits(mask->control[band].vht_mcs[0], in rtw89_phy_ra_mask_cfg() 176 cfg_mask |= u64_encode_bits(mask->control[band].vht_mcs[1], in rtw89_phy_ra_mask_cfg() 179 cfg_mask |= u64_encode_bits(mask->control[band].ht_mcs[0], in rtw89_phy_ra_mask_cfg() 181 cfg_mask |= u64_encode_bits(mask->control[band].ht_mcs[1], in rtw89_phy_ra_mask_cfg() [all …]
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/openbmc/u-boot/drivers/net/ |
H A D | e1000.c | 4545 uint32_t cfg_mask = E1000_EEPROM_CFG_DONE; in e1000_get_phy_cfg_done() local 4557 cfg_mask = E1000_EEPROM_CFG_DONE_PORT_1; in e1000_get_phy_cfg_done() 4565 if (E1000_READ_REG(hw, I210_EEMNGCTL) & cfg_mask) in e1000_get_phy_cfg_done() 4568 if (E1000_READ_REG(hw, EEMNGCTL) & cfg_mask) in e1000_get_phy_cfg_done()
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/openbmc/linux/drivers/net/ethernet/intel/ice/ |
H A D | ice_common.c | 3498 u8 caps_mask, cfg_mask; in ice_phy_caps_equals_cfg() local 3508 cfg_mask = ICE_AQ_PHY_ENA_VALID_MASK & ~ICE_AQ_PHY_ENA_AUTO_LINK_UPDT; in ice_phy_caps_equals_cfg() 3512 ((phy_caps->caps & caps_mask) != (phy_cfg->caps & cfg_mask)) || in ice_phy_caps_equals_cfg()
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