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/openbmc/openpower-hw-diags/analyzer/
H A Dfilter-root-cause.cpp357 (0 == bit || 1 == bit || 2 == bit || 3 == bit || 4 == bit || in __findTiRootCause()
358 5 == bit || 7 == bit || 8 == bit || 9 == bit || 10 == bit || in __findTiRootCause()
378 (0 == bit || 1 == bit || 2 == bit || 8 == bit || 11 == bit || in __findTiRootCause()
387 (0 == bit || 1 == bit || 2 == bit || 3 == bit || 4 == bit || in __findTiRootCause()
388 5 == bit || 6 == bit || 7 == bit || 8 == bit || 9 == bit || in __findTiRootCause()
395 (0 == bit || 3 == bit || 5 == bit || 7 == bit || 36 == bit || in __findTiRootCause()
442 (0 == bit || 1 == bit || 3 == bit || 4 == bit || 5 == bit || in __findTiRootCause()
443 6 == bit || 7 == bit || 8 == bit || 9 == bit || 10 == bit || in __findTiRootCause()
457 (0 == bit || 2 == bit || 4 == bit || 7 == bit || 9 == bit || in __findTiRootCause()
483 (0 == bit || 1 == bit || 2 == bit || 3 == bit || 5 == bit || in __findTiRootCause()
[all …]
/openbmc/linux/drivers/clk/bcm/
H A Dclk-bcm63xx-gate.c18 u8 bit; member
32 .bit = BCM3368_CLK_MAC,
35 .bit = BCM3368_CLK_TC,
44 .bit = BCM3368_CLK_ACM,
47 .bit = BCM3368_CLK_SPI,
50 .bit = BCM3368_CLK_USBS,
53 .bit = BCM3368_CLK_BMU,
56 .bit = BCM3368_CLK_PCM,
59 .bit = BCM3368_CLK_NTP,
80 .bit = BCM3368_CLK_EPHY,
[all …]
/openbmc/u-boot/board/keymile/km_arm/
H A Dkwbimage_256M8_1.cfg52 # bit 2-0: 3, Reserved
53 # bit 5-3: 3, Reserved
54 # bit 6: 0, Reserved
56 # bit 10-8: 3, Reserved
57 # bit 13-11: 3, Reserved
58 # bit 14: 0, Reserved
83 # bit 31-20: ?,Reserved
199 # bit 15-12: 4, internal ODT time based on bit 7-4
201 # bit 19-16: 8, internal ODT de-assertion based on bit 11-8
206 # bit 3-0: 2, M_ODT assertion same as bit 11-8
[all …]
H A Dkwbimage_128M16_1.cfg52 # bit 2-0: 3, Reserved
53 # bit 5-3: 3, Reserved
54 # bit 6: 0, Reserved
56 # bit 10-8: 3, Reserved
57 # bit 13-11: 3, Reserved
58 # bit 14: 0, Reserved
65 # bit 7-4: 6, Reserve
199 # bit 15-12: 4, internal ODT time based on bit 7-4
201 # bit 19-16: 8, internal ODT de-assertion based on bit 11-8
206 # bit 3-0: 2, M_ODT assertion same as bit 11-8
[all …]
/openbmc/linux/arch/um/include/asm/
H A Dcpufeature.h34 (((bit)>>5)==(word) && (1UL<<((bit)&31) & maskname##word ))
37 test_cpu_cap(c, bit)
40 (__builtin_constant_p(bit) && REQUIRED_MASK_BIT_SET(bit) ? 1 : \
53 (__builtin_constant_p(bit) && DISABLED_MASK_BIT_SET(bit) ? 0 : static_cpu_has(bit))
55 #define boot_cpu_has(bit) cpu_has(&boot_cpu_data, bit) argument
66 #define setup_force_cpu_bug(bit) setup_force_cpu_cap(bit) argument
127 #define cpu_has_bug(c, bit) cpu_has(c, (bit)) argument
128 #define set_cpu_bug(c, bit) set_cpu_cap(c, (bit)) argument
130 #define static_cpu_has_bug(bit) static_cpu_has((bit)) argument
131 #define boot_cpu_has_bug(bit) cpu_has_bug(&boot_cpu_data, (bit)) argument
[all …]
/openbmc/linux/arch/x86/include/asm/
H A Dcpufeature.h65 (((bit)>>5)==(word) && (1UL<<((bit)&31) & maskname##word ))
127 (__builtin_constant_p(bit) && REQUIRED_MASK_BIT_SET(bit) ? 1 : \
131 (__builtin_constant_p(bit) && REQUIRED_MASK_BIT_SET(bit) ? 1 : \
144 (__builtin_constant_p(bit) && DISABLED_MASK_BIT_SET(bit) ? 0 : static_cpu_has(bit))
146 #define boot_cpu_has(bit) cpu_has(&boot_cpu_data, bit) argument
158 #define setup_force_cpu_bug(bit) setup_force_cpu_cap(bit) argument
200 #define cpu_has_bug(c, bit) cpu_has(c, (bit)) argument
201 #define set_cpu_bug(c, bit) set_cpu_cap(c, (bit)) argument
202 #define clear_cpu_bug(c, bit) clear_cpu_cap(c, (bit)) argument
204 #define static_cpu_has_bug(bit) static_cpu_has((bit)) argument
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/openbmc/linux/drivers/pmdomain/bcm/
H A Dbcm63xx-power.c34 uint8_t bit; member
143 pmd->mask = BIT(entry->bit); in bcm63xx_power_probe()
177 .bit = BCM6318_POWER_DOMAIN_PCIE,
180 .bit = BCM6318_POWER_DOMAIN_USB,
207 .bit = BCM6318_POWER_DOMAIN_PAD,
226 .bit = BCM6328_POWER_DOMAIN_SAR,
229 .bit = BCM6328_POWER_DOMAIN_PCM,
232 .bit = BCM6328_POWER_DOMAIN_USBD,
253 .bit = BCM6362_POWER_DOMAIN_SAR,
275 .bit = BCM6362_POWER_DOMAIN_PCM,
[all …]
/openbmc/linux/arch/nios2/include/asm/
H A Dasm-macros.h79 .if \bit > 31
82 .if \bit < 16
98 BT \reg1, \reg2, \bit
110 BT \reg1, \reg2, \bit
122 .if \bit > 31
125 .if \bit < 16
143 .if \bit > 31
146 .if \bit < 16
164 .if \bit > 31
167 .if \bit < 16
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/openbmc/linux/drivers/acpi/pmic/
H A Dintel_pmic_bxtwc.c31 .bit = VR_MODE_AUTO,
36 .bit = VR_MODE_AUTO,
171 .bit = BIT(2),
176 .bit = BIT(0),
244 .bit = 0,
249 .bit = 1
254 .bit = 2
259 .bit = 4
264 .bit = 5
269 .bit = 3
[all …]
H A Dintel_pmic_chtwc.c77 .bit = 0x01,
82 .bit = 0x07,
87 .bit = 0x01,
92 .bit = 0x07,
97 .bit = 0x07,
102 .bit = 0x07,
107 .bit = 0x01,
112 .bit = 0x07,
117 .bit = 0x07,
142 .bit = 0x07,
[all …]
H A Dintel_pmic_bytcrc.c28 .bit = 0x00,
33 .bit = 0x00,
38 .bit = 0x00,
43 .bit = 0x00,
48 .bit = 0x00,
53 .bit = 0x00,
58 .bit = 0x00,
68 .bit = 0x00,
78 .bit = 0x00,
83 .bit = 0x00,
[all …]
/openbmc/linux/Documentation/devicetree/bindings/mfd/
H A Dmc13xxx.txt55 sw1a : regulator SW1A (register 24, bit 0)
56 sw1b : regulator SW1B (register 25, bit 0)
57 sw2a : regulator SW2A (register 26, bit 0)
58 sw2b : regulator SW2B (register 27, bit 0)
60 vaudio : regulator VAUDIO (register 32, bit 0)
61 viohi : regulator VIOHI (register 32, bit 3)
62 violo : regulator VIOLO (register 32, bit 6)
86 sw1 : regulator SW1 (register 24, bit 0)
87 sw2 : regulator SW2 (register 25, bit 0)
88 sw3 : regulator SW3 (register 26, bit 0)
[all …]
/openbmc/linux/include/linux/
H A Dfind.h409 return bit; in find_next_and_bit_wrap()
412 return bit < offset ? bit : size; in find_next_and_bit_wrap()
434 return bit < offset ? bit : size; in find_next_bit_wrap()
460 return bit < start ? bit : size; in __for_each_wrap()
559 for ((bit) = 0; (bit) = find_next_bit((addr), (size), (bit)), (bit) < (size); (bit)++)
563 (bit) = find_next_and_bit((addr1), (addr2), (size), (bit)), (bit) < (size);\
568 (bit) = find_next_andnot_bit((addr1), (addr2), (size), (bit)), (bit) < (size);\
573 (bit) = find_next_or_bit((addr1), (addr2), (size), (bit)), (bit) < (size);\
578 for (; (bit) = find_next_bit((addr), (size), (bit)), (bit) < (size); (bit)++)
582 (bit) = find_next_zero_bit((addr), (size), (bit)), (bit) < (size); \
[all …]
H A Dtick.h212 enum tick_dep_bits bit);
214 enum tick_dep_bits bit);
216 enum tick_dep_bits bit);
228 tick_nohz_dep_set(bit); in tick_dep_set()
234 tick_nohz_dep_clear(bit); in tick_dep_clear()
240 tick_nohz_dep_set_cpu(cpu, bit); in tick_dep_set_cpu()
250 enum tick_dep_bits bit) in tick_dep_set_task() argument
256 enum tick_dep_bits bit) in tick_dep_clear_task() argument
262 enum tick_dep_bits bit) in tick_dep_set_signal() argument
268 enum tick_dep_bits bit) in tick_dep_clear_signal() argument
[all …]
H A Dwait_bit.h22 { .flags = word, .bit_nr = bit, }
29 void wake_up_bit(void *word, int bit);
74 if (!test_bit_acquire(bit, word)) in wait_on_bit()
99 if (!test_bit_acquire(bit, word)) in wait_on_bit_io()
126 if (!test_bit_acquire(bit, word)) in wait_on_bit_timeout()
154 if (!test_bit_acquire(bit, word)) in wait_on_bit_action()
182 if (!test_and_set_bit(bit, word)) in wait_on_bit_lock()
206 if (!test_and_set_bit(bit, word)) in wait_on_bit_lock_io()
233 if (!test_and_set_bit(bit, word)) in wait_on_bit_lock_action()
332 clear_bit_unlock(bit, word); in clear_and_wake_up_bit()
[all …]
/openbmc/u-boot/include/dt-bindings/mfd/
H A Dstm32f4-rcc.h34 #define STM32F4_AHB1_RESET(bit) (STM32F4_RCC_AHB1_##bit + (0x10 * 8)) argument
35 #define STM32F4_AHB1_CLOCK(bit) (STM32F4_RCC_AHB1_##bit) argument
44 #define STM32F4_AHB2_RESET(bit) (STM32F4_RCC_AHB2_##bit + (0x14 * 8)) argument
45 #define STM32F4_AHB2_CLOCK(bit) (STM32F4_RCC_AHB2_##bit + 0x20) argument
51 #define STM32F4_AHB3_RESET(bit) (STM32F4_RCC_AHB3_##bit + (0x18 * 8)) argument
52 #define STM32F4_AHB3_CLOCK(bit) (STM32F4_RCC_AHB3_##bit + 0x40) argument
81 #define STM32F4_APB1_RESET(bit) (STM32F4_RCC_APB1_##bit + (0x20 * 8)) argument
82 #define STM32F4_APB1_CLOCK(bit) (STM32F4_RCC_APB1_##bit + 0x80) argument
105 #define STM32F4_APB2_RESET(bit) (STM32F4_RCC_APB2_##bit + (0x24 * 8)) argument
106 #define STM32F4_APB2_CLOCK(bit) (STM32F4_RCC_APB2_##bit + 0xA0) argument
H A Dstm32f7-rcc.h33 #define STM32F7_AHB1_RESET(bit) (STM32F7_RCC_AHB1_##bit + (0x10 * 8)) argument
34 #define STM32F7_AHB1_CLOCK(bit) (STM32F7_RCC_AHB1_##bit) argument
44 #define STM32F7_AHB2_RESET(bit) (STM32F7_RCC_AHB2_##bit + (0x14 * 8)) argument
45 #define STM32F7_AHB2_CLOCK(bit) (STM32F7_RCC_AHB2_##bit + 0x20) argument
51 #define STM32F7_AHB3_RESET(bit) (STM32F7_RCC_AHB3_##bit + (0x18 * 8)) argument
52 #define STM32F7_AHB3_CLOCK(bit) (STM32F7_RCC_AHB3_##bit + 0x40) argument
85 #define STM32F7_APB1_RESET(bit) (STM32F7_RCC_APB1_##bit + (0x20 * 8)) argument
86 #define STM32F7_APB1_CLOCK(bit) (STM32F7_RCC_APB1_##bit + 0x80) argument
111 #define STM32F7_APB2_RESET(bit) (STM32F7_RCC_APB2_##bit + (0x24 * 8)) argument
112 #define STM32F7_APB2_CLOCK(bit) (STM32F7_RCC_APB2_##bit + 0xA0) argument
H A Dstm32h7-rcc.h17 #define STM32H7_AHB3_RESET(bit) (STM32H7_RCC_AHB3_##bit + (0x7C * 8)) argument
29 #define STM32H7_AHB1_RESET(bit) (STM32H7_RCC_AHB1_##bit + (0x80 * 8)) argument
38 #define STM32H7_AHB2_RESET(bit) (STM32H7_RCC_AHB2_##bit + (0x84 * 8)) argument
57 #define STM32H7_AHB4_RESET(bit) (STM32H7_RCC_AHB4_##bit + (0x88 * 8)) argument
64 #define STM32H7_APB3_RESET(bit) (STM32H7_RCC_APB3_##bit + (0x8C * 8)) argument
92 #define STM32H7_APB1L_RESET(bit) (STM32H7_RCC_APB1L_##bit + (0x90 * 8)) argument
101 #define STM32H7_APB1H_RESET(bit) (STM32H7_RCC_APB1H_##bit + (0x94 * 8)) argument
120 #define STM32H7_APB2_RESET(bit) (STM32H7_RCC_APB2_##bit + (0x98 * 8)) argument
136 #define STM32H7_APB4_RESET(bit) (STM32H7_RCC_APB4_##bit + (0x9C * 8)) argument
/openbmc/linux/include/dt-bindings/mfd/
H A Dstm32f4-rcc.h34 #define STM32F4_AHB1_RESET(bit) (STM32F4_RCC_AHB1_##bit + (0x10 * 8)) argument
35 #define STM32F4_AHB1_CLOCK(bit) (STM32F4_RCC_AHB1_##bit) argument
44 #define STM32F4_AHB2_RESET(bit) (STM32F4_RCC_AHB2_##bit + (0x14 * 8)) argument
45 #define STM32F4_AHB2_CLOCK(bit) (STM32F4_RCC_AHB2_##bit + 0x20) argument
51 #define STM32F4_AHB3_RESET(bit) (STM32F4_RCC_AHB3_##bit + (0x18 * 8)) argument
52 #define STM32F4_AHB3_CLOCK(bit) (STM32F4_RCC_AHB3_##bit + 0x40) argument
81 #define STM32F4_APB1_RESET(bit) (STM32F4_RCC_APB1_##bit + (0x20 * 8)) argument
82 #define STM32F4_APB1_CLOCK(bit) (STM32F4_RCC_APB1_##bit + 0x80) argument
105 #define STM32F4_APB2_RESET(bit) (STM32F4_RCC_APB2_##bit + (0x24 * 8)) argument
106 #define STM32F4_APB2_CLOCK(bit) (STM32F4_RCC_APB2_##bit + 0xA0) argument
H A Dstm32f7-rcc.h34 #define STM32F7_AHB1_RESET(bit) (STM32F7_RCC_AHB1_##bit + (0x10 * 8)) argument
35 #define STM32F7_AHB1_CLOCK(bit) (STM32F7_RCC_AHB1_##bit) argument
45 #define STM32F7_AHB2_RESET(bit) (STM32F7_RCC_AHB2_##bit + (0x14 * 8)) argument
46 #define STM32F7_AHB2_CLOCK(bit) (STM32F7_RCC_AHB2_##bit + 0x20) argument
52 #define STM32F7_AHB3_RESET(bit) (STM32F7_RCC_AHB3_##bit + (0x18 * 8)) argument
53 #define STM32F7_AHB3_CLOCK(bit) (STM32F7_RCC_AHB3_##bit + 0x40) argument
87 #define STM32F7_APB1_RESET(bit) (STM32F7_RCC_APB1_##bit + (0x20 * 8)) argument
88 #define STM32F7_APB1_CLOCK(bit) (STM32F7_RCC_APB1_##bit + 0x80) argument
112 #define STM32F7_APB2_RESET(bit) (STM32F7_RCC_APB2_##bit + (0x24 * 8)) argument
113 #define STM32F7_APB2_CLOCK(bit) (STM32F7_RCC_APB2_##bit + 0xA0) argument
H A Dstm32h7-rcc.h17 #define STM32H7_AHB3_RESET(bit) (STM32H7_RCC_AHB3_##bit + (0x7C * 8)) argument
28 #define STM32H7_AHB1_RESET(bit) (STM32H7_RCC_AHB1_##bit + (0x80 * 8)) argument
37 #define STM32H7_AHB2_RESET(bit) (STM32H7_RCC_AHB2_##bit + (0x84 * 8)) argument
56 #define STM32H7_AHB4_RESET(bit) (STM32H7_RCC_AHB4_##bit + (0x88 * 8)) argument
62 #define STM32H7_APB3_RESET(bit) (STM32H7_RCC_APB3_##bit + (0x8C * 8)) argument
90 #define STM32H7_APB1L_RESET(bit) (STM32H7_RCC_APB1L_##bit + (0x90 * 8)) argument
99 #define STM32H7_APB1H_RESET(bit) (STM32H7_RCC_APB1H_##bit + (0x94 * 8)) argument
118 #define STM32H7_APB2_RESET(bit) (STM32H7_RCC_APB2_##bit + (0x98 * 8)) argument
134 #define STM32H7_APB4_RESET(bit) (STM32H7_RCC_APB4_##bit + (0x9C * 8)) argument
/openbmc/linux/Documentation/devicetree/bindings/timer/
H A Drenesas,cmt.yaml42 - renesas,r8a7742-cmt0 # 32-bit CMT0 on RZ/G1H
43 - renesas,r8a7743-cmt0 # 32-bit CMT0 on RZ/G1M
44 - renesas,r8a7744-cmt0 # 32-bit CMT0 on RZ/G1N
45 - renesas,r8a7745-cmt0 # 32-bit CMT0 on RZ/G1E
46 - renesas,r8a77470-cmt0 # 32-bit CMT0 on RZ/G1C
57 - renesas,r8a7742-cmt1 # 48-bit CMT1 on RZ/G1H
58 - renesas,r8a7743-cmt1 # 48-bit CMT1 on RZ/G1M
59 - renesas,r8a7744-cmt1 # 48-bit CMT1 on RZ/G1N
60 - renesas,r8a7745-cmt1 # 48-bit CMT1 on RZ/G1E
61 - renesas,r8a77470-cmt1 # 48-bit CMT1 on RZ/G1C
[all …]
/openbmc/linux/arch/sh/boards/mach-x3proto/
H A Dilsel.c48 return ILSEL_LEVELS - bit - 1; in ilsel_offset()
58 return (ilsel_offset(bit) & 0x3) << 2; in mk_ilsel_shift()
68 addr = mk_ilsel_addr(bit); in __ilsel_enable()
69 shift = mk_ilsel_shift(bit); in __ilsel_enable()
72 __func__, bit, addr, shift, set); in __ilsel_enable()
94 unsigned int bit; in ilsel_enable() local
105 __ilsel_enable(set, bit); in ilsel_enable()
107 return bit; in ilsel_enable()
124 unsigned int bit = ilsel_offset(level - 1); in ilsel_enable_fixed() local
129 __ilsel_enable(set, bit); in ilsel_enable_fixed()
[all …]
/openbmc/linux/fs/omfs/
H A Dbitmap.c27 int addrlen, int bit, int max) in count_run() argument
34 count += x - bit; in count_run()
39 bit = 0; in count_run()
62 if (bit >= nbits) { in set_run()
63 bit = 0; in set_run()
96 unsigned int map, bit; in omfs_allocate_block() local
139 int i, run, bit; in omfs_allocate_range() local
143 bit = 0; in omfs_allocate_range()
146 bit); in omfs_allocate_range()
156 bit += run; in omfs_allocate_range()
[all …]
/openbmc/linux/drivers/net/wireless/zydas/zd1211rw/
H A Dzd_rf_rf2959.c39 static int bit(u32 rw, int bit)
41 return bits(rw, bit, bit);
54 bits(rw, 14, 15), bit(rw, 3), bit(rw, 2), bit(rw, 1),
55 bit(rw, 0));
61 bit(rw, 17), bit(rw, 16), bit(rw, 15), bit(rw, 14),
62 bit(rw, 13), bit(rw, 12), bit(rw, 11), bit(rw, 10),
80 bit(rw, 17), bit(rw, 16), bit(rw, 15), bit(rw, 14),
81 bit(rw, 13), bit(rw, 12), bit(rw, 11), bit(rw, 10),
105 bits(rw, 7, 9), bits(rw, 4, 6), bit(rw, 3), bit(rw, 2),
106 bit(rw, 1), bit(rw, 0));
[all …]

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