Searched refs:amdgpu_ras_get_context (Results 1 – 20 of 20) sorted by relevance
141 if (adev && amdgpu_ras_get_context(adev)) in amdgpu_ras_set_error_query_ready()142 amdgpu_ras_get_context(adev)->error_query_ready = ready; in amdgpu_ras_set_error_query_ready()147 if (adev && amdgpu_ras_get_context(adev)) in amdgpu_ras_get_error_query_ready()148 return amdgpu_ras_get_context(adev)->error_query_ready; in amdgpu_ras_get_error_query_ready()553 &(amdgpu_ras_get_context(adev)->eeprom_control)); in amdgpu_ras_debugfs_eeprom_write()558 amdgpu_ras_get_context(adev)->flags = RAS_DEFAULT_FLAGS; in amdgpu_ras_debugfs_eeprom_write()641 struct amdgpu_ras *con = amdgpu_ras_get_context(adev); in amdgpu_ras_create_obj()674 struct amdgpu_ras *con = amdgpu_ras_get_context(adev); in amdgpu_ras_find_obj()717 struct amdgpu_ras *con = amdgpu_ras_get_context(adev); in amdgpu_ras_is_feature_enabled()729 struct amdgpu_ras *con = amdgpu_ras_get_context(adev); in __amdgpu_ras_feature_enable()[all …]
419 struct amdgpu_ras *con = amdgpu_ras_get_context(adev); in amdgpu_ras_eeprom_reset_table()532 struct amdgpu_ras *con = amdgpu_ras_get_context(adev); in amdgpu_ras_eeprom_check_err_threshold()609 struct amdgpu_ras *con = amdgpu_ras_get_context(to_amdgpu_device(control)); in amdgpu_ras_eeprom_append_table()720 struct amdgpu_ras *ras = amdgpu_ras_get_context(adev); in amdgpu_ras_eeprom_update_header()906 struct amdgpu_ras *con = amdgpu_ras_get_context(adev); in amdgpu_ras_eeprom_read()1003 struct amdgpu_ras *ras = amdgpu_ras_get_context(adev); in amdgpu_ras_debugfs_eeprom_size_read()1072 struct amdgpu_ras *ras = amdgpu_ras_get_context(adev); in amdgpu_ras_debugfs_table_read()1187 struct amdgpu_ras *ras = amdgpu_ras_get_context(adev); in amdgpu_ras_debugfs_eeprom_table_read()1311 struct amdgpu_ras *ras = amdgpu_ras_get_context(adev); in amdgpu_ras_eeprom_init()
341 struct amdgpu_ras *ras = amdgpu_ras_get_context(adev); in umc_v8_10_ecc_info_query_correctable_error_count()362 struct amdgpu_ras *ras = amdgpu_ras_get_context(adev); in umc_v8_10_ecc_info_query_uncorrectable_error_count()410 struct amdgpu_ras *ras = amdgpu_ras_get_context(adev); in umc_v8_10_ecc_info_query_error_address()
56 struct amdgpu_ras *ras = amdgpu_ras_get_context(adev); in umc_v8_7_ecc_info_query_correctable_error_count()75 struct amdgpu_ras *ras = amdgpu_ras_get_context(adev); in umc_v8_7_ecc_info_querry_uncorrectable_error_count()137 struct amdgpu_ras *ras = amdgpu_ras_get_context(adev); in umc_v8_7_ecc_info_query_error_address()
101 struct amdgpu_ras *ras = amdgpu_ras_get_context(adev); in umc_v6_7_ecc_info_query_correctable_error_count()143 struct amdgpu_ras *ras = amdgpu_ras_get_context(adev); in umc_v6_7_ecc_info_querry_uncorrectable_error_count()228 struct amdgpu_ras *ras = amdgpu_ras_get_context(adev); in umc_v6_7_ecc_info_query_error_address()
94 struct amdgpu_ras *ras = amdgpu_ras_get_context(adev); in gfx_v11_0_3_poison_consumption_handler()
85 struct amdgpu_ras *con = amdgpu_ras_get_context(adev); in amdgpu_umc_do_page_retirement()
363 con = amdgpu_ras_get_context(tmp_adev); in aldebaran_mode2_restore_hwcontext()
742 struct amdgpu_ras* amdgpu_ras_get_context(struct amdgpu_device *adev);
484 struct amdgpu_ras *ras = amdgpu_ras_get_context(adev); in soc15_asic_baco_reset()507 struct amdgpu_ras *ras = amdgpu_ras_get_context(adev); in soc15_asic_reset_method()
573 struct amdgpu_ras *ras = amdgpu_ras_get_context(adev); in nbio_v7_9_handle_ras_controller_intr_no_bifring()
369 struct amdgpu_ras *ras = amdgpu_ras_get_context(adev); in nbio_v7_4_handle_ras_controller_intr_no_bifring()
5170 struct amdgpu_ras *con = amdgpu_ras_get_context(adev); in amdgpu_device_stop_pending_resets()5226 if (need_emergency_restart && amdgpu_ras_get_context(adev) && in amdgpu_device_gpu_recover()5227 amdgpu_ras_get_context(adev)->reboot) { in amdgpu_device_gpu_recover()5632 struct amdgpu_ras *ras = amdgpu_ras_get_context(adev); in amdgpu_device_baco_enter()5647 struct amdgpu_ras *ras = amdgpu_ras_get_context(adev); in amdgpu_device_baco_exit()
578 struct amdgpu_ras *con = amdgpu_ras_get_context(adev); in amdgpu_ctx_query2()
1120 struct amdgpu_ras *ras = amdgpu_ras_get_context(adev); in amdgpu_info_ioctl()
76 struct amdgpu_ras *ras = amdgpu_ras_get_context(adev); in vega20_baco_set_state()
1588 struct amdgpu_ras *ras = amdgpu_ras_get_context(adev); in smu_v11_0_baco_set_state()
1893 struct amdgpu_ras *ras = amdgpu_ras_get_context(adev); in aldebaran_mode1_reset()
2170 ras = amdgpu_ras_get_context(adev); in smu_v13_0_6_mode1_reset()
2409 struct amdgpu_ras *ras = amdgpu_ras_get_context(adev); in smu_v13_0_0_set_mode1_reset_param()