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Searched refs:amdgpu_ras_get_context (Results 1 – 20 of 20) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/amdgpu/
H A Damdgpu_ras.c141 if (adev && amdgpu_ras_get_context(adev)) in amdgpu_ras_set_error_query_ready()
142 amdgpu_ras_get_context(adev)->error_query_ready = ready; in amdgpu_ras_set_error_query_ready()
147 if (adev && amdgpu_ras_get_context(adev)) in amdgpu_ras_get_error_query_ready()
148 return amdgpu_ras_get_context(adev)->error_query_ready; in amdgpu_ras_get_error_query_ready()
553 &(amdgpu_ras_get_context(adev)->eeprom_control)); in amdgpu_ras_debugfs_eeprom_write()
641 struct amdgpu_ras *con = amdgpu_ras_get_context(adev); in amdgpu_ras_create_obj()
674 struct amdgpu_ras *con = amdgpu_ras_get_context(adev); in amdgpu_ras_find_obj()
717 struct amdgpu_ras *con = amdgpu_ras_get_context(adev); in amdgpu_ras_is_feature_enabled()
729 struct amdgpu_ras *con = amdgpu_ras_get_context(adev); in __amdgpu_ras_feature_enable()
765 struct amdgpu_ras *con = amdgpu_ras_get_context(adev); in amdgpu_ras_feature_enable()
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H A Damdgpu_ras_eeprom.c419 struct amdgpu_ras *con = amdgpu_ras_get_context(adev); in amdgpu_ras_eeprom_reset_table()
532 struct amdgpu_ras *con = amdgpu_ras_get_context(adev); in amdgpu_ras_eeprom_check_err_threshold()
609 struct amdgpu_ras *con = amdgpu_ras_get_context(to_amdgpu_device(control)); in amdgpu_ras_eeprom_append_table()
720 struct amdgpu_ras *ras = amdgpu_ras_get_context(adev); in amdgpu_ras_eeprom_update_header()
906 struct amdgpu_ras *con = amdgpu_ras_get_context(adev); in amdgpu_ras_eeprom_read()
1003 struct amdgpu_ras *ras = amdgpu_ras_get_context(adev); in amdgpu_ras_debugfs_eeprom_size_read()
1072 struct amdgpu_ras *ras = amdgpu_ras_get_context(adev); in amdgpu_ras_debugfs_table_read()
1187 struct amdgpu_ras *ras = amdgpu_ras_get_context(adev); in amdgpu_ras_debugfs_eeprom_table_read()
1311 struct amdgpu_ras *ras = amdgpu_ras_get_context(adev); in amdgpu_ras_eeprom_init()
H A Dumc_v8_10.c341 struct amdgpu_ras *ras = amdgpu_ras_get_context(adev); in umc_v8_10_ecc_info_query_correctable_error_count()
362 struct amdgpu_ras *ras = amdgpu_ras_get_context(adev); in umc_v8_10_ecc_info_query_uncorrectable_error_count()
410 struct amdgpu_ras *ras = amdgpu_ras_get_context(adev); in umc_v8_10_ecc_info_query_error_address()
H A Dumc_v8_7.c56 struct amdgpu_ras *ras = amdgpu_ras_get_context(adev); in umc_v8_7_ecc_info_query_correctable_error_count()
75 struct amdgpu_ras *ras = amdgpu_ras_get_context(adev); in umc_v8_7_ecc_info_querry_uncorrectable_error_count()
137 struct amdgpu_ras *ras = amdgpu_ras_get_context(adev); in umc_v8_7_ecc_info_query_error_address()
H A Dgfx_v11_0_3.c94 struct amdgpu_ras *ras = amdgpu_ras_get_context(adev); in gfx_v11_0_3_poison_consumption_handler()
H A Dumc_v6_7.c101 struct amdgpu_ras *ras = amdgpu_ras_get_context(adev); in umc_v6_7_ecc_info_query_correctable_error_count()
143 struct amdgpu_ras *ras = amdgpu_ras_get_context(adev); in umc_v6_7_ecc_info_querry_uncorrectable_error_count()
228 struct amdgpu_ras *ras = amdgpu_ras_get_context(adev); in umc_v6_7_ecc_info_query_error_address()
H A Damdgpu_umc.c85 struct amdgpu_ras *con = amdgpu_ras_get_context(adev); in amdgpu_umc_do_page_retirement()
H A Daldebaran.c363 con = amdgpu_ras_get_context(tmp_adev); in aldebaran_mode2_restore_hwcontext()
H A Damdgpu_ras.h742 struct amdgpu_ras* amdgpu_ras_get_context(struct amdgpu_device *adev);
H A Dnbio_v7_9.c573 struct amdgpu_ras *ras = amdgpu_ras_get_context(adev); in nbio_v7_9_handle_ras_controller_intr_no_bifring()
H A Dsoc15.c484 struct amdgpu_ras *ras = amdgpu_ras_get_context(adev); in soc15_asic_baco_reset()
507 struct amdgpu_ras *ras = amdgpu_ras_get_context(adev); in soc15_asic_reset_method()
H A Dnbio_v7_4.c369 struct amdgpu_ras *ras = amdgpu_ras_get_context(adev); in nbio_v7_4_handle_ras_controller_intr_no_bifring()
H A Damdgpu_device.c5154 struct amdgpu_ras *con = amdgpu_ras_get_context(adev); in amdgpu_device_stop_pending_resets()
5210 if (need_emergency_restart && amdgpu_ras_get_context(adev) && in amdgpu_device_gpu_recover()
5211 amdgpu_ras_get_context(adev)->reboot) { in amdgpu_device_gpu_recover()
5616 struct amdgpu_ras *ras = amdgpu_ras_get_context(adev); in amdgpu_device_baco_enter()
5631 struct amdgpu_ras *ras = amdgpu_ras_get_context(adev); in amdgpu_device_baco_exit()
H A Damdgpu_ctx.c578 struct amdgpu_ras *con = amdgpu_ras_get_context(adev); in amdgpu_ctx_query2()
H A Damdgpu_kms.c1101 struct amdgpu_ras *ras = amdgpu_ras_get_context(adev); in amdgpu_info_ioctl()
/openbmc/linux/drivers/gpu/drm/amd/pm/powerplay/hwmgr/
H A Dvega20_baco.c76 struct amdgpu_ras *ras = amdgpu_ras_get_context(adev); in vega20_baco_set_state()
/openbmc/linux/drivers/gpu/drm/amd/pm/swsmu/smu11/
H A Dsmu_v11_0.c1588 struct amdgpu_ras *ras = amdgpu_ras_get_context(adev); in smu_v11_0_baco_set_state()
/openbmc/linux/drivers/gpu/drm/amd/pm/swsmu/smu13/
H A Daldebaran_ppt.c1894 struct amdgpu_ras *ras = amdgpu_ras_get_context(adev); in aldebaran_mode1_reset()
H A Dsmu_v13_0_6_ppt.c2168 ras = amdgpu_ras_get_context(adev); in smu_v13_0_6_mode1_reset()
H A Dsmu_v13_0_0_ppt.c2409 struct amdgpu_ras *ras = amdgpu_ras_get_context(adev); in smu_v13_0_0_set_mode1_reset_param()