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Searched refs:UVD_SUVD_CGC_STATUS__SRE_HEVC_VCLK__SHIFT (Results 1 – 9 of 9) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/uvd/
H A Duvd_6_0_sh_mask.h766 #define UVD_SUVD_CGC_STATUS__SRE_HEVC_VCLK__SHIFT 0x7 macro
H A Duvd_5_0_sh_mask.h768 #define UVD_SUVD_CGC_STATUS__SRE_HEVC_VCLK__SHIFT 0x7 macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/vcn/
H A Dvcn_1_0_sh_mask.h487 #define UVD_SUVD_CGC_STATUS__SRE_HEVC_VCLK__SHIFT … macro
H A Dvcn_2_5_sh_mask.h2117 #define UVD_SUVD_CGC_STATUS__SRE_HEVC_VCLK__SHIFT … macro
H A Dvcn_2_0_0_sh_mask.h3243 #define UVD_SUVD_CGC_STATUS__SRE_HEVC_VCLK__SHIFT … macro
H A Dvcn_2_6_0_sh_mask.h3788 #define UVD_SUVD_CGC_STATUS__SRE_HEVC_VCLK__SHIFT … macro
H A Dvcn_3_0_0_sh_mask.h2859 #define UVD_SUVD_CGC_STATUS__SRE_HEVC_VCLK__SHIFT … macro
H A Dvcn_4_0_0_sh_mask.h3912 #define UVD_SUVD_CGC_STATUS__SRE_HEVC_VCLK__SHIFT … macro
H A Dvcn_4_0_3_sh_mask.h3947 #define UVD_SUVD_CGC_STATUS__SRE_HEVC_VCLK__SHIFT … macro