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Searched refs:UVD_SUVD_CGC_GATE__SRE_VP9_MASK (Results 1 – 13 of 13) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/vcn/
H A Dvcn_1_0_sh_mask.h474 #define UVD_SUVD_CGC_GATE__SRE_VP9_MASK macro
H A Dvcn_2_5_sh_mask.h2103 #define UVD_SUVD_CGC_GATE__SRE_VP9_MASK macro
H A Dvcn_2_0_0_sh_mask.h3229 #define UVD_SUVD_CGC_GATE__SRE_VP9_MASK macro
H A Dvcn_2_6_0_sh_mask.h3774 #define UVD_SUVD_CGC_GATE__SRE_VP9_MASK macro
H A Dvcn_3_0_0_sh_mask.h2839 #define UVD_SUVD_CGC_GATE__SRE_VP9_MASK macro
H A Dvcn_4_0_0_sh_mask.h1356 #define UVD_SUVD_CGC_GATE__SRE_VP9_MASK macro
H A Dvcn_4_0_3_sh_mask.h1356 #define UVD_SUVD_CGC_GATE__SRE_VP9_MASK macro
/openbmc/linux/drivers/gpu/drm/amd/amdgpu/
H A Dvcn_v4_0_3.c584 | UVD_SUVD_CGC_GATE__SRE_VP9_MASK in vcn_v4_0_3_disable_clock_gating()
H A Dvcn_v2_0.c574 | UVD_SUVD_CGC_GATE__SRE_VP9_MASK in vcn_v2_0_disable_clock_gating()
H A Dvcn_v4_0.c744 | UVD_SUVD_CGC_GATE__SRE_VP9_MASK in vcn_v4_0_disable_clock_gating()
H A Dvcn_v1_0.c549 | UVD_SUVD_CGC_GATE__SRE_VP9_MASK in vcn_v1_0_disable_clock_gating()
H A Dvcn_v2_5.c660 | UVD_SUVD_CGC_GATE__SRE_VP9_MASK in vcn_v2_5_disable_clock_gating()
H A Dvcn_v3_0.c781 | UVD_SUVD_CGC_GATE__SRE_VP9_MASK in vcn_v3_0_disable_clock_gating()