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Searched refs:SDMA0_UTCL1_WR_XNACK1__XNACK_ADDR_HI__SHIFT (Results 1 – 7 of 7) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/sdma0/
H A Dsdma0_4_1_sh_mask.h905 #define SDMA0_UTCL1_WR_XNACK1__XNACK_ADDR_HI__SHIFT macro
H A Dsdma0_4_0_sh_mask.h906 #define SDMA0_UTCL1_WR_XNACK1__XNACK_ADDR_HI__SHIFT 0x0 macro
H A Dsdma0_4_2_2_sh_mask.h928 #define SDMA0_UTCL1_WR_XNACK1__XNACK_ADDR_HI__SHIFT macro
H A Dsdma0_4_2_sh_mask.h922 #define SDMA0_UTCL1_WR_XNACK1__XNACK_ADDR_HI__SHIFT macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/sdma/
H A Dsdma_4_4_0_sh_mask.h617 #define SDMA0_UTCL1_WR_XNACK1__XNACK_ADDR_HI__SHIFT macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_10_1_0_sh_mask.h626 #define SDMA0_UTCL1_WR_XNACK1__XNACK_ADDR_HI__SHIFT macro
H A Dgc_10_3_0_sh_mask.h591 #define SDMA0_UTCL1_WR_XNACK1__XNACK_ADDR_HI__SHIFT macro