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Searched refs:SDMA0_STATUS_REG__INT_IDLE_MASK (Results 1 – 13 of 13) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/sdma0/
H A Dsdma0_4_1_sh_mask.h540 #define SDMA0_STATUS_REG__INT_IDLE_MASK … macro
H A Dsdma0_4_0_sh_mask.h541 #define SDMA0_STATUS_REG__INT_IDLE_MASK 0x40000000L macro
H A Dsdma0_4_2_sh_mask.h541 #define SDMA0_STATUS_REG__INT_IDLE_MASK … macro
H A Dsdma0_4_2_2_sh_mask.h547 #define SDMA0_STATUS_REG__INT_IDLE_MASK … macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/oss/
H A Doss_2_4_sh_mask.h1043 #define SDMA0_STATUS_REG__INT_IDLE_MASK 0x40000000 macro
H A Doss_2_0_sh_mask.h959 #define SDMA0_STATUS_REG__INT_IDLE_MASK 0x40000000 macro
H A Doss_3_0_1_sh_mask.h1061 #define SDMA0_STATUS_REG__INT_IDLE_MASK 0x40000000 macro
H A Doss_3_0_sh_mask.h1567 #define SDMA0_STATUS_REG__INT_IDLE_MASK 0x40000000 macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/sdma/
H A Dsdma_4_4_0_sh_mask.h232 #define SDMA0_STATUS_REG__INT_IDLE_MASK … macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_11_0_0_sh_mask.h217 #define SDMA0_STATUS_REG__INT_IDLE_MASK … macro
H A Dgc_11_0_3_sh_mask.h227 #define SDMA0_STATUS_REG__INT_IDLE_MASK … macro
H A Dgc_10_1_0_sh_mask.h249 #define SDMA0_STATUS_REG__INT_IDLE_MASK … macro
H A Dgc_10_3_0_sh_mask.h250 #define SDMA0_STATUS_REG__INT_IDLE_MASK … macro