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Searched refs:SDMA0_PHASE0_QUANTUM__PREFER_MASK (Results 1 – 11 of 11) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/sdma0/
H A Dsdma0_4_1_sh_mask.h600 #define SDMA0_PHASE0_QUANTUM__PREFER_MASK … macro
H A Dsdma0_4_0_sh_mask.h601 #define SDMA0_PHASE0_QUANTUM__PREFER_MASK 0x40000000L macro
H A Dsdma0_4_2_sh_mask.h603 #define SDMA0_PHASE0_QUANTUM__PREFER_MASK … macro
H A Dsdma0_4_2_2_sh_mask.h609 #define SDMA0_PHASE0_QUANTUM__PREFER_MASK … macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/oss/
H A Doss_2_4_sh_mask.h1105 #define SDMA0_PHASE0_QUANTUM__PREFER_MASK 0x40000000 macro
H A Doss_2_0_sh_mask.h1015 #define SDMA0_PHASE0_QUANTUM__PREFER_MASK 0x40000000 macro
H A Doss_3_0_1_sh_mask.h1125 #define SDMA0_PHASE0_QUANTUM__PREFER_MASK 0x40000000 macro
H A Doss_3_0_sh_mask.h1631 #define SDMA0_PHASE0_QUANTUM__PREFER_MASK 0x40000000 macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/sdma/
H A Dsdma_4_4_0_sh_mask.h296 #define SDMA0_PHASE0_QUANTUM__PREFER_MASK … macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_10_1_0_sh_mask.h315 #define SDMA0_PHASE0_QUANTUM__PREFER_MASK … macro
H A Dgc_10_3_0_sh_mask.h316 #define SDMA0_PHASE0_QUANTUM__PREFER_MASK … macro