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Searched refs:SDMA0_EDC_COUNTER__SDMA_MBANK_DATA_BUF5_SED__SHIFT (Results 1 – 9 of 9) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/sdma0/
H A Dsdma0_4_1_sh_mask.h677 #define SDMA0_EDC_COUNTER__SDMA_MBANK_DATA_BUF5_SED__SHIFT … macro
H A Dsdma0_4_0_sh_mask.h678 #define SDMA0_EDC_COUNTER__SDMA_MBANK_DATA_BUF5_SED__SHIFT 0xc macro
H A Dsdma0_4_2_sh_mask.h679 #define SDMA0_EDC_COUNTER__SDMA_MBANK_DATA_BUF5_SED__SHIFT … macro
H A Dsdma0_4_2_2_sh_mask.h685 #define SDMA0_EDC_COUNTER__SDMA_MBANK_DATA_BUF5_SED__SHIFT … macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/sdma/
H A Dsdma_4_4_0_sh_mask.h364 #define SDMA0_EDC_COUNTER__SDMA_MBANK_DATA_BUF5_SED__SHIFT … macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_11_0_0_sh_mask.h345 #define SDMA0_EDC_COUNTER__SDMA_MBANK_DATA_BUF5_SED__SHIFT … macro
H A Dgc_11_0_3_sh_mask.h363 #define SDMA0_EDC_COUNTER__SDMA_MBANK_DATA_BUF5_SED__SHIFT … macro
H A Dgc_10_1_0_sh_mask.h392 #define SDMA0_EDC_COUNTER__SDMA_MBANK_DATA_BUF5_SED__SHIFT … macro
H A Dgc_10_3_0_sh_mask.h357 #define SDMA0_EDC_COUNTER__SDMA_MBANK_DATA_BUF5_SED__SHIFT … macro