| /openbmc/u-boot/include/dt-bindings/clock/ |
| H A D | rk3128-cru.h | 26 #define SCLK_SPDIF 83 macro
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| H A D | rk3036-cru.h | 27 #define SCLK_SPDIF 83 macro
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| H A D | exynos7420-clk.h | 122 #define SCLK_SPDIF 27 macro
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| H A D | rk3228-cru.h | 29 #define SCLK_SPDIF 83 macro
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| H A D | rk3188-cru-common.h | 34 #define SCLK_SPDIF 78 macro
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| H A D | rk3288-cru.h | 35 #define SCLK_SPDIF 83 macro
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| H A D | rk3328-cru.h | 34 #define SCLK_SPDIF 46 macro
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| /openbmc/linux/include/dt-bindings/clock/ |
| H A D | rk3036-cru.h | 27 #define SCLK_SPDIF 83 macro
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| H A D | exynos7-clk.h | 119 #define SCLK_SPDIF 27 macro
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| H A D | s5pv210.h | 187 #define SCLK_SPDIF 165 macro
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| H A D | rk3188-cru-common.h | 34 #define SCLK_SPDIF 78 macro
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| H A D | rk3128-cru.h | 30 #define SCLK_SPDIF 83 macro
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| H A D | rk3228-cru.h | 30 #define SCLK_SPDIF 83 macro
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| H A D | rk3328-cru.h | 35 #define SCLK_SPDIF 46 macro
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| H A D | rk3288-cru.h | 38 #define SCLK_SPDIF 83 macro
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| /openbmc/linux/Documentation/devicetree/bindings/sound/ |
| H A D | rockchip-spdif.yaml | 100 clocks = <&cru SCLK_SPDIF>, <&cru HCLK_SPDIF>;
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| /openbmc/linux/drivers/clk/rockchip/ |
| H A D | clk-rk3036.c | 166 MUX(SCLK_SPDIF, "sclk_spdif", mux_spdif_p, 0,
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| H A D | clk-rk3128.c | 182 MUX(SCLK_SPDIF, "sclk_spdif", mux_sclk_spdif_p, CLK_SET_RATE_PARENT,
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| H A D | clk-rk3228.c | 196 MUX(SCLK_SPDIF, "sclk_spdif", mux_sclk_spdif_p, CLK_SET_RATE_PARENT,
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| H A D | clk-rk3328.c | 249 MUX(SCLK_SPDIF, "sclk_spdif", mux_spdif_p, CLK_SET_RATE_PARENT,
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| H A D | clk-rk3188.c | 256 MUX(SCLK_SPDIF, "sclk_spdif", mux_sclk_spdif_p, CLK_SET_RATE_PARENT,
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| /openbmc/linux/drivers/clk/samsung/ |
| H A D | clk-s5pv210.c | 669 GATE(SCLK_SPDIF, "sclk_spdif", "mout_spdif", CLK_SRC_MASK0, 27,
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| H A D | clk-exynos7.c | 798 GATE(SCLK_SPDIF, "sclk_spdif_user", "sclk_spdif",
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| /openbmc/u-boot/arch/arm/dts/ |
| H A D | rk3188.dtsi | 94 clocks = <&cru HCLK_SPDIF>, <&cru SCLK_SPDIF>;
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| /openbmc/linux/arch/arm/boot/dts/rockchip/ |
| H A D | rk3188.dtsi | 185 clocks = <&cru SCLK_SPDIF>, <&cru HCLK_SPDIF>;
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