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Searched refs:SCLK (Results 1 – 25 of 27) sorted by relevance

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/openbmc/u-boot/board/renesas/stout/
H A Dcpld.c15 #define SCLK (92 + 24) macro
34 gpio_set_value(SCLK, 1); in cpld_read()
36 gpio_set_value(SCLK, 0); in cpld_read()
41 gpio_set_value(SCLK, 1); in cpld_read()
42 gpio_set_value(SCLK, 0); in cpld_read()
46 gpio_set_value(SCLK, 1); in cpld_read()
49 gpio_set_value(SCLK, 0); in cpld_read()
61 gpio_set_value(SCLK, 1); in cpld_write()
63 gpio_set_value(SCLK, 0); in cpld_write()
68 gpio_set_value(SCLK, 1); in cpld_write()
[all …]
/openbmc/u-boot/drivers/rtc/
H A Dds1302.c14 #define SCLK 0x400 macro
18 #define RESET rtc_go_low(RST), rtc_go_low(SCLK)
19 #define N_RESET rtc_go_high(RST), rtc_go_low(SCLK)
21 #define CLOCK_HIGH rtc_go_high(SCLK)
22 #define CLOCK_LOW rtc_go_low(SCLK)
198 rtc_go_output(DATA|SCLK|RST); in rtc_init()
/openbmc/linux/drivers/spi/
H A Dspi-lm70llp.c66 #define SCLK 0x40 macro
116 parport_write_data(pp->port, data | SCLK); in clkHigh()
123 parport_write_data(pp->port, data & ~SCLK); in clkLow()
/openbmc/linux/Documentation/devicetree/bindings/sound/
H A Dpcm512x.txt19 - clocks : A clock specifier for the clock connected as SCLK. If this
27 external connection from the pll-out pin to the SCLK pin is assumed.
H A Dcs35l34.txt45 SCLK. Otherwise, data is on the falling edge of SCLK.
/openbmc/linux/include/dt-bindings/clock/
H A Dmicrochip,pic32-clock.h18 #define SCLK 7 macro
/openbmc/linux/Documentation/devicetree/bindings/spi/
H A Dspi_oc_tiny.txt9 the input clock to SCLK.
/openbmc/linux/Documentation/hwmon/
H A Dlm70.rst45 the driver accesses the LM70 using SPI communication: 16 SCLK cycles
/openbmc/linux/drivers/clk/microchip/
H A Dclk-pic32mzda.c210 clks[SCLK] = pic32_sys_clk_register(&sys_mux_clk, core); in pic32mzda_clk_probe()
/openbmc/u-boot/include/
H A Dsym53c8xx.h187 #define SCLK 0x80 /* Use the PCI clock as SCSI clock */ macro
/openbmc/linux/Documentation/spi/
H A Dspi-lm70llp.rst45 D6 8 --> SCLK 3
H A Dspi-summary.rst183 All spiB.* devices share one physical SPI bus segment, with SCLK,
/openbmc/linux/drivers/scsi/sym53c8xx_2/
H A Dsym_defs.h268 #define SCLK 0x80 /* Use the PCI clock as SCSI clock */ macro
H A Dsym_hipd.c446 OUTB(np, nc_stest1, SCLK); /* Use the PCI clock as SCSI clock */
/openbmc/linux/Documentation/input/devices/
H A Damijoy.rst102 the rising edge of SCLK. MLD output is used to parallel load
/openbmc/u-boot/arch/arm/dts/
H A Darmada-385-turris-omnia.dts377 /* MISO, MOSI, SCLK and CS1 are routed to pin header CN11 */
/openbmc/linux/arch/arm/boot/dts/marvell/
H A Darmada-385-turris-omnia.dts556 /* MISO, MOSI, SCLK and CS2 are routed to pin header CN11 */
/openbmc/linux/drivers/scsi/
H A Dncr53c8xx.h791 #define SCLK 0x80 /* Use the PCI clock as SCSI clock */ macro
/openbmc/linux/drivers/gpu/drm/amd/pm/swsmu/smu12/
H A Drenoir_ppt.c117 CLK_MAP(SCLK, CLOCK_GFXCLK),
/openbmc/u-boot/drivers/video/
H A DKconfig372 string "SPI SCLK pin for LCD related config job"
/openbmc/linux/drivers/gpu/drm/amd/pm/swsmu/smu13/
H A Daldebaran_ppt.c159 CLK_MAP(SCLK, PPCLK_GFXCLK),
H A Dsmu_v13_0_7_ppt.c141 CLK_MAP(SCLK, PPCLK_GFXCLK),
H A Dsmu_v13_0_0_ppt.c170 CLK_MAP(SCLK, PPCLK_GFXCLK),
/openbmc/linux/drivers/gpu/drm/amd/pm/swsmu/smu11/
H A Darcturus_ppt.c166 CLK_MAP(SCLK, PPCLK_GFXCLK),
H A Dnavi10_ppt.c151 CLK_MAP(SCLK, PPCLK_GFXCLK),

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