/openbmc/u-boot/board/renesas/stout/ |
H A D | cpld.c | 15 #define SCLK (92 + 24) macro 34 gpio_set_value(SCLK, 1); in cpld_read() 36 gpio_set_value(SCLK, 0); in cpld_read() 41 gpio_set_value(SCLK, 1); in cpld_read() 42 gpio_set_value(SCLK, 0); in cpld_read() 46 gpio_set_value(SCLK, 1); in cpld_read() 49 gpio_set_value(SCLK, 0); in cpld_read() 61 gpio_set_value(SCLK, 1); in cpld_write() 63 gpio_set_value(SCLK, 0); in cpld_write() 68 gpio_set_value(SCLK, 1); in cpld_write() [all …]
|
/openbmc/u-boot/drivers/rtc/ |
H A D | ds1302.c | 14 #define SCLK 0x400 macro 18 #define RESET rtc_go_low(RST), rtc_go_low(SCLK) 19 #define N_RESET rtc_go_high(RST), rtc_go_low(SCLK) 21 #define CLOCK_HIGH rtc_go_high(SCLK) 22 #define CLOCK_LOW rtc_go_low(SCLK) 198 rtc_go_output(DATA|SCLK|RST); in rtc_init()
|
/openbmc/linux/drivers/spi/ |
H A D | spi-lm70llp.c | 66 #define SCLK 0x40 macro 116 parport_write_data(pp->port, data | SCLK); in clkHigh() 123 parport_write_data(pp->port, data & ~SCLK); in clkLow()
|
/openbmc/linux/Documentation/devicetree/bindings/sound/ |
H A D | pcm512x.txt | 19 - clocks : A clock specifier for the clock connected as SCLK. If this 27 external connection from the pll-out pin to the SCLK pin is assumed.
|
H A D | cs35l34.txt | 45 SCLK. Otherwise, data is on the falling edge of SCLK.
|
/openbmc/linux/include/dt-bindings/clock/ |
H A D | microchip,pic32-clock.h | 18 #define SCLK 7 macro
|
/openbmc/linux/Documentation/devicetree/bindings/spi/ |
H A D | spi_oc_tiny.txt | 9 the input clock to SCLK.
|
/openbmc/linux/Documentation/hwmon/ |
H A D | lm70.rst | 45 the driver accesses the LM70 using SPI communication: 16 SCLK cycles
|
/openbmc/linux/drivers/clk/microchip/ |
H A D | clk-pic32mzda.c | 210 clks[SCLK] = pic32_sys_clk_register(&sys_mux_clk, core); in pic32mzda_clk_probe()
|
/openbmc/u-boot/include/ |
H A D | sym53c8xx.h | 187 #define SCLK 0x80 /* Use the PCI clock as SCSI clock */ macro
|
/openbmc/linux/Documentation/spi/ |
H A D | spi-lm70llp.rst | 45 D6 8 --> SCLK 3
|
H A D | spi-summary.rst | 183 All spiB.* devices share one physical SPI bus segment, with SCLK,
|
/openbmc/linux/drivers/scsi/sym53c8xx_2/ |
H A D | sym_defs.h | 268 #define SCLK 0x80 /* Use the PCI clock as SCSI clock */ macro
|
H A D | sym_hipd.c | 446 OUTB(np, nc_stest1, SCLK); /* Use the PCI clock as SCSI clock */
|
/openbmc/linux/Documentation/input/devices/ |
H A D | amijoy.rst | 102 the rising edge of SCLK. MLD output is used to parallel load
|
/openbmc/u-boot/arch/arm/dts/ |
H A D | armada-385-turris-omnia.dts | 377 /* MISO, MOSI, SCLK and CS1 are routed to pin header CN11 */
|
/openbmc/linux/arch/arm/boot/dts/marvell/ |
H A D | armada-385-turris-omnia.dts | 556 /* MISO, MOSI, SCLK and CS2 are routed to pin header CN11 */
|
/openbmc/linux/drivers/scsi/ |
H A D | ncr53c8xx.h | 791 #define SCLK 0x80 /* Use the PCI clock as SCSI clock */ macro
|
/openbmc/linux/drivers/gpu/drm/amd/pm/swsmu/smu12/ |
H A D | renoir_ppt.c | 117 CLK_MAP(SCLK, CLOCK_GFXCLK),
|
/openbmc/u-boot/drivers/video/ |
H A D | Kconfig | 372 string "SPI SCLK pin for LCD related config job"
|
/openbmc/linux/drivers/gpu/drm/amd/pm/swsmu/smu13/ |
H A D | aldebaran_ppt.c | 159 CLK_MAP(SCLK, PPCLK_GFXCLK),
|
H A D | smu_v13_0_7_ppt.c | 141 CLK_MAP(SCLK, PPCLK_GFXCLK),
|
H A D | smu_v13_0_0_ppt.c | 170 CLK_MAP(SCLK, PPCLK_GFXCLK),
|
/openbmc/linux/drivers/gpu/drm/amd/pm/swsmu/smu11/ |
H A D | arcturus_ppt.c | 166 CLK_MAP(SCLK, PPCLK_GFXCLK),
|
H A D | navi10_ppt.c | 151 CLK_MAP(SCLK, PPCLK_GFXCLK),
|