Home
last modified time | relevance | path

Searched refs:RTC_SEC_REG_ADDR (Results 1 – 6 of 6) sorted by relevance

/openbmc/u-boot/drivers/rtc/
H A Dds1307.c32 #define RTC_SEC_REG_ADDR 0x00 macro
86 sec = rtc_read (RTC_SEC_REG_ADDR); in rtc_get()
102 rtc_write (RTC_SEC_REG_ADDR, in rtc_get()
117 rtc_write(RTC_SEC_REG_ADDR, MCP7941X_BIT_ST); in rtc_get()
227 buf[RTC_SEC_REG_ADDR] = bin2bcd(tm->tm_sec); in ds1307_rtc_set()
231 buf[RTC_SEC_REG_ADDR] |= MCP7941X_BIT_ST; in ds1307_rtc_set()
253 if (buf[RTC_SEC_REG_ADDR] & RTC_SEC_BIT_CH) { in ds1307_rtc_get()
256 buf[RTC_SEC_REG_ADDR] &= ~RTC_SEC_BIT_CH; in ds1307_rtc_get()
257 dm_i2c_reg_write(dev, RTC_SEC_REG_ADDR, in ds1307_rtc_get()
258 buf[RTC_SEC_REG_ADDR]); in ds1307_rtc_get()
[all …]
H A Dpt7c4338.c26 #define RTC_SEC_REG_ADDR 0x0 macro
68 sec = rtc_read(RTC_SEC_REG_ADDR); in rtc_get()
117 rtc_write(RTC_SEC_REG_ADDR, bin2bcd(tmp->tm_sec)); in rtc_set()
125 rtc_write(RTC_SEC_REG_ADDR, 0x00); /* clearing Clock Halt */ in rtc_reset()
H A Dds1337.c22 #define RTC_SEC_REG_ADDR 0x0 macro
33 #define RTC_SEC_REG_ADDR 0x1 macro
76 sec = rtc_read (RTC_SEC_REG_ADDR); in rtc_get()
139 rtc_write (RTC_SEC_REG_ADDR, bin2bcd (tmp->tm_sec)); in rtc_set()
H A Dds3231.c22 #define RTC_SEC_REG_ADDR 0x0 macro
67 sec = rtc_read (RTC_SEC_REG_ADDR); in rtc_get()
125 rtc_write (RTC_SEC_REG_ADDR, bin2bcd (tmp->tm_sec)); in rtc_set()
H A Drx8025.c33 #define RTC_SEC_REG_ADDR 0x00 macro
87 sec = rtc_read(RTC_SEC_REG_ADDR); in rtc_get()
155 rtc_write (RTC_SEC_REG_ADDR, bin2bcd (tmp->tm_sec)); in rtc_set()
H A Disl1208.c32 #define RTC_SEC_REG_ADDR 0x0 macro
97 tmp->tm_sec = bcd2bin(buf[RTC_SEC_REG_ADDR] & 0x7F); in isl1208_rtc_get()
146 buf[RTC_SEC_REG_ADDR] = bin2bcd(tmp->tm_sec); in isl1208_rtc_set()