1*83d290c5STom Rini // SPDX-License-Identifier: GPL-2.0+
209344530SPriyanka Jain /*
309344530SPriyanka Jain * Copyright 2010 Freescale Semiconductor, Inc.
409344530SPriyanka Jain *
509344530SPriyanka Jain * Author: Priyanka Jain <Priyanka.Jain@freescale.com>
609344530SPriyanka Jain */
709344530SPriyanka Jain
809344530SPriyanka Jain /*
909344530SPriyanka Jain * This file provides Date & Time support (no alarms) for PT7C4338 chip.
1009344530SPriyanka Jain *
1109344530SPriyanka Jain * This file is based on drivers/rtc/ds1337.c
1209344530SPriyanka Jain *
1309344530SPriyanka Jain * PT7C4338 chip is manufactured by Pericom Technology Inc.
1409344530SPriyanka Jain * It is a serial real-time clock which provides
1509344530SPriyanka Jain * 1)Low-power clock/calendar.
1609344530SPriyanka Jain * 2)Programmable square-wave output.
1709344530SPriyanka Jain * It has 56 bytes of nonvolatile RAM.
1809344530SPriyanka Jain */
1909344530SPriyanka Jain
2009344530SPriyanka Jain #include <common.h>
2109344530SPriyanka Jain #include <command.h>
2209344530SPriyanka Jain #include <rtc.h>
2309344530SPriyanka Jain #include <i2c.h>
2409344530SPriyanka Jain
2509344530SPriyanka Jain /* RTC register addresses */
2609344530SPriyanka Jain #define RTC_SEC_REG_ADDR 0x0
2709344530SPriyanka Jain #define RTC_MIN_REG_ADDR 0x1
2809344530SPriyanka Jain #define RTC_HR_REG_ADDR 0x2
2909344530SPriyanka Jain #define RTC_DAY_REG_ADDR 0x3
3009344530SPriyanka Jain #define RTC_DATE_REG_ADDR 0x4
3109344530SPriyanka Jain #define RTC_MON_REG_ADDR 0x5
3209344530SPriyanka Jain #define RTC_YR_REG_ADDR 0x6
3309344530SPriyanka Jain #define RTC_CTL_STAT_REG_ADDR 0x7
3409344530SPriyanka Jain
3509344530SPriyanka Jain /* RTC second register address bit */
3609344530SPriyanka Jain #define RTC_SEC_BIT_CH 0x80 /* Clock Halt (in Register 0) */
3709344530SPriyanka Jain
3809344530SPriyanka Jain /* RTC control and status register bits */
3909344530SPriyanka Jain #define RTC_CTL_STAT_BIT_RS0 0x1 /* Rate select 0 */
4009344530SPriyanka Jain #define RTC_CTL_STAT_BIT_RS1 0x2 /* Rate select 1 */
4109344530SPriyanka Jain #define RTC_CTL_STAT_BIT_SQWE 0x10 /* Square Wave Enable */
4209344530SPriyanka Jain #define RTC_CTL_STAT_BIT_OSF 0x20 /* Oscillator Stop Flag */
4309344530SPriyanka Jain #define RTC_CTL_STAT_BIT_OUT 0x80 /* Output Level Control */
4409344530SPriyanka Jain
4509344530SPriyanka Jain /* RTC reset value */
4609344530SPriyanka Jain #define RTC_PT7C4338_RESET_VAL \
4709344530SPriyanka Jain (RTC_CTL_STAT_BIT_RS0 | RTC_CTL_STAT_BIT_RS1 | RTC_CTL_STAT_BIT_OUT)
4809344530SPriyanka Jain
4909344530SPriyanka Jain /****** Helper functions ****************************************/
rtc_read(u8 reg)5009344530SPriyanka Jain static u8 rtc_read(u8 reg)
5109344530SPriyanka Jain {
5209344530SPriyanka Jain return i2c_reg_read(CONFIG_SYS_I2C_RTC_ADDR, reg);
5309344530SPriyanka Jain }
5409344530SPriyanka Jain
rtc_write(u8 reg,u8 val)5509344530SPriyanka Jain static void rtc_write(u8 reg, u8 val)
5609344530SPriyanka Jain {
5709344530SPriyanka Jain i2c_reg_write(CONFIG_SYS_I2C_RTC_ADDR, reg, val);
5809344530SPriyanka Jain }
5909344530SPriyanka Jain /****************************************************************/
6009344530SPriyanka Jain
6109344530SPriyanka Jain /* Get the current time from the RTC */
rtc_get(struct rtc_time * tmp)6209344530SPriyanka Jain int rtc_get(struct rtc_time *tmp)
6309344530SPriyanka Jain {
6409344530SPriyanka Jain int ret = 0;
6509344530SPriyanka Jain u8 sec, min, hour, mday, wday, mon, year, ctl_stat;
6609344530SPriyanka Jain
6709344530SPriyanka Jain ctl_stat = rtc_read(RTC_CTL_STAT_REG_ADDR);
6809344530SPriyanka Jain sec = rtc_read(RTC_SEC_REG_ADDR);
6909344530SPriyanka Jain min = rtc_read(RTC_MIN_REG_ADDR);
7009344530SPriyanka Jain hour = rtc_read(RTC_HR_REG_ADDR);
7109344530SPriyanka Jain wday = rtc_read(RTC_DAY_REG_ADDR);
7209344530SPriyanka Jain mday = rtc_read(RTC_DATE_REG_ADDR);
7309344530SPriyanka Jain mon = rtc_read(RTC_MON_REG_ADDR);
7409344530SPriyanka Jain year = rtc_read(RTC_YR_REG_ADDR);
7509344530SPriyanka Jain debug("Get RTC year: %02x mon: %02x mday: %02x wday: %02x "
7609344530SPriyanka Jain "hr: %02x min: %02x sec: %02x control_status: %02x\n",
7709344530SPriyanka Jain year, mon, mday, wday, hour, min, sec, ctl_stat);
7809344530SPriyanka Jain
7909344530SPriyanka Jain if (ctl_stat & RTC_CTL_STAT_BIT_OSF) {
8009344530SPriyanka Jain printf("### Warning: RTC oscillator has stopped\n");
8109344530SPriyanka Jain /* clear the OSF flag */
8209344530SPriyanka Jain rtc_write(RTC_CTL_STAT_REG_ADDR,
8309344530SPriyanka Jain rtc_read(RTC_CTL_STAT_REG_ADDR)\
8409344530SPriyanka Jain & ~RTC_CTL_STAT_BIT_OSF);
8509344530SPriyanka Jain ret = -1;
8609344530SPriyanka Jain }
8709344530SPriyanka Jain
8809344530SPriyanka Jain tmp->tm_sec = bcd2bin(sec & 0x7F);
8909344530SPriyanka Jain tmp->tm_min = bcd2bin(min & 0x7F);
9009344530SPriyanka Jain tmp->tm_hour = bcd2bin(hour & 0x3F);
9109344530SPriyanka Jain tmp->tm_mday = bcd2bin(mday & 0x3F);
9209344530SPriyanka Jain tmp->tm_mon = bcd2bin(mon & 0x1F);
9309344530SPriyanka Jain tmp->tm_year = bcd2bin(year) + 2000;
9409344530SPriyanka Jain tmp->tm_wday = bcd2bin((wday - 1) & 0x07);
9509344530SPriyanka Jain tmp->tm_yday = 0;
9609344530SPriyanka Jain tmp->tm_isdst = 0;
9709344530SPriyanka Jain debug("Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
9809344530SPriyanka Jain tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
9909344530SPriyanka Jain tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
10009344530SPriyanka Jain
10109344530SPriyanka Jain return ret;
10209344530SPriyanka Jain }
10309344530SPriyanka Jain
10409344530SPriyanka Jain /* Set the RTC */
rtc_set(struct rtc_time * tmp)10509344530SPriyanka Jain int rtc_set(struct rtc_time *tmp)
10609344530SPriyanka Jain {
10709344530SPriyanka Jain debug("Set DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
10809344530SPriyanka Jain tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
10909344530SPriyanka Jain tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
11009344530SPriyanka Jain
11109344530SPriyanka Jain rtc_write(RTC_YR_REG_ADDR, bin2bcd(tmp->tm_year % 100));
11209344530SPriyanka Jain rtc_write(RTC_MON_REG_ADDR, bin2bcd(tmp->tm_mon));
11309344530SPriyanka Jain rtc_write(RTC_DAY_REG_ADDR, bin2bcd(tmp->tm_wday + 1));
11409344530SPriyanka Jain rtc_write(RTC_DATE_REG_ADDR, bin2bcd(tmp->tm_mday));
11509344530SPriyanka Jain rtc_write(RTC_HR_REG_ADDR, bin2bcd(tmp->tm_hour));
11609344530SPriyanka Jain rtc_write(RTC_MIN_REG_ADDR, bin2bcd(tmp->tm_min));
11709344530SPriyanka Jain rtc_write(RTC_SEC_REG_ADDR, bin2bcd(tmp->tm_sec));
11809344530SPriyanka Jain
11909344530SPriyanka Jain return 0;
12009344530SPriyanka Jain }
12109344530SPriyanka Jain
12209344530SPriyanka Jain /* Reset the RTC */
rtc_reset(void)12309344530SPriyanka Jain void rtc_reset(void)
12409344530SPriyanka Jain {
12509344530SPriyanka Jain rtc_write(RTC_SEC_REG_ADDR, 0x00); /* clearing Clock Halt */
12609344530SPriyanka Jain rtc_write(RTC_CTL_STAT_REG_ADDR, RTC_PT7C4338_RESET_VAL);
12709344530SPriyanka Jain }
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