Lines Matching refs:RTC_SEC_REG_ADDR
32 #define RTC_SEC_REG_ADDR 0x00 macro
86 sec = rtc_read (RTC_SEC_REG_ADDR); in rtc_get()
102 rtc_write (RTC_SEC_REG_ADDR, in rtc_get()
103 rtc_read (RTC_SEC_REG_ADDR) & ~RTC_SEC_BIT_CH); in rtc_get()
117 rtc_write(RTC_SEC_REG_ADDR, MCP7941X_BIT_ST); in rtc_get()
166 rtc_write (RTC_SEC_REG_ADDR, bin2bcd (tmp->tm_sec) | MCP7941X_BIT_ST); in rtc_set()
168 rtc_write (RTC_SEC_REG_ADDR, bin2bcd (tmp->tm_sec)); in rtc_set()
184 rtc_write (RTC_SEC_REG_ADDR, 0x00); /* clearing Clock Halt */ in rtc_reset()
227 buf[RTC_SEC_REG_ADDR] = bin2bcd(tm->tm_sec); in ds1307_rtc_set()
231 buf[RTC_SEC_REG_ADDR] |= MCP7941X_BIT_ST; in ds1307_rtc_set()
253 if (buf[RTC_SEC_REG_ADDR] & RTC_SEC_BIT_CH) { in ds1307_rtc_get()
256 buf[RTC_SEC_REG_ADDR] &= ~RTC_SEC_BIT_CH; in ds1307_rtc_get()
257 dm_i2c_reg_write(dev, RTC_SEC_REG_ADDR, in ds1307_rtc_get()
258 buf[RTC_SEC_REG_ADDR]); in ds1307_rtc_get()
272 if (!(buf[RTC_SEC_REG_ADDR] & MCP7941X_BIT_ST)) { in ds1307_rtc_get()
273 dm_i2c_reg_write(dev, RTC_SEC_REG_ADDR, in ds1307_rtc_get()
280 tm->tm_sec = bcd2bin(buf[RTC_SEC_REG_ADDR] & 0x7F); in ds1307_rtc_get()
304 ret = dm_i2c_reg_write(dev, RTC_SEC_REG_ADDR, 0x00); in ds1307_rtc_reset()