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Searched refs:REG_BASE (Results 1 – 12 of 12) sorted by relevance

/openbmc/linux/arch/mips/n64/
H A Dinit.c53 #define REG_BASE ((u32 *) CKSEG1ADDR(0x4400000)) macro
57 __raw_writel(value, REG_BASE + reg); in n64rdp_write_reg()
60 #undef REG_BASE
/openbmc/linux/drivers/pinctrl/qcom/
H A Dpinctrl-sdx65.c12 #define REG_BASE 0x0 macro
32 .ctl_reg = REG_BASE + REG_SIZE * id, \
33 .io_reg = REG_BASE + 0x4 + REG_SIZE * id, \
34 .intr_cfg_reg = REG_BASE + 0x8 + REG_SIZE * id, \
35 .intr_status_reg = REG_BASE + 0xc + REG_SIZE * id, \
36 .intr_target_reg = REG_BASE + 0x8 + REG_SIZE * id, \
H A Dpinctrl-qdu1000.c13 #define REG_BASE 0x100000 macro
34 .ctl_reg = REG_BASE + REG_SIZE * id, \
35 .io_reg = REG_BASE + 0x4 + REG_SIZE * id, \
36 .intr_cfg_reg = REG_BASE + 0x8 + REG_SIZE * id, \
37 .intr_status_reg = REG_BASE + 0xc + REG_SIZE * id, \
38 .intr_target_reg = REG_BASE + 0x8 + REG_SIZE * id, \
60 .ctl_reg = REG_BASE + ctl, \
H A Dpinctrl-sdx75.c11 #define REG_BASE 0x100000 macro
18 .ctl_reg = REG_BASE + REG_SIZE * id, \
19 .io_reg = REG_BASE + 0x4 + REG_SIZE * id, \
20 .intr_cfg_reg = REG_BASE + 0x8 + REG_SIZE * id, \
21 .intr_status_reg = REG_BASE + 0xc + REG_SIZE * id, \
22 .intr_target_reg = REG_BASE + 0x8 + REG_SIZE * id, \
H A Dpinctrl-msm8976.c14 #define REG_BASE 0x0 macro
34 .ctl_reg = REG_BASE + REG_SIZE * id, \
35 .io_reg = REG_BASE + 0x4 + REG_SIZE * id, \
36 .intr_cfg_reg = REG_BASE + 0x8 + REG_SIZE * id, \
37 .intr_status_reg = REG_BASE + 0xc + REG_SIZE * id, \
38 .intr_target_reg = REG_BASE + 0x8 + REG_SIZE * id, \
H A Dpinctrl-sa8775p.c13 #define REG_BASE 0x100000 macro
33 .ctl_reg = REG_BASE + REG_SIZE * id, \
34 .io_reg = REG_BASE + 0x4 + REG_SIZE * id, \
35 .intr_cfg_reg = REG_BASE + 0x8 + REG_SIZE * id, \
36 .intr_status_reg = REG_BASE + 0xc + REG_SIZE * id, \
37 .intr_target_reg = REG_BASE + 0x8 + REG_SIZE * id, \
H A Dpinctrl-msm8996.c12 #define REG_BASE 0x0 macro
32 .ctl_reg = REG_BASE + REG_SIZE * id, \
33 .io_reg = REG_BASE + 0x4 + REG_SIZE * id, \
34 .intr_cfg_reg = REG_BASE + 0x8 + REG_SIZE * id, \
35 .intr_status_reg = REG_BASE + 0xc + REG_SIZE * id, \
36 .intr_target_reg = REG_BASE + 0x8 + REG_SIZE * id, \
H A Dpinctrl-sm6375.c13 #define REG_BASE 0x100000 macro
/openbmc/linux/drivers/atm/
H A Dmidway.h23 #define REG_BASE 0x00040000 /* offset of Midway register area */ macro
H A Diphase.h632 #define REG_BASE IPHASE5575_BUS_CONTROL_REG_BASE macro
H A Deni.c1748 eni_dev->reg = base+REG_BASE; in eni_do_init()
H A Diphase.c2388 iadev->reg = base + REG_BASE;