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Searched refs:PCI_BASE_ADDRESS_1 (Results 1 – 18 of 18) sorted by relevance

/openbmc/u-boot/board/freescale/common/
H A Dcds_via.c50 pci_hose_write_config_dword(hose, dev, PCI_BASE_ADDRESS_1, 0x1ff4); in mpc85xx_config_via_usbide()
81 pci_hose_write_config_dword(hose, dev, PCI_BASE_ADDRESS_1, 0x1dfc); in mpc85xx_config_via_power()
/openbmc/u-boot/drivers/bios_emulator/
H A Datibios.c386 dm_pci_read_config32(pcidev, PCI_BASE_ADDRESS_1, &saveBaseAddress14); in PCI_mapBIOSImage()
392 pci_read_config_dword(pcidev, PCI_BASE_ADDRESS_1, &saveBaseAddress14); in PCI_mapBIOSImage()
399 PCI_fixupIObase(pcidev, PCI_BASE_ADDRESS_1, &saveBaseAddress14); in PCI_mapBIOSImage()
453 dm_pci_write_config32(pcidev, PCI_BASE_ADDRESS_1, saveBaseAddress14); in PCI_unmapBIOSImage()
462 pci_write_config_dword(pcidev, PCI_BASE_ADDRESS_1, saveBaseAddress14); in PCI_unmapBIOSImage()
/openbmc/u-boot/drivers/misc/
H A Dswap_case.c94 case PCI_BASE_ADDRESS_1: in sandbox_swap_case_read_config()
166 case PCI_BASE_ADDRESS_1: { in sandbox_swap_case_write_config()
/openbmc/u-boot/board/freescale/mpc8572ds/
H A Dmpc8572ds.c131 PCI_BASE_ADDRESS_1, &temp32); in pci_init_board()
/openbmc/u-boot/drivers/pci/
H A Dpcie_layerscape.c327 dbi_writel(pcie, 0, PCIE_CS2_OFFSET + PCI_BASE_ADDRESS_1); in ls_pcie_disable_bars()
380 writel(size - 1, bar_base + PCI_BASE_ADDRESS_1); in ls_pcie_ep_setup_bar()
H A Dpci-rcar-gen2.c206 writel(CONFIG_SYS_SDRAM_BASE & 0xf0000000, devad + PCI_BASE_ADDRESS_1); in rcar_gen2_pci_probe()
/openbmc/u-boot/cmd/
H A Dpci.c187 { "base address 1", PCI_SIZE_32, PCI_BASE_ADDRESS_1 },
204 { "base address 1", PCI_SIZE_32, PCI_BASE_ADDRESS_1 },
H A Duniverse.c55 pci_read_config_dword(busdevfn, PCI_BASE_ADDRESS_1, &val); in universe_init()
/openbmc/u-boot/drivers/net/
H A Drtl8139.c210 pci_read_config_dword(devno, PCI_BASE_ADDRESS_1, &iobase); in rtl8139_initialize()
H A Dpch_gbe.c448 iobase = dm_pci_map_bar(dev, PCI_BASE_ADDRESS_1, PCI_REGION_MEM); in pch_gbe_probe()
H A Dns8382x.c320 pci_read_config_dword(devno, PCI_BASE_ADDRESS_1, &iobase); in ns8382x_initialize()
H A Ddc2114x.c259 pci_read_config_dword(devbusfn, PCI_BASE_ADDRESS_1, &iobase); in dc21x4x_initialize()
H A Duli526x.c218 pci_read_config_dword(devno, PCI_BASE_ADDRESS_1, &iobase); in uli526x_initialize()
/openbmc/qemu/hw/pci-host/
H A Dgt64120.c1234 pci_set_long(d->wmask + PCI_BASE_ADDRESS_1, 0xfffff008); /* SCS[3:2] */ in gt64120_pci_realize()
1253 pci_set_long(d->config + PCI_BASE_ADDRESS_1, 0x01000008); in gt64120_pci_reset_hold()
/openbmc/qemu/tests/qtest/libqos/
H A Dpci.c522 PCI_BASE_ADDRESS_0, PCI_BASE_ADDRESS_1, PCI_BASE_ADDRESS_2, in qpci_iomap()
/openbmc/u-boot/drivers/ata/
H A Dsata_sil3114.c655 pci_read_config_dword (devno, PCI_BASE_ADDRESS_1, &iobase[1]); in init_sata()
/openbmc/u-boot/include/
H A Dpci.h201 #define PCI_BASE_ADDRESS_1 0x14 /* 32 bits [htype 0,1 only] */ macro
/openbmc/qemu/hw/xen/
H A Dxen_pt_config_init.c722 .offset = PCI_BASE_ADDRESS_1,