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Searched refs:MSR_IA32_APICBASE (Results 1 – 23 of 23) sorted by relevance

/openbmc/linux/tools/testing/selftests/kvm/lib/x86_64/
H A Dapic.c10 wrmsr(MSR_IA32_APICBASE, in apic_disable()
11 rdmsr(MSR_IA32_APICBASE) & in apic_disable()
17 uint64_t val = rdmsr(MSR_IA32_APICBASE); in xapic_enable()
22 wrmsr(MSR_IA32_APICBASE, in xapic_enable()
23 rdmsr(MSR_IA32_APICBASE) | MSR_IA32_APICBASE_ENABLE); in xapic_enable()
25 wrmsr(MSR_IA32_APICBASE, val | MSR_IA32_APICBASE_ENABLE); in xapic_enable()
39 wrmsr(MSR_IA32_APICBASE, rdmsr(MSR_IA32_APICBASE) | in x2apic_enable()
/openbmc/u-boot/arch/x86/cpu/
H A Dlapic.c70 msr = msr_read(MSR_IA32_APICBASE); in enable_lapic()
75 msr_write(MSR_IA32_APICBASE, msr); in enable_lapic()
84 msr = msr_read(MSR_IA32_APICBASE); in disable_lapic()
86 msr_write(MSR_IA32_APICBASE, msr); in disable_lapic()
/openbmc/linux/tools/testing/selftests/kvm/x86_64/
H A Drecalc_apic_map_test.c58 vcpu_set_msr(vcpus[i], MSR_IA32_APICBASE, LAPIC_X2APIC); in main()
64 vcpu_set_msr(vcpuN, MSR_IA32_APICBASE, LAPIC_X2APIC); in main()
65 vcpu_set_msr(vcpuN, MSR_IA32_APICBASE, LAPIC_DISABLED); in main()
H A Dsmm_test.c71 uint64_t apicbase = rdmsr(MSR_IA32_APICBASE); in guest_code()
77 wrmsr(MSR_IA32_APICBASE, apicbase | X2APIC_ENABLE); in guest_code()
H A Dxapic_state_test.c140 vcpu_set_msr(vcpu, MSR_IA32_APICBASE, apic_base); in __test_apic_id()
173 apic_base = vcpu_get_msr(vcpus[i], MSR_IA32_APICBASE); in test_apic_id()
H A Ducna_injection_test.c74 uint64_t msr = rdmsr(MSR_IA32_APICBASE); in verify_apic_base_addr()
H A Dxapic_ipi_test.c85 uint64_t msr = rdmsr(MSR_IA32_APICBASE); in verify_apic_base_addr()
/openbmc/linux/tools/testing/selftests/kvm/include/x86_64/
H A Dapic.h18 #define MSR_IA32_APICBASE 0x0000001b macro
70 return rdmsr(MSR_IA32_APICBASE) & MSR_IA32_APICBASE_BSP; in get_bsp_flag()
/openbmc/linux/arch/x86/kernel/apic/
H A Dapic.c1219 rdmsr(MSR_IA32_APICBASE, l, h); in disable_local_APIC()
1221 wrmsr(MSR_IA32_APICBASE, l, h); in disable_local_APIC()
1757 rdmsrl(MSR_IA32_APICBASE, msr); in __x2apic_disable()
1761 wrmsrl(MSR_IA32_APICBASE, msr & ~(X2APIC_ENABLE | XAPIC_ENABLE)); in __x2apic_disable()
1762 wrmsrl(MSR_IA32_APICBASE, msr & ~X2APIC_ENABLE); in __x2apic_disable()
1770 rdmsrl(MSR_IA32_APICBASE, msr); in __x2apic_enable()
1773 wrmsrl(MSR_IA32_APICBASE, msr | X2APIC_ENABLE); in __x2apic_enable()
2008 rdmsr(MSR_IA32_APICBASE, l, h); in apic_verify()
2031 rdmsr(MSR_IA32_APICBASE, l, h); in apic_force_enable()
2036 wrmsr(MSR_IA32_APICBASE, l, h); in apic_force_enable()
[all …]
/openbmc/qemu/target/i386/tcg/sysemu/
H A Dmisc_helper.c151 case MSR_IA32_APICBASE: { in helper_wrmsr()
345 case MSR_IA32_APICBASE: in helper_rdmsr()
/openbmc/u-boot/arch/x86/include/asm/
H A Dmsr-index.h370 #define MSR_IA32_APICBASE 0x0000001b macro
/openbmc/linux/arch/x86/include/asm/
H A Dapic.h115 if (rdmsrl_safe(MSR_IA32_APICBASE, &msr)) in apic_is_x2apic_enabled()
H A Dmsr-index.h805 #define MSR_IA32_APICBASE 0x0000001b macro
/openbmc/linux/arch/x86/kernel/
H A Dhead_64.S254 mov $MSR_IA32_APICBASE, %ecx
/openbmc/qemu/target/i386/nvmm/
H A Dnvmm-all.c570 case MSR_IA32_APICBASE: in nvmm_handle_rdmsr()
617 case MSR_IA32_APICBASE: in nvmm_handle_wrmsr()
/openbmc/linux/tools/arch/x86/include/asm/
H A Dmsr-index.h783 #define MSR_IA32_APICBASE 0x0000001b macro
/openbmc/qemu/target/i386/hvf/
H A Dx86_emu.c686 case MSR_IA32_APICBASE: in simulate_rdmsr()
797 case MSR_IA32_APICBASE: { in simulate_wrmsr()
H A Dx86hvf.c234 hv_vcpu_read_msr(cs->accel->fd, MSR_IA32_APICBASE, &tmp); in hvf_get_msrs()
/openbmc/linux/arch/x86/xen/
H A Denlighten_pv.c1025 case MSR_IA32_APICBASE: in xen_do_read_msr()
/openbmc/qemu/target/i386/
H A Dcpu.h387 #define MSR_IA32_APICBASE 0x1b macro
/openbmc/linux/arch/x86/kvm/
H A Dx86.c3730 case MSR_IA32_APICBASE: in kvm_set_msr_common()
4160 case MSR_IA32_APICBASE: in kvm_get_msr_common()
/openbmc/qemu/target/i386/kvm/
H A Dkvm.c3622 ret = kvm_put_one_msr(cpu, MSR_IA32_APICBASE, value); in kvm_put_apicbase()
/openbmc/linux/Documentation/virt/kvm/
H A Dapi.rst1966 (reported by MSR_IA32_APICBASE) of its VCPU. x2APIC stores APIC ID in
1970 be called after MSR_IA32_APICBASE has been set with KVM_SET_MSR.