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Searched refs:MOSI (Results 1 – 25 of 35) sorted by relevance

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/openbmc/u-boot/board/renesas/stout/
H A Dcpld.c17 #define MOSI (92 + 26) macro
33 gpio_set_value(MOSI, addr & 0x80); /* MSB first */ in cpld_read()
39 gpio_set_value(MOSI, 0); /* READ */ in cpld_read()
60 gpio_set_value(MOSI, data & (1 << 31)); /* MSB first */ in cpld_write()
67 gpio_set_value(MOSI, addr & 0x80); /* MSB first */ in cpld_write()
73 gpio_set_value(MOSI, 1); /* WRITE */ in cpld_write()
95 gpio_request(MOSI, "MOSI"); in cpld_init()
100 gpio_direction_output(MOSI, 0); in cpld_init()
/openbmc/linux/Documentation/spi/
H A Dbutterfly.rst37 MOSI J403.PB2/MOSI pin 9/D7
68 MOSI J403.PE5/DI pin 6/D4
/openbmc/linux/Documentation/driver-api/
H A Dspi.rst7 often in the range of 1-20 MHz), a "Master Out, Slave In" (MOSI) data
9 duplex protocol; for each bit shifted out the MOSI line (one per clock)
/openbmc/linux/Documentation/devicetree/bindings/leds/irled/
H A Dir-spi-led.yaml13 IR LED switch is connected to the MOSI line of the SPI device and the data
/openbmc/u-boot/doc/device-tree-bindings/spi/
H A Dsoft-spi.txt14 gpio-mosi: GPIO to use for SPI MOSI line (output)
H A Dspi-bus.txt59 used for MOSI. Defaults to 1 if not present.
/openbmc/linux/Documentation/devicetree/bindings/spi/
H A Dspi-gpio.yaml32 description: GPIO spec for the MOSI line to use
H A Dspi-mux.yaml16 MOSI /--------------------------------+--------+--------+--------\
/openbmc/linux/arch/arm/boot/dts/st/
H A Dste-nomadik-nhk15.dts209 * and MOSI (in the spec MOSI is called "SDA").
/openbmc/linux/Documentation/devicetree/bindings/leds/
H A Dleds-spi-byte.txt4 - one LED is controlled by a single byte on MOSI
/openbmc/linux/arch/arm64/boot/dts/renesas/
H A Drzg2ul-smarc-pinfunction.dtsi110 <RZG2L_PORT_PINMUX(4, 1, 2)>, /* MOSI */
H A Drzg2lc-smarc-pinfunction.dtsi120 <RZG2L_PORT_PINMUX(44, 1, 1)>, /* MOSI */
H A Drzg2l-smarc-pinfunction.dtsi134 <RZG2L_PORT_PINMUX(44, 1, 1)>, /* MOSI */
/openbmc/u-boot/arch/arm/dts/
H A Darmada-8040-clearfog-gt-8k.dts213 * [9.11]CP1 SPI0 MOSI/MISO/CLK
216 * [15] CP1 SPI1 MOSI (TDM and SPI ROM shared)
H A Darmada-8040-mcbin.dts228 * [15] SPI1 MOSI (TDM and SPI ROM shared)
H A Dsun7i-a20-bananapi.dts250 "", "", "SPI-CE0", "SPI-CLK", "SPI-MOSI",
H A Darmada-385-turris-omnia.dts377 /* MISO, MOSI, SCLK and CS1 are routed to pin header CN11 */
/openbmc/linux/Documentation/hwmon/
H A Dlm70.rst46 comprise the MOSI/MISO loop. At the end of the transfer, the 11-bit 2's
/openbmc/linux/Documentation/devicetree/bindings/iio/adc/
H A Dadi,ad7476.yaml15 They typically don't provide a MOSI pin, simply reading out data
/openbmc/linux/arch/arm/boot/dts/microchip/
H A Dlan966x-kontron-kswitch-d10-mmt.dtsi56 /* SCK, MISO, MOSI */
/openbmc/linux/arch/arm64/boot/dts/marvell/
H A Darmada-8040-clearfog-gt-8k.dts432 * [9.11]CP1 SPI0 MOSI/MISO/CLK
435 * [15] CP1 SPI1 MOSI (TDM and SPI ROM shared)
/openbmc/linux/arch/arm64/boot/dts/amlogic/
H A Dmeson-gxl-s805x-libretech-ac.dts248 "SPI NOR MOSI", "SPI NOR MISO", "SPI NOR Clk",
/openbmc/linux/arch/arm64/boot/dts/qcom/
H A Dsm8550.dtsi3301 /* MISO, MOSI, CLK */
3316 /* MISO, MOSI, CLK */
3331 /* MISO, MOSI, CLK */
3346 /* MISO, MOSI, CLK */
3361 /* MISO, MOSI, CLK */
3376 /* MISO, MOSI, CLK */
3391 /* MISO, MOSI, CLK */
3406 /* MISO, MOSI, CLK */
3421 /* MISO, MOSI, CLK */
3436 /* MISO, MOSI, CLK */
[all …]
/openbmc/linux/arch/arm/boot/dts/allwinner/
H A Dsun7i-a20-bananapi.dts246 "", "", "SPI-CE0", "SPI-CLK", "SPI-MOSI",
/openbmc/linux/arch/arm/boot/dts/intel/pxa/
H A Dpxa300-raumfeld-common.dtsi332 MFP_PIN_PXA300(97) MFP_AF0 /* MOSI */

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