Revision tags: v6.6.25, v6.6.24, v6.6.23, v6.6.16, v6.6.15, v6.6.14, v6.6.13, v6.6.12, v6.6.11, v6.6.10, v6.6.9, v6.6.8, v6.6.7, v6.6.6, v6.6.5, v6.6.4, v6.6.3, v6.6.2, v6.5.11, v6.6.1, v6.5.10, v6.6, v6.5.9, v6.5.8, v6.5.7, v6.5.6, v6.5.5, v6.5.4, v6.5.3, v6.5.2, v6.1.51, v6.5.1, v6.1.50, v6.5, v6.1.49, v6.1.48, v6.1.46, v6.1.45, v6.1.44, v6.1.43, v6.1.42, v6.1.41, v6.1.40, v6.1.39, v6.1.38, v6.1.37, v6.1.36, v6.4, v6.1.35, v6.1.34, v6.1.33, v6.1.32, v6.1.31, v6.1.30, v6.1.29, v6.1.28, v6.1.27, v6.1.26, v6.3, v6.1.25, v6.1.24, v6.1.23, v6.1.22, v6.1.21, v6.1.20, v6.1.19, v6.1.18, v6.1.17, v6.1.16, v6.1.15, v6.1.14, v6.1.13, v6.2, v6.1.12, v6.1.11, v6.1.10, v6.1.9, v6.1.8, v6.1.7, v6.1.6, v6.1.5, v6.0.19, v6.0.18, v6.1.4, v6.1.3, v6.0.17, v6.1.2, v6.0.16, v6.1.1, v6.0.15, v6.0.14, v6.0.13, v6.1, v6.0.12, v6.0.11, v6.0.10, v5.15.80, v6.0.9, v5.15.79, v6.0.8, v5.15.78, v6.0.7, v5.15.77, v5.15.76, v6.0.6, v6.0.5, v5.15.75, v6.0.4, v6.0.3, v6.0.2, v5.15.74, v5.15.73, v6.0.1, v5.15.72, v6.0, v5.15.71, v5.15.70, v5.15.69, v5.15.68, v5.15.67, v5.15.66, v5.15.65, v5.15.64, v5.15.63, v5.15.62, v5.15.61, v5.15.60, v5.15.59, v5.19, v5.15.58, v5.15.57, v5.15.56, v5.15.55, v5.15.54, v5.15.53 |
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#
4ce223e5 |
| 07-Jul-2022 |
Ioana Ciornei <ioana.ciornei@nxp.com> |
arch: arm64: dts: marvell: rename the sfp GPIO properties
Rename the GPIO related sfp properties to include the preffered -gpios suffix. Also, with this change the dtb_check will no longer complain
arch: arm64: dts: marvell: rename the sfp GPIO properties
Rename the GPIO related sfp properties to include the preffered -gpios suffix. Also, with this change the dtb_check will no longer complain when trying to verify the DTS against the sff,sfp.yaml binding.
Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
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Revision tags: v5.15.52, v5.15.51, v5.15.50, v5.15.49, v5.15.48 |
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#
ebb8ba54 |
| 15-Jun-2022 |
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> |
arm64: dts: marvell: align gpio-key node names with dtschema
The node names should be generic and DT schema expects certain pattern (e.g. with key/button/switch).
Signed-off-by: Krzysztof Kozlowski
arm64: dts: marvell: align gpio-key node names with dtschema
The node names should be generic and DT schema expects certain pattern (e.g. with key/button/switch).
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20220616005333.18491-11-krzysztof.kozlowski@linaro.org
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Revision tags: v5.15.47, v5.15.46, v5.15.45, v5.15.44, v5.15.43, v5.15.42, v5.18, v5.15.41, v5.15.40, v5.15.39, v5.15.38, v5.15.37, v5.15.36, v5.15.35, v5.15.34, v5.15.33 |
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#
2f00bb4a |
| 07-Apr-2022 |
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> |
arm64: dts: marvell: align SPI NOR node name with dtschema
The node names should be generic and SPI NOR dtschema expects "flash".
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
arm64: dts: marvell: align SPI NOR node name with dtschema
The node names should be generic and SPI NOR dtschema expects "flash".
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20220407143234.295426-2-krzysztof.kozlowski@linaro.org
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Revision tags: v5.15.32, v5.15.31, v5.17, v5.15.30, v5.15.29, v5.15.28, v5.15.27, v5.15.26, v5.15.25, v5.15.24, v5.15.23, v5.15.22, v5.15.21, v5.15.20, v5.15.19, v5.15.18, v5.15.17, v5.4.173, v5.15.16, v5.15.15, v5.16, v5.15.10, v5.15.9, v5.15.8, v5.15.7, v5.15.6, v5.15.5, v5.15.4, v5.15.3, v5.15.2, v5.15.1, v5.15, v5.14.14, v5.14.13, v5.14.12, v5.14.11, v5.14.10, v5.14.9, v5.14.8, v5.14.7, v5.14.6, v5.10.67, v5.10.66, v5.14.5, v5.14.4, v5.10.65, v5.14.3, v5.10.64, v5.14.2, v5.10.63, v5.14.1, v5.10.62, v5.14, v5.10.61 |
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#
9e62ec0e |
| 23-Aug-2021 |
Rob Herring <robh@kernel.org> |
arm/arm64: dts: Fix remaining dtc 'unit_address_format' warnings
Fix all the remaining dtc 'unit_address_format' warnings except for the ones related to 'register-bit-led'. For those, we need to dec
arm/arm64: dts: Fix remaining dtc 'unit_address_format' warnings
Fix all the remaining dtc 'unit_address_format' warnings except for the ones related to 'register-bit-led'. For those, we need to decide on and document the node name.
Signed-off-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20210823165126.2320910-1-robh@kernel.org' Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Revision tags: v5.10.60, v5.10.53, v5.10.52, v5.10.51, v5.10.50, v5.10.49, v5.13, v5.10.46, v5.10.43, v5.10.42, v5.10.41, v5.10.40, v5.10.39, v5.4.119, v5.10.36, v5.10.35, v5.10.34, v5.4.116, v5.10.33, v5.12, v5.10.32, v5.10.31, v5.10.30, v5.10.27, v5.10.26, v5.10.25, v5.10.24, v5.10.23 |
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#
9c7d1f4b |
| 09-Mar-2021 |
Russell King <rmk+kernel@armlinux.org.uk> |
arm64: dts: marvell: clearfog-gt-8k: add cooling maps
Add cooling maps suitable for a Noctua NF-A4/10 fan attached to the heat sink. The fan will toggle between two speeds in operation which seems
arm64: dts: marvell: clearfog-gt-8k: add cooling maps
Add cooling maps suitable for a Noctua NF-A4/10 fan attached to the heat sink. The fan will toggle between two speeds in operation which seems to be normal behaviour. More fine-grained steps may help to reduce this.
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
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#
2d36399c |
| 09-Mar-2021 |
Russell King <rmk+kernel@armlinux.org.uk> |
arm64: dts: marvell: clearfog-gt-8k: add pwm-fan
Add pwm-fan support for controlling the fan speed.
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk> Signed-off-by: Gregory CLEMENT <gregory.
arm64: dts: marvell: clearfog-gt-8k: add pwm-fan
Add pwm-fan support for controlling the fan speed.
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
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Revision tags: v5.10.22, v5.10.21, v5.10.20, v5.10.19, v5.4.101, v5.10.18, v5.10.17, v5.11, v5.10.16, v5.10.15, v5.10.14, v5.10, v5.8.17, v5.8.16, v5.8.15, v5.9, v5.8.14, v5.8.13, v5.8.12, v5.8.11, v5.8.10, v5.8.9, v5.8.8, v5.8.7, v5.8.6, v5.4.62, v5.8.5, v5.8.4, v5.4.61, v5.8.3, v5.4.60, v5.8.2, v5.4.59, v5.8.1, v5.4.58, v5.4.57, v5.4.56, v5.8, v5.7.12, v5.4.55, v5.7.11, v5.4.54, v5.7.10, v5.4.53 |
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#
7c6719a1 |
| 19-Jul-2020 |
Russell King <rmk+kernel@armlinux.org.uk> |
arm64: dts: clearfog-gt-8k: fix switch link configuration
The commit below caused a regression for clearfog-gt-8k, where the link between the switch and the host does not come up.
Investigation rev
arm64: dts: clearfog-gt-8k: fix switch link configuration
The commit below caused a regression for clearfog-gt-8k, where the link between the switch and the host does not come up.
Investigation revealed two issues: - MV88E6xxx DSA no longer allows an in-band link to come up as the link is programmed to be forced down. Commit "net: dsa: mv88e6xxx: fix in-band AN link establishment" addresses this.
- The dts configured dissimilar link modes at each end of the host to switch link; the host was configured using a fixed link (so has no in-band status) and the switch was configured to expect in-band status.
With both issues fixed, the regression is resolved.
Fixes: 34b5e6a33c1a ("net: dsa: mv88e6xxx: Configure MAC when using fixed link") Reported-by: Martin Rowe <martin.p.rowe@gmail.com> Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
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Revision tags: v5.4.52, v5.7.9, v5.7.8, v5.4.51, v5.4.50, v5.7.7, v5.4.49, v5.7.6, v5.7.5, v5.4.48, v5.7.4, v5.7.3, v5.4.47, v5.4.46, v5.7.2, v5.4.45, v5.7.1, v5.4.44, v5.7, v5.4.43, v5.4.42, v5.4.41, v5.4.40, v5.4.39, v5.4.38, v5.4.37, v5.4.36, v5.4.35, v5.4.34, v5.4.33, v5.4.32, v5.4.31, v5.4.30, v5.4.29, v5.6 |
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#
847c3323 |
| 27-Mar-2020 |
Russell King <rmk+kernel@armlinux.org.uk> |
arm64: dts: update SolidRun Armada 8040 phy interface types
Update the SolidRun Armada 8040 platforms phy interface types from the old 10gbase-kr to the newer and more correct 10gbase-r.
Signed-off
arm64: dts: update SolidRun Armada 8040 phy interface types
Update the SolidRun Armada 8040 platforms phy interface types from the old 10gbase-kr to the newer and more correct 10gbase-r.
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
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Revision tags: v5.4.28, v5.4.27, v5.4.26, v5.4.25, v5.4.24, v5.4.23 |
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#
46f94c78 |
| 25-Feb-2020 |
Russell King <rmk+kernel@armlinux.org.uk> |
arm64: dts: clearfog-gt-8k: set gigabit PHY reset deassert delay
If the mv88e6xxx DSA driver is built as a module, it causes the ethernet driver to re-probe when it's loaded. This in turn causes the
arm64: dts: clearfog-gt-8k: set gigabit PHY reset deassert delay
If the mv88e6xxx DSA driver is built as a module, it causes the ethernet driver to re-probe when it's loaded. This in turn causes the gigabit PHY to be momentarily reset and reprogrammed. However, we attempt to reprogram the PHY immediately after deasserting reset, and the PHY ignores the writes.
This results in the PHY operating in the wrong mode, and the copper link states down.
Set a reset deassert delay of 10ms for the gigabit PHY to avoid this.
Fixes: babc5544c293 ("arm64: dts: clearfog-gt-8k: 1G eth PHY reset signal") Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk> Acked-by: Baruch Siach <baruch@tkos.co.il> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
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Revision tags: v5.4.22, v5.4.21, v5.4.20, v5.4.19, v5.4.18, v5.4.17, v5.4.16, v5.5, v5.4.15, v5.4.14, v5.4.13, v5.4.12, v5.4.11, v5.4.10, v5.4.9, v5.4.8, v5.4.7, v5.4.6 |
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#
62bba54d |
| 19-Dec-2019 |
Baruch Siach <baruch@tkos.co.il> |
arm64: dts: marvell: clearfog-gt-8k: fix switch cpu port node
Explicitly set the switch cpu (upstream) port phy-mode and managed properties. This fixes the Marvell 88E6141 switch serdes configuratio
arm64: dts: marvell: clearfog-gt-8k: fix switch cpu port node
Explicitly set the switch cpu (upstream) port phy-mode and managed properties. This fixes the Marvell 88E6141 switch serdes configuration with the recently enabled phylink layer.
Fixes: a6120833272c ("arm64: dts: add support for SolidRun Clearfog GT 8K") Reported-by: Denis Odintsov <d.odintsov@traviangames.com> Signed-off-by: Baruch Siach <baruch@tkos.co.il> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
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Revision tags: v5.4.5, v5.4.4, v5.4.3, v5.3.15, v5.4.2, v5.4.1, v5.3.14, v5.4, v5.3.13, v5.3.12, v5.3.11, v5.3.10, v5.3.9, v5.3.8, v5.3.7, v5.3.6, v5.3.5, v5.3.4, v5.3.3, v5.3.2, v5.3.1, v5.3, v5.2.14, v5.3-rc8, v5.2.13, v5.2.12, v5.2.11, v5.2.10, v5.2.9, v5.2.8, v5.2.7, v5.2.6 |
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#
96018a6f |
| 31-Jul-2019 |
Miquel Raynal <miquel.raynal@bootlin.com> |
arm64: dts: marvell: Convert 7k/8k usb-phy properties to phy-supply
Update Aramda 7k/8k DTs to use the phy-supply property of the (recent) generic PHY framework instead of the (legacy) usb-phy prepe
arm64: dts: marvell: Convert 7k/8k usb-phy properties to phy-supply
Update Aramda 7k/8k DTs to use the phy-supply property of the (recent) generic PHY framework instead of the (legacy) usb-phy preperty. Both enable the supply when the PHY is enabled.
The COMPHY nodes only provide SERDES lanes configuration. The power supply that is represented by the phy-supply property is just a regulator wired to the USB connector, hence the creation of connector nodes as child of the COMPHY nodes and the supply attached to it.
Cc: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
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#
ce55522c |
| 31-Jul-2019 |
Miquel Raynal <miquel.raynal@bootlin.com> |
arm64: dts: marvell: Add 7k/8k PHYs in PCIe nodes
Fill-in the missing PCIe phys/phy-names DT properties of Armada 7k/8k based boards.
The MacchiatoBin is a bit particular as the Armada8k-PCI IP sup
arm64: dts: marvell: Add 7k/8k PHYs in PCIe nodes
Fill-in the missing PCIe phys/phy-names DT properties of Armada 7k/8k based boards.
The MacchiatoBin is a bit particular as the Armada8k-PCI IP supports x4 link widths and in this case the PHY for each lane must be referenced.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
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#
01d0deba |
| 31-Jul-2019 |
Miquel Raynal <miquel.raynal@bootlin.com> |
arm64: dts: marvell: Add 7k/8k PHYs in USB3 nodes
Fill-in the missing USB3 phys/phy-names DT properties of Armada 7k/8k based boards. Only update nodes actually enabling USB3 in the default (mainlin
arm64: dts: marvell: Add 7k/8k PHYs in USB3 nodes
Fill-in the missing USB3 phys/phy-names DT properties of Armada 7k/8k based boards. Only update nodes actually enabling USB3 in the default (mainline) configuration. A few USB nodes are enabled but there is only USB2 working on them.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
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#
d04abe99 |
| 31-Jul-2019 |
Miquel Raynal <miquel.raynal@bootlin.com> |
arm64: dts: marvell: Add 7k/8k per-port PHYs in SATA nodes
Fill-in the missing SATA phys/phy-names DT properties of Armada 7k/8k based boards.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.co
arm64: dts: marvell: Add 7k/8k per-port PHYs in SATA nodes
Fill-in the missing SATA phys/phy-names DT properties of Armada 7k/8k based boards.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
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Revision tags: v5.2.5, v5.2.4, v5.2.3, v5.2.2, v5.2.1, v5.2, v5.1.16, v5.1.15, v5.1.14, v5.1.13, v5.1.12, v5.1.11, v5.1.10, v5.1.9, v5.1.8, v5.1.7, v5.1.6, v5.1.5, v5.1.4 |
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#
188ea2fc |
| 19-May-2019 |
Baruch Siach <baruch@tkos.co.il> |
arm64: dts: marvell: clearfog-gt-8k: set SFP power limit
The Clearfog GT-8K board is capable of supplying power up to 2W to SFP modules. Make that explicit in the device-tree. Without this property
arm64: dts: marvell: clearfog-gt-8k: set SFP power limit
The Clearfog GT-8K board is capable of supplying power up to 2W to SFP modules. Make that explicit in the device-tree. Without this property current kernel does not allow SFP modules that require more than 1W.
Signed-off-by: Baruch Siach <baruch@tkos.co.il> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
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Revision tags: v5.1.3, v5.1.2, v5.1.1, v5.0.14, v5.1, v5.0.13, v5.0.12, v5.0.11, v5.0.10, v5.0.9, v5.0.8, v5.0.7, v5.0.6, v5.0.5, v5.0.4, v5.0.3, v4.19.29, v5.0.2, v4.19.28, v5.0.1, v4.19.27, v5.0, v4.19.26 |
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#
e97bb6d4 |
| 26-Feb-2019 |
Thomas Schreiber <tschreibe@gmail.com> |
arm64: dts: clearfog-gt-8k: add wlan_disable signal hog
There is currently no DT binding for GPIO rfkill signals. To make mini-PCIe attached WiFi devices work, use gpio-hog to hold the wlan_disable
arm64: dts: clearfog-gt-8k: add wlan_disable signal hog
There is currently no DT binding for GPIO rfkill signals. To make mini-PCIe attached WiFi devices work, use gpio-hog to hold the wlan_disable signal de-asserted.
Signed-off-by: Thomas Schreiber <tschreibe@gmail.com> [baruch: add pinctrl node; rename tag] Signed-off-by: Baruch Siach <baruch@tkos.co.il> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
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Revision tags: v4.19.25, v4.19.24 |
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#
bdd22a41 |
| 17-Feb-2019 |
Baruch Siach <baruch@tkos.co.il> |
arm64: dts: clearfog-gt-8k: fix SGMII PHY reset signal
The PHY reset signal goes to mpp43 on CP0.
Fixes: babc5544c293 ("arm64: dts: clearfog-gt-8k: 1G eth PHY reset signal") Reported-by: Denis Odin
arm64: dts: clearfog-gt-8k: fix SGMII PHY reset signal
The PHY reset signal goes to mpp43 on CP0.
Fixes: babc5544c293 ("arm64: dts: clearfog-gt-8k: 1G eth PHY reset signal") Reported-by: Denis Odintsov <oversun@me.com> Signed-off-by: Baruch Siach <baruch@tkos.co.il> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
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Revision tags: v4.19.23, v4.19.22, v4.19.21, v4.19.20, v4.19.19, v4.19.18, v4.19.17, v4.19.16, v4.19.15, v4.19.14, v4.19.13, v4.19.12, v4.19.11, v4.19.10, v4.19.9, v4.19.8 |
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#
dfc1259a |
| 06-Dec-2018 |
Baruch Siach <baruch@tkos.co.il> |
arm64: dts: clearfog-gt-8k: describe mini-PCIe CON2 USB
Enable the USB3 peripheral that is wired to CON2 on the Clearfog GT-8K board.
Signed-off-by: Baruch Siach <baruch@tkos.co.il> Signed-off-by:
arm64: dts: clearfog-gt-8k: describe mini-PCIe CON2 USB
Enable the USB3 peripheral that is wired to CON2 on the Clearfog GT-8K board.
Signed-off-by: Baruch Siach <baruch@tkos.co.il> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
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Revision tags: v4.19.7, v4.19.6, v4.19.5, v4.19.4, v4.18.20, v4.19.3, v4.18.19, v4.19.2, v4.18.18, v4.18.17, v4.19.1, v4.19, v4.18.16 |
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#
235df2d8 |
| 18-Oct-2018 |
Baruch Siach <baruch@tkos.co.il> |
arm64: dts: clearfog-gt-8k: enable mini-PCIe CON2 USB
Deassert the reset and wireless disable signals on the CON2 mini-PCIe socket. That allows the host to detect USB devices on the mini-PCIe socket
arm64: dts: clearfog-gt-8k: enable mini-PCIe CON2 USB
Deassert the reset and wireless disable signals on the CON2 mini-PCIe socket. That allows the host to detect USB devices on the mini-PCIe socket.
Signed-off-by: Baruch Siach <baruch@tkos.co.il> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
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Revision tags: v4.18.15 |
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#
babc5544 |
| 16-Oct-2018 |
Baruch Siach <baruch@tkos.co.il> |
arm64: dts: clearfog-gt-8k: 1G eth PHY reset signal
This reset signal controls the Marvell 1512 1G PHY.
Note that current implementation queries the PHY over the MDIO bus (get_phy_device() call fro
arm64: dts: clearfog-gt-8k: 1G eth PHY reset signal
This reset signal controls the Marvell 1512 1G PHY.
Note that current implementation queries the PHY over the MDIO bus (get_phy_device() call from of_mdiobus_register_phy()) before reset signal deassert. If the PHY reset signal is asserted at boot time, PHY registration fails. So current code relies on the bootloader to deassert the reset signal.
Signed-off-by: Baruch Siach <baruch@tkos.co.il> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
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b597a6f5 |
| 16-Oct-2018 |
Baruch Siach <baruch@tkos.co.il> |
arm64: dts: clearfog-gt-8k: fix USB regulator gpio polarity
The fixed regulator driver ignores the gpio flags, so this change has no practical effect in the current implementation. Fix it anyway to
arm64: dts: clearfog-gt-8k: fix USB regulator gpio polarity
The fixed regulator driver ignores the gpio flags, so this change has no practical effect in the current implementation. Fix it anyway to correct the hardware description.
Signed-off-by: Baruch Siach <baruch@tkos.co.il> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
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Revision tags: v4.18.14, v4.18.13, v4.18.12 |
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91f84690 |
| 03-Oct-2018 |
Baruch Siach <baruch@tkos.co.il> |
arm64: dts: clearfog-gt-8k: add PCIe slot description
This adds support for the PCIe interface on the CON4 mini-PCIe connector.
Signed-off-by: Baruch Siach <baruch@tkos.co.il> Signed-off-by: Gregor
arm64: dts: clearfog-gt-8k: add PCIe slot description
This adds support for the PCIe interface on the CON4 mini-PCIe connector.
Signed-off-by: Baruch Siach <baruch@tkos.co.il> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
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Revision tags: v4.18.11, v4.18.10 |
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a6120833 |
| 22-Sep-2018 |
Baruch Siach <baruch@tkos.co.il> |
arm64: dts: add support for SolidRun Clearfog GT 8K
The SolidRun Clearfog GT-8K is based on Marvell Armada 8040 SoC.
https://wiki.solid-run.com/doku.php?id=products:a8040:clearfoggt8k
The follow
arm64: dts: add support for SolidRun Clearfog GT 8K
The SolidRun Clearfog GT-8K is based on Marvell Armada 8040 SoC.
https://wiki.solid-run.com/doku.php?id=products:a8040:clearfoggt8k
The following devices were tested with this DT on top of kernel v4.19-rc4:
* 1GB Ethernet WAN
* 4 ports 1GB Ethernet switch (2.5GB uplink)
* SFP port
* SATA on CON3 PCIe slot
* USB3 type A port
* SD card and eMMC
* 2 LEDs
* 2 push buttons
[gregory: fix block comment alignement] Signed-off-by: Baruch Siach <baruch@tkos.co.il> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
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Revision tags: v5.10.22, v5.10.21, v5.10.20, v5.10.19, v5.4.101, v5.10.18, v5.10.17, v5.11, v5.10.16, v5.10.15, v5.10.14, v5.10, v5.8.17, v5.8.16, v5.8.15, v5.9, v5.8.14, v5.8.13, v5.8.12, v5.8.11, v5.8.10, v5.8.9, v5.8.8, v5.8.7, v5.8.6, v5.4.62, v5.8.5, v5.8.4, v5.4.61, v5.8.3, v5.4.60, v5.8.2, v5.4.59, v5.8.1, v5.4.58, v5.4.57, v5.4.56, v5.8, v5.7.12, v5.4.55, v5.7.11, v5.4.54, v5.7.10, v5.4.53 |
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7c6719a1 |
| 19-Jul-2020 |
Russell King <rmk+kernel@armlinux.org.uk> |
arm64: dts: clearfog-gt-8k: fix switch link configuration The commit below caused a regression for clearfog-gt-8k, where the link between the switch and the host does not come up.
arm64: dts: clearfog-gt-8k: fix switch link configuration The commit below caused a regression for clearfog-gt-8k, where the link between the switch and the host does not come up. Investigation revealed two issues: - MV88E6xxx DSA no longer allows an in-band link to come up as the link is programmed to be forced down. Commit "net: dsa: mv88e6xxx: fix in-band AN link establishment" addresses this. - The dts configured dissimilar link modes at each end of the host to switch link; the host was configured using a fixed link (so has no in-band status) and the switch was configured to expect in-band status. With both issues fixed, the regression is resolved. Fixes: 34b5e6a33c1a ("net: dsa: mv88e6xxx: Configure MAC when using fixed link") Reported-by: Martin Rowe <martin.p.rowe@gmail.com> Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
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Revision tags: v5.4.52, v5.7.9, v5.7.8, v5.4.51, v5.4.50, v5.7.7, v5.4.49, v5.7.6, v5.7.5, v5.4.48, v5.7.4, v5.7.3, v5.4.47, v5.4.46, v5.7.2, v5.4.45, v5.7.1, v5.4.44, v5.7, v5.4.43, v5.4.42, v5.4.41, v5.4.40, v5.4.39, v5.4.38, v5.4.37, v5.4.36, v5.4.35, v5.4.34, v5.4.33, v5.4.32, v5.4.31, v5.4.30, v5.4.29, v5.6 |
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847c3323 |
| 27-Mar-2020 |
Russell King <rmk+kernel@armlinux.org.uk> |
arm64: dts: update SolidRun Armada 8040 phy interface types Update the SolidRun Armada 8040 platforms phy interface types from the old 10gbase-kr to the newer and more correct 10gbase-r.
arm64: dts: update SolidRun Armada 8040 phy interface types Update the SolidRun Armada 8040 platforms phy interface types from the old 10gbase-kr to the newer and more correct 10gbase-r. Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
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