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Revision tags: v6.6.25, v6.6.24, v6.6.23, v6.6.16, v6.6.15, v6.6.14, v6.6.13, v6.6.12, v6.6.11, v6.6.10, v6.6.9, v6.6.8, v6.6.7, v6.6.6, v6.6.5, v6.6.4, v6.6.3, v6.6.2, v6.5.11, v6.6.1, v6.5.10, v6.6, v6.5.9, v6.5.8, v6.5.7, v6.5.6, v6.5.5, v6.5.4, v6.5.3, v6.5.2, v6.1.51, v6.5.1, v6.1.50, v6.5, v6.1.49, v6.1.48, v6.1.46, v6.1.45, v6.1.44, v6.1.43, v6.1.42, v6.1.41, v6.1.40, v6.1.39 |
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| #
5d7de61f |
| 07-Jul-2023 |
Biju Das <biju.das.jz@bp.renesas.com> |
arm64: dts: renesas: rzg2lc-smarc: Add support for enabling MTU3
Add support for PMOD_MTU3 macro to enable MTU3 node on RZ/G2LC SMARC
EVK.
The MTU3a PWM pins on PMOD0 are muxed with SPI1. Disable S
arm64: dts: renesas: rzg2lc-smarc: Add support for enabling MTU3
Add support for PMOD_MTU3 macro to enable MTU3 node on RZ/G2LC SMARC
EVK.
The MTU3a PWM pins on PMOD0 are muxed with SPI1. Disable SPI1, when
PMOD_MTU3 macro is enabled.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20230707155849.86649-1-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
show more ...
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Revision tags: v6.1.38, v6.1.37, v6.1.36, v6.4, v6.1.35, v6.1.34, v6.1.33, v6.1.32, v6.1.31, v6.1.30, v6.1.29, v6.1.28, v6.1.27, v6.1.26, v6.3, v6.1.25, v6.1.24, v6.1.23, v6.1.22, v6.1.21, v6.1.20, v6.1.19, v6.1.18, v6.1.17, v6.1.16, v6.1.15, v6.1.14, v6.1.13, v6.2, v6.1.12, v6.1.11, v6.1.10, v6.1.9, v6.1.8, v6.1.7, v6.1.6, v6.1.5, v6.0.19, v6.0.18, v6.1.4, v6.1.3, v6.0.17, v6.1.2, v6.0.16, v6.1.1, v6.0.15, v6.0.14, v6.0.13, v6.1, v6.0.12, v6.0.11, v6.0.10, v5.15.80, v6.0.9, v5.15.79, v6.0.8, v5.15.78, v6.0.7, v5.15.77, v5.15.76, v6.0.6, v6.0.5, v5.15.75, v6.0.4, v6.0.3, v6.0.2, v5.15.74, v5.15.73, v6.0.1, v5.15.72, v6.0, v5.15.71, v5.15.70, v5.15.69, v5.15.68, v5.15.67, v5.15.66, v5.15.65, v5.15.64, v5.15.63, v5.15.62, v5.15.61, v5.15.60, v5.15.59, v5.19, v5.15.58, v5.15.57, v5.15.56, v5.15.55, v5.15.54, v5.15.53, v5.15.52, v5.15.51, v5.15.50, v5.15.49, v5.15.48, v5.15.47, v5.15.46, v5.15.45, v5.15.44, v5.15.43, v5.15.42, v5.18, v5.15.41, v5.15.40, v5.15.39, v5.15.38, v5.15.37, v5.15.36, v5.15.35, v5.15.34, v5.15.33 |
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| #
061ba41c |
| 01-Apr-2022 |
Biju Das <biju.das.jz@bp.renesas.com> |
arm64: dts: renesas: rzg2lc-smarc: Enable RSPI1 on carrier board
RSPI1 (SPI1) interface is available on PMOD0 connector (J1) on the
carrier board. This patch adds pinmux and spi1 nodes to the carri
arm64: dts: renesas: rzg2lc-smarc: Enable RSPI1 on carrier board
RSPI1 (SPI1) interface is available on PMOD0 connector (J1) on the
carrier board. This patch adds pinmux and spi1 nodes to the carrier
board dtsi file and drops deleting pinctl* properties from DTS file.
RSPI1 interface is tested by setting the macro SW_RSPI_CAN to 0.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/20220401145702.17954-1-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
show more ...
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Revision tags: v5.15.32, v5.15.31, v5.17, v5.15.30, v5.15.29, v5.15.28, v5.15.27 |
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| #
4eb6a6bb |
| 03-Mar-2022 |
Biju Das <biju.das.jz@bp.renesas.com> |
arm64: dts: renesas: rzg2lc-smarc: Enable Audio
Enable Audio on RZ/G2LC SMARC EVK by deleting ssi0 entries from
board DT and adding pincontrol entries to the soc-pinctrl dtsi,
so that entries from c
arm64: dts: renesas: rzg2lc-smarc: Enable Audio
Enable Audio on RZ/G2LC SMARC EVK by deleting ssi0 entries from
board DT and adding pincontrol entries to the soc-pinctrl dtsi,
so that entries from common dtsi kick in and make audio functionality
operational.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/20220303164155.7706-5-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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| #
4fa1edc8 |
| 03-Mar-2022 |
Biju Das <biju.das.jz@bp.renesas.com> |
arm64: dts: renesas: rzg2lc-smarc: Enable i2c{0,1,2}
Enable i2c{0,1} on RZ/G2LC SMARC EVK by deleting respective
entries from board dts and adding pincontrol entries to the
soc-pinctrl dtsi. Also en
arm64: dts: renesas: rzg2lc-smarc: Enable i2c{0,1,2}
Enable i2c{0,1} on RZ/G2LC SMARC EVK by deleting respective
entries from board dts and adding pincontrol entries to the
soc-pinctrl dtsi. Also enable i2c2 by adding to soc dtsi.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/20220303164155.7706-4-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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| #
a2b642d8 |
| 03-Mar-2022 |
Biju Das <biju.das.jz@bp.renesas.com> |
arm64: dts: renesas: rzg2lc-smarc-pinfunction: Sort the nodes
Sort the pinctrl nodes alphabetically.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahad
arm64: dts: renesas: rzg2lc-smarc-pinfunction: Sort the nodes
Sort the pinctrl nodes alphabetically.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/20220303164155.7706-2-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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Revision tags: v5.15.26 |
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| #
1889f479 |
| 02-Mar-2022 |
Biju Das <biju.das.jz@bp.renesas.com> |
arm64: dts: renesas: r9a07g044c2-smarc: Enable usb2.0
Enable usb2.0 host/device functionality on RZ/G2LC SMARC EVK
by deleting phyrst, usb2_phy{0,1}, ehci/ohci{0,1} and hsusb
entries from board DT,
arm64: dts: renesas: r9a07g044c2-smarc: Enable usb2.0
Enable usb2.0 host/device functionality on RZ/G2LC SMARC EVK
by deleting phyrst, usb2_phy{0,1}, ehci/ohci{0,1} and hsusb
entries from board DT, so that entries from common dtsi kick
in and make USB2.0 functionality operational.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/20220302074043.21525-1-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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| #
48d8ee5b |
| 24-Feb-2022 |
Geert Uytterhoeven <geert+renesas@glider.be> |
arm64: dts: renesas: Align GPIO hog names with dtschema
Dtschema expects GPIO hogs to end with a "hog" suffix.
Also, the convention for node names is to use hyphens, not underscores.
Signed-off-by:
arm64: dts: renesas: Align GPIO hog names with dtschema
Dtschema expects GPIO hogs to end with a "hog" suffix.
Also, the convention for node names is to use hyphens, not underscores.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/baee4b9980576ffbab24122fce7147c9cbc2ea59.1645705998.git.geert+renesas@glider.be
show more ...
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Revision tags: v5.15.25, v5.15.24, v5.15.23, v5.15.22, v5.15.21, v5.15.20 |
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| #
46da6327 |
| 03-Feb-2022 |
Biju Das <biju.das.jz@bp.renesas.com> |
arm64: dts: renesas: rzg2lc-smarc: Enable CANFD channel 1
On RZ/G2LC SMARC EVK, CAN0 is not populated.
CAN1 is multiplexed with SCIF1 using SW1[3] or RSPI using SW1[4].
This patch adds support for
arm64: dts: renesas: rzg2lc-smarc: Enable CANFD channel 1
On RZ/G2LC SMARC EVK, CAN0 is not populated.
CAN1 is multiplexed with SCIF1 using SW1[3] or RSPI using SW1[4].
This patch adds support for the CAN1 interface on RZ/G2LC SMARC EVK.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/20220203170636.7747-5-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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| #
fa00d6dc |
| 03-Feb-2022 |
Biju Das <biju.das.jz@bp.renesas.com> |
arm64: dts: renesas: rzg2lc-smarc: Enable SCIF1 on carrier board
SCIF1 interface is available on PMOD1 connector (CN7) on carrier board.
This patch adds pinmux and scif1 node to carrier board dtsi
arm64: dts: renesas: rzg2lc-smarc: Enable SCIF1 on carrier board
SCIF1 interface is available on PMOD1 connector (CN7) on carrier board.
This patch adds pinmux and scif1 node to carrier board dtsi file for
RZ/G2LC SMARC EVK.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/20220203170636.7747-4-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
show more ...
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Revision tags: v5.15.19, v5.15.18, v5.15.17, v5.4.173, v5.15.16 |
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| #
81a27b1f |
| 17-Jan-2022 |
Biju Das <biju.das.jz@bp.renesas.com> |
arm64: dts: renesas: rzg2lc-smarc: Enable microSD on SMARC platform
Enable the microSD card slot connected to SDHI1 on the RZ/G2LC SMARC
platform by removing the sdhi1 override which disabled it, an
arm64: dts: renesas: rzg2lc-smarc: Enable microSD on SMARC platform
Enable the microSD card slot connected to SDHI1 on the RZ/G2LC SMARC
platform by removing the sdhi1 override which disabled it, and by adding
the necessary pinmux required for SDHI1.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/20220117075130.6198-2-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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Revision tags: v5.15.15, v5.16, v5.15.10, v5.15.9 |
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| #
ce0c63b6 |
| 16-Dec-2021 |
Biju Das <biju.das.jz@bp.renesas.com> |
arm64: dts: renesas: Add initial device tree for RZ/G2LC SMARC EVK
Add basic support for the RZ/G2LC SMARC EVK (based on R9A07G044C2):
- memory
- External input clock
- SCIF
- GbEthernet
- Audio Clo
arm64: dts: renesas: Add initial device tree for RZ/G2LC SMARC EVK
Add basic support for the RZ/G2LC SMARC EVK (based on R9A07G044C2):
- memory
- External input clock
- SCIF
- GbEthernet
- Audio Clock
It shares the same carrier board with RZ/G2L, but the pin mapping is
different. Disable the device nodes which are not tested and delete the
corresponding pinctrl definitions.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/20211216114305.5842-4-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
show more ...
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