| /openbmc/linux/arch/sh/mm/ |
| H A D | tlb-urb.c | 27 status = __raw_readl(MMUCR); in tlb_wire_entry()
43 __raw_writel(status, MMUCR); in tlb_wire_entry()
50 status = __raw_readl(MMUCR); in tlb_wire_entry()
55 __raw_writel(status, MMUCR); in tlb_wire_entry()
76 status = __raw_readl(MMUCR); in tlb_unwire_entry()
89 __raw_writel(status, MMUCR); in tlb_unwire_entry()
|
| H A D | tlb-sh3.c | 90 status = __raw_readl(MMUCR); in local_flush_tlb_all()
92 __raw_writel(status, MMUCR); in local_flush_tlb_all()
|
| H A D | tlbflush_32.c | 134 __raw_writel(__raw_readl(MMUCR) | MMUCR_TI, MMUCR); in __flush_tlb_global()
|
| H A D | tlb-pteaex.c | 91 status = __raw_readl(MMUCR); in local_flush_tlb_all()
|
| H A D | tlb-sh4.c | 93 status = __raw_readl(MMUCR); in local_flush_tlb_all()
|
| H A D | tlb-debugfs.c | 48 mmucr = __raw_readl(MMUCR); in tlb_seq_show()
|
| /openbmc/linux/arch/sh/include/asm/ |
| H A D | mmu_context.h | 150 __raw_writel(MMU_CONTROL_INIT, MMUCR); in enable_mmu()
163 cr = __raw_readl(MMUCR); in disable_mmu()
165 __raw_writel(cr, MMUCR); in disable_mmu()
|
| /openbmc/linux/arch/sh/include/cpu-sh3/cpu/ |
| H A D | mmu_context.h | 15 #define MMUCR 0xFFFFFFE0 /* MMU Control Register */ macro
|
| /openbmc/u-boot/arch/sh/include/asm/ |
| H A D | cpu_sh7706.h | 8 #define MMUCR 0xFFFFFFE0 macro
|
| H A D | cpu_sh7710.h | 8 #define MMUCR 0xFFFFFFE0 macro
|
| H A D | cpu_sh7750.h | 25 #define MMUCR 0xFF000010 macro
|
| H A D | cpu_sh7723.h | 24 #define MMUCR 0xFF000010 macro
|
| H A D | cpu_sh7724.h | 24 #define MMUCR 0xFF000010 macro
|
| H A D | cpu_sh7720.h | 24 #define MMUCR 0xFFFFFFE0 macro
|
| H A D | cpu_sh7780.h | 23 #define MMUCR 0xFF000010 macro
|
| /openbmc/linux/arch/sh/include/cpu-sh4/cpu/ |
| H A D | mmu_context.h | 17 #define MMUCR 0xFF000010 /* MMU Control Register */ macro
|
| /openbmc/linux/arch/m68k/include/asm/ |
| H A D | mcfmmu.h | 25 #define MMUCR (MMUBASE + 0x00) /* Control register */ macro
|
| /openbmc/u-boot/board/renesas/r2dplus/ |
| H A D | lowlevel_init.S | 114 MMUCR_A: .long MMUCR /* MMUCCR Address */
|
| /openbmc/u-boot/board/ms7722se/ |
| H A D | lowlevel_init.S | 134 MMUCR_A: .long MMUCR
|
| /openbmc/u-boot/board/renesas/ecovec/ |
| H A D | lowlevel_init.S | 140 MMUCR_A: .long MMUCR
|
| /openbmc/u-boot/board/renesas/MigoR/ |
| H A D | lowlevel_init.S | 120 MMUCR_A: .long MMUCR
|
| /openbmc/linux/arch/m68k/coldfire/ |
| H A D | head.S | 222 movel %d0,MMUCR
|
| /openbmc/linux/arch/sh/kernel/ |
| H A D | head_32.S | 359 .LMMUCR: .long MMUCR
|
| /openbmc/u-boot/board/renesas/r7780mp/ |
| H A D | lowlevel_init.S | 311 MMUCR_A: .long MMUCR
|
| /openbmc/qemu/target/sh4/ |
| H A D | cpu.h | 290 #define MMUCR 0x1F000010 macro
|