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Searched refs:M2 (Results 1 – 25 of 111) sorted by relevance

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/openbmc/linux/arch/sparc/kernel/
H A Dtraps_64.c1095 #define M2 144 macro
1100 /*00*/NONE, C0, C1, M2, C2, M2, M3, 47, C3, M2, M2, 53, M2, 41, 29, M,
1101 /*01*/C4, M, M, 50, M2, 38, 25, M2, M2, 33, 24, M2, 11, M, M2, 16,
1102 /*02*/C5, M, M, 46, M2, 37, 19, M2, M, 31, 32, M, 7, M2, M2, 10,
1103 /*03*/M2, 40, 13, M2, 59, M, M2, 66, M, M2, M2, 0, M2, 67, 71, M,
1104 /*04*/C6, M, M, 43, M, 36, 18, M, M2, 49, 15, M, 63, M2, M2, 6,
1105 /*05*/M2, 44, 28, M2, M, M2, M2, 52, 68, M2, M2, 62, M2, M3, M3, M4,
1106 /*06*/M2, 26, 106, M2, 64, M, M2, 2, 120, M, M2, M3, M, M3, M3, M4,
1107 /*07*/116, M2, M2, M3, M2, M3, M, M4, M2, 58, 54, M2, M, M4, M4, M3,
1108 /*08*/C7, M2, M, 42, M, 35, 17, M2, M, 45, 14, M2, 21, M2, M2, 5,
[all …]
/openbmc/linux/drivers/gpu/drm/nouveau/nvkm/subdev/clk/
H A Dpllnv04.c151 int M1, N1, M2, N2, log2P; in getMNP_double() local
177 for (M2 = minM2; M2 <= maxM2; M2++) { in getMNP_double()
178 if (calcclk1/M2 < minU2) in getMNP_double()
180 if (calcclk1/M2 > maxU2) in getMNP_double()
184 N2 = (clkP * M2 + calcclk1/2) / calcclk1; in getMNP_double()
192 if (N2/M2 < 4 || N2/M2 > 10) in getMNP_double()
195 calcclk2 = calcclk1 * N2 / M2; in getMNP_double()
214 *pM2 = M2; in getMNP_double()
228 int *N1, int *M1, int *N2, int *M2, int *P) in nv04_pll_calc() argument
236 *M2 = 1; in nv04_pll_calc()
[all …]
H A Dnv40.c62 int M2 = (coef & 0x00ff0000) >> 16; in read_pll_2() local
71 if (M2) in read_pll_2()
72 khz = khz * N2 / M2; in read_pll_2()
125 int *N1, int *M1, int *N2, int *M2, int *log2P) in nv40_clk_calc_pll() argument
138 ret = nv04_pll_calc(subdev, &pll, khz, N1, M1, N2, M2, log2P); in nv40_clk_calc_pll()
151 int N1, M1, N2, M2, log2P; in nv40_clk_calc() local
156 &N1, &M1, &N2, &M2, &log2P); in nv40_clk_calc()
160 if (N2 == M2) { in nv40_clk_calc()
165 clk->npll_coef = (N2 << 24) | (M2 << 16) | (N1 << 8) | M1; in nv40_clk_calc()
H A Dnv04.c35 int N1, M1, N2, M2, P; in nv04_clk_pll_calc() local
36 int ret = nv04_pll_calc(&clock->subdev, info, clk, &N1, &M1, &N2, &M2, &P); in nv04_clk_pll_calc()
42 pv->M2 = M2; in nv04_clk_pll_calc()
/openbmc/u-boot/board/ti/am57xx/
H A Dmux_data.h15 {GPMC_AD0, (M2 | PIN_INPUT | MANUAL_MODE)}, /* gpmc_ad0.vin3a_d0 */
16 {GPMC_AD1, (M2 | PIN_INPUT | MANUAL_MODE)}, /* gpmc_ad1.vin3a_d1 */
17 {GPMC_AD2, (M2 | PIN_INPUT | MANUAL_MODE)}, /* gpmc_ad2.vin3a_d2 */
18 {GPMC_AD3, (M2 | PIN_INPUT | MANUAL_MODE)}, /* gpmc_ad3.vin3a_d3 */
19 {GPMC_AD4, (M2 | PIN_INPUT | MANUAL_MODE)}, /* gpmc_ad4.vin3a_d4 */
20 {GPMC_AD5, (M2 | PIN_INPUT | MANUAL_MODE)}, /* gpmc_ad5.vin3a_d5 */
21 {GPMC_AD6, (M2 | PIN_INPUT | MANUAL_MODE)}, /* gpmc_ad6.vin3a_d6 */
22 {GPMC_AD7, (M2 | PIN_INPUT | MANUAL_MODE)}, /* gpmc_ad7.vin3a_d7 */
23 {GPMC_AD8, (M2 | PIN_INPUT | MANUAL_MODE)}, /* gpmc_ad8.vin3a_d8 */
24 {GPMC_AD9, (M2 | PIN_INPUT | MANUAL_MODE)}, /* gpmc_ad9.vin3a_d9 */
[all …]
/openbmc/linux/arch/arm64/boot/dts/apple/
H A Dt8112-jxxx.dtsi3 * Apple M2 MacBook Air/Pro (M2, 2022)
5 * This file contains parts common to all Apple M2 devices using the t8112.
H A Dt8112-j473.dts3 * Apple Mac mini (M2, 2023)
17 model = "Apple Mac mini (M2, 2023)";
H A Dt8112-j413.dts3 * Apple MacBook Air (M2, 2022)
18 model = "Apple MacBook Air (13-inch, M2, 2022)";
/openbmc/linux/Documentation/i2c/
H A Di2c-topology.rst201 '--------' | | mux M1 |--. | mux M2 |--. .--------.
209 and specifically when M2 requests its parent to lock, M1 passes
212 This topology is bad if M2 is an auto-closing mux and M1->select
214 through and be seen by the M2 adapter, thus closing M2 prematurely.
225 '--------' | | mux M1 |--. | mux M2 |--. .--------.
248 '--------' | | mux M1 |--. | mux M2 |--. .--------.
260 be avoided. The reason is that M2 probably assumes that there will
262 if there are, any such transfers might appear on the slave side of M2
266 The topology is especially troublesome if M2 is an auto-closing
267 mux. In that case, any interleaved accesses to D4 might close M2
[all …]
/openbmc/linux/arch/arm64/boot/dts/freescale/
H A Dimx8mm-data-modul-edm-sbc.dts211 "", "M2-B_PCIE_RST#", "M2-B_PCIE_WAKE#", "RTC_IRQ#",
212 "WDOG_KICK#", "M2-B_PCIE_CLKREQ#",
222 "M2-B_FULL_CARD_PWROFF_1V8#", "EEPROM_WP_1V8#",
225 "M2-B_W_DISABLE1_WWAN_1V8#", "M2-B_W_DISABLE2_GPS_1V8#",
237 "", "", "", "M2-B_WAKE_WWAN_1V8#",
238 "M2-B_RESET_1V8#", "", "", "",
693 /* M2-B_RESET_1V8# */
695 /* M2-B_PCIE_RST# */
697 /* M2-B_FULL_CARD_PWROFF_1V8# */
699 /* M2-B_W_DISABLE1_WWAN_1V8# */
[all …]
/openbmc/bmcweb/redfish-core/include/generated/enums/
H A Dpcie_slots.hpp16 M2, enumerator
29 {SlotTypes::M2, "M2"},
H A Dpcie_device.hpp34 M2, enumerator
97 {SlotType::M2, "M2"},
/openbmc/linux/drivers/gpu/drm/nouveau/nvkm/subdev/fb/
H A Dramnv40.c40 int N1, M1, N2, M2; in nv40_ram_calc() local
49 ret = nv04_pll_calc(subdev, &pll, freq, &N1, &M1, &N2, &M2, &log2P); in nv40_ram_calc()
55 if (N2 == M2) { in nv40_ram_calc()
60 ram->coef = (N2 << 24) | (M2 << 16) | (N1 << 8) | M1; in nv40_ram_calc()
/openbmc/linux/drivers/gpu/drm/nouveau/nvkm/subdev/devinit/
H A Dnv04.c210 bool single_stage = !pv->NM2 || pv->N2 == pv->M2; /* nv41+ only */ in setPLL_double_highregs()
217 (pv->N2 & 0x7) << 19 | 8 << 4 | (pv->M2 & 7) << 4; in setPLL_double_highregs()
296 bool single_stage = !pv->NM2 || pv->N2 == pv->M2; in setPLL_double_lowregs()
363 int N1, M1, N2, M2, P; in nv04_devinit_pll_set() local
370 ret = nv04_pll_calc(subdev, &info, freq, &N1, &M1, &N2, &M2, &P); in nv04_devinit_pll_set()
378 pv.M2 = M2; in nv04_devinit_pll_set()
H A Dnv50.c41 int N1, M1, N2, M2, P; in nv50_devinit_pll_set() local
50 ret = nv04_pll_calc(subdev, &info, freq, &N1, &M1, &N2, &M2, &P); in nv50_devinit_pll_set()
62 (M2 << 16) | N2); in nv50_devinit_pll_set()
/openbmc/qemu/scripts/oss-fuzz/
H A Dminimize_qtest_trace.py21 M2 = False # try setting bits in operand of write/out to zero variable
289 global M1, M2
297 if not M1 and not M2:
303 if M2:
314 M2 = True variable
/openbmc/linux/drivers/gpu/drm/nouveau/include/nvkm/subdev/bios/
H A Dpll.h9 uint8_t N1, M1, N2, M2; member
11 uint8_t M1, N1, M2, N2;
/openbmc/u-boot/board/overo/
H A Dovero.h106 MUX_VAL(CP(ETK_CLK_ES2), (IEN | PTU | EN | M2)) /*MMC3_CLK*/\
107 MUX_VAL(CP(ETK_CTL_ES2), (IEN | PTU | EN | M2)) /*MMC3_CMD*/\
109 MUX_VAL(CP(ETK_D3_ES2), (IEN | PTU | EN | M2)) /*MMC3_DAT3*/\
110 MUX_VAL(CP(ETK_D4_ES2), (IEN | PTU | EN | M2)) /*MMC3_DAT0*/\
111 MUX_VAL(CP(ETK_D5_ES2), (IEN | PTU | EN | M2)) /*MMC3_DAT1*/\
112 MUX_VAL(CP(ETK_D6_ES2), (IEN | PTU | EN | M2)) /*MMC3_DAT2*/\
/openbmc/linux/arch/arm64/crypto/
H A Dpolyval-ce-core.S40 M2 .req v2 label
223 ld1 {M0.16b, M1.16b, M2.16b, M3.16b}, [MSG], #64
251 karatsuba1 M2 KEY6
278 ld1 {M0.16b, M1.16b, M2.16b, M3.16b}, [MSG], #64
282 karatsuba1 M2 KEY6
/openbmc/u-boot/board/compulab/cm_t54/
H A Dmux.c42 {I2C5_SCL, (PTU | IEN | M2)}, /* UART4_RX */
43 {I2C5_SDA, (M2)}, /* UART4_TX */
/openbmc/linux/arch/arm64/boot/dts/amlogic/
H A Dmeson-sm1-bananapi-m2-pro.dts14 model = "Banana Pi BPI-M2-PRO";
18 model = "BPI-M2-PRO";
/openbmc/linux/arch/xtensa/variants/de212/include/variant/
H A Dtie-asm.h99 rsr.M2 \at1 // MAC16 option
154 wsr.M2 \at1 // MAC16 option
/openbmc/linux/arch/xtensa/variants/dc232b/include/variant/
H A Dtie-asm.h53 rsr \at1, M2
96 wsr \at1, M2
/openbmc/u-boot/arch/xtensa/include/asm/arch-de212/
H A Dtie-asm.h78 rsr.M2 \at1 // MAC16 option
133 wsr.M2 \at1 // MAC16 option
/openbmc/u-boot/arch/xtensa/include/asm/arch-dc232b/
H A Dtie-asm.h51 rsr \at1, M2
94 wsr \at1, M2

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