183d290c5STom Rini /* SPDX-License-Identifier: GPL-2.0+ */ 274cc8b09SKipisz, Steven /* 374cc8b09SKipisz, Steven * Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com 474cc8b09SKipisz, Steven * 574cc8b09SKipisz, Steven * Author: Felipe Balbi <balbi@ti.com> 674cc8b09SKipisz, Steven * 774cc8b09SKipisz, Steven * Based on board/ti/dra7xx/evm.c 874cc8b09SKipisz, Steven */ 974cc8b09SKipisz, Steven #ifndef _MUX_DATA_BEAGLE_X15_H_ 1074cc8b09SKipisz, Steven #define _MUX_DATA_BEAGLE_X15_H_ 1174cc8b09SKipisz, Steven 1274cc8b09SKipisz, Steven #include <asm/arch/mux_dra7xx.h> 1374cc8b09SKipisz, Steven 14c020d355SSteve Kipisz const struct pad_conf_entry core_padconf_array_essential_x15[] = { 1589a38953SNishanth Menon {GPMC_AD0, (M2 | PIN_INPUT | MANUAL_MODE)}, /* gpmc_ad0.vin3a_d0 */ 1689a38953SNishanth Menon {GPMC_AD1, (M2 | PIN_INPUT | MANUAL_MODE)}, /* gpmc_ad1.vin3a_d1 */ 1789a38953SNishanth Menon {GPMC_AD2, (M2 | PIN_INPUT | MANUAL_MODE)}, /* gpmc_ad2.vin3a_d2 */ 1889a38953SNishanth Menon {GPMC_AD3, (M2 | PIN_INPUT | MANUAL_MODE)}, /* gpmc_ad3.vin3a_d3 */ 1989a38953SNishanth Menon {GPMC_AD4, (M2 | PIN_INPUT | MANUAL_MODE)}, /* gpmc_ad4.vin3a_d4 */ 2089a38953SNishanth Menon {GPMC_AD5, (M2 | PIN_INPUT | MANUAL_MODE)}, /* gpmc_ad5.vin3a_d5 */ 2189a38953SNishanth Menon {GPMC_AD6, (M2 | PIN_INPUT | MANUAL_MODE)}, /* gpmc_ad6.vin3a_d6 */ 2289a38953SNishanth Menon {GPMC_AD7, (M2 | PIN_INPUT | MANUAL_MODE)}, /* gpmc_ad7.vin3a_d7 */ 2389a38953SNishanth Menon {GPMC_AD8, (M2 | PIN_INPUT | MANUAL_MODE)}, /* gpmc_ad8.vin3a_d8 */ 2489a38953SNishanth Menon {GPMC_AD9, (M2 | PIN_INPUT | MANUAL_MODE)}, /* gpmc_ad9.vin3a_d9 */ 2589a38953SNishanth Menon {GPMC_AD10, (M2 | PIN_INPUT | MANUAL_MODE)}, /* gpmc_ad10.vin3a_d10 */ 2689a38953SNishanth Menon {GPMC_AD11, (M2 | PIN_INPUT | MANUAL_MODE)}, /* gpmc_ad11.vin3a_d11 */ 2789a38953SNishanth Menon {GPMC_AD12, (M2 | PIN_INPUT | MANUAL_MODE)}, /* gpmc_ad12.vin3a_d12 */ 2889a38953SNishanth Menon {GPMC_AD13, (M2 | PIN_INPUT | MANUAL_MODE)}, /* gpmc_ad13.vin3a_d13 */ 2989a38953SNishanth Menon {GPMC_AD14, (M2 | PIN_INPUT | MANUAL_MODE)}, /* gpmc_ad14.vin3a_d14 */ 3089a38953SNishanth Menon {GPMC_AD15, (M2 | PIN_INPUT | MANUAL_MODE)}, /* gpmc_ad15.vin3a_d15 */ 3174cc8b09SKipisz, Steven {GPMC_A0, (M2 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* gpmc_a0.vin3a_d16 */ 3274cc8b09SKipisz, Steven {GPMC_A1, (M2 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* gpmc_a1.vin3a_d17 */ 3374cc8b09SKipisz, Steven {GPMC_A2, (M2 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* gpmc_a2.vin3a_d18 */ 3474cc8b09SKipisz, Steven {GPMC_A3, (M2 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* gpmc_a3.vin3a_d19 */ 3574cc8b09SKipisz, Steven {GPMC_A4, (M2 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* gpmc_a4.vin3a_d20 */ 3674cc8b09SKipisz, Steven {GPMC_A5, (M2 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* gpmc_a5.vin3a_d21 */ 3774cc8b09SKipisz, Steven {GPMC_A6, (M2 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* gpmc_a6.vin3a_d22 */ 3874cc8b09SKipisz, Steven {GPMC_A7, (M2 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* gpmc_a7.vin3a_d23 */ 3974cc8b09SKipisz, Steven {GPMC_A8, (M2 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* gpmc_a8.vin3a_hsync0 */ 4074cc8b09SKipisz, Steven {GPMC_A9, (M2 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* gpmc_a9.vin3a_vsync0 */ 4174cc8b09SKipisz, Steven {GPMC_A10, (M2 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* gpmc_a10.vin3a_de0 */ 4274cc8b09SKipisz, Steven {GPMC_A11, (M2 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* gpmc_a11.vin3a_fld0 */ 4374cc8b09SKipisz, Steven {GPMC_A12, (M14 | PIN_INPUT_PULLUP)}, /* gpmc_a12.gpio2_2 */ 4474cc8b09SKipisz, Steven {GPMC_A13, (M14 | PIN_INPUT_PULLDOWN)}, /* gpmc_a13.gpio2_3 */ 4574cc8b09SKipisz, Steven {GPMC_A14, (M14 | PIN_INPUT_PULLUP)}, /* gpmc_a14.gpio2_4 */ 4674cc8b09SKipisz, Steven {GPMC_A15, (M14 | PIN_INPUT_PULLDOWN)}, /* gpmc_a15.gpio2_5 */ 4774cc8b09SKipisz, Steven {GPMC_A16, (M14 | PIN_INPUT_PULLDOWN)}, /* gpmc_a16.gpio2_6 */ 4874cc8b09SKipisz, Steven {GPMC_A17, (M14 | PIN_INPUT_PULLDOWN)}, /* gpmc_a17.gpio2_7 */ 4974cc8b09SKipisz, Steven {GPMC_A18, (M14 | PIN_INPUT_PULLUP)}, /* gpmc_a18.gpio2_8 */ 5074cc8b09SKipisz, Steven {GPMC_A19, (M1 | PIN_INPUT_PULLUP)}, /* gpmc_a19.mmc2_dat4 */ 5174cc8b09SKipisz, Steven {GPMC_A20, (M1 | PIN_INPUT_PULLUP)}, /* gpmc_a20.mmc2_dat5 */ 5274cc8b09SKipisz, Steven {GPMC_A21, (M1 | PIN_INPUT_PULLUP)}, /* gpmc_a21.mmc2_dat6 */ 5374cc8b09SKipisz, Steven {GPMC_A22, (M1 | PIN_INPUT_PULLUP)}, /* gpmc_a22.mmc2_dat7 */ 5474cc8b09SKipisz, Steven {GPMC_A23, (M1 | PIN_INPUT_PULLUP)}, /* gpmc_a23.mmc2_clk */ 5574cc8b09SKipisz, Steven {GPMC_A24, (M1 | PIN_INPUT_PULLUP)}, /* gpmc_a24.mmc2_dat0 */ 5674cc8b09SKipisz, Steven {GPMC_A25, (M1 | PIN_INPUT_PULLUP)}, /* gpmc_a25.mmc2_dat1 */ 5774cc8b09SKipisz, Steven {GPMC_A26, (M1 | PIN_INPUT_PULLUP)}, /* gpmc_a26.mmc2_dat2 */ 5874cc8b09SKipisz, Steven {GPMC_A27, (M1 | PIN_INPUT_PULLUP)}, /* gpmc_a27.mmc2_dat3 */ 5974cc8b09SKipisz, Steven {GPMC_CS1, (M1 | PIN_INPUT_PULLUP)}, /* gpmc_cs1.mmc2_cmd */ 6074cc8b09SKipisz, Steven {GPMC_CS0, (M14 | PIN_INPUT_PULLDOWN)}, /* gpmc_cs0.gpio2_19 */ 6174cc8b09SKipisz, Steven {GPMC_CS2, (M14 | PIN_INPUT_PULLUP)}, /* gpmc_cs2.gpio2_20 */ 6289a38953SNishanth Menon {GPMC_CS3, (M2 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* gpmc_cs3.vin3a_clk0 */ 6374cc8b09SKipisz, Steven {GPMC_CLK, (M9 | PIN_INPUT_PULLDOWN)}, /* gpmc_clk.dma_evt1 */ 6474cc8b09SKipisz, Steven {GPMC_ADVN_ALE, (M14 | PIN_INPUT_PULLUP)}, /* gpmc_advn_ale.gpio2_23 */ 6574cc8b09SKipisz, Steven {GPMC_OEN_REN, (M14 | PIN_INPUT_PULLUP)}, /* gpmc_oen_ren.gpio2_24 */ 6674cc8b09SKipisz, Steven {GPMC_WEN, (M14 | PIN_INPUT_PULLUP)}, /* gpmc_wen.gpio2_25 */ 6774cc8b09SKipisz, Steven {GPMC_BEN0, (M9 | PIN_INPUT_PULLDOWN)}, /* gpmc_ben0.dma_evt3 */ 6874cc8b09SKipisz, Steven {GPMC_BEN1, (M9 | PIN_INPUT_PULLDOWN)}, /* gpmc_ben1.dma_evt4 */ 69d9e14671SLokesh Vutla {GPMC_WAIT0, (M14 | PIN_INPUT_PULLUP | SLEWCONTROL)}, /* gpmc_wait0.gpio2_28 */ 70d9e14671SLokesh Vutla {VIN1B_CLK1, (M14 | PIN_INPUT_SLEW)}, /* vin1b_clk1.gpio2_31 */ 7174cc8b09SKipisz, Steven {VIN1A_D2, (M14 | PIN_INPUT_PULLDOWN)}, /* vin1a_d2.gpio3_6 */ 7274cc8b09SKipisz, Steven {VIN1A_D3, (M14 | PIN_INPUT_PULLDOWN)}, /* vin1a_d3.gpio3_7 */ 7374cc8b09SKipisz, Steven {VIN1A_D4, (M14 | PIN_INPUT_PULLDOWN)}, /* vin1a_d4.gpio3_8 */ 7474cc8b09SKipisz, Steven {VIN1A_D5, (M14 | PIN_INPUT_PULLDOWN)}, /* vin1a_d5.gpio3_9 */ 7574cc8b09SKipisz, Steven {VIN1A_D6, (M14 | PIN_INPUT_PULLDOWN)}, /* vin1a_d6.gpio3_10 */ 7674cc8b09SKipisz, Steven {VIN1A_D7, (M14 | PIN_INPUT_PULLDOWN)}, /* vin1a_d7.gpio3_11 */ 7774cc8b09SKipisz, Steven {VIN1A_D8, (M14 | PIN_INPUT_PULLDOWN)}, /* vin1a_d8.gpio3_12 */ 7874cc8b09SKipisz, Steven {VIN1A_D10, (M14 | PIN_INPUT_PULLDOWN)}, /* vin1a_d10.gpio3_14 */ 7974cc8b09SKipisz, Steven {VIN1A_D11, (M14 | PIN_INPUT_PULLDOWN)}, /* vin1a_d11.gpio3_15 */ 8074cc8b09SKipisz, Steven {VIN1A_D12, (M14 | PIN_INPUT_PULLDOWN)}, /* vin1a_d12.gpio3_16 */ 8174cc8b09SKipisz, Steven {VIN1A_D14, (M14 | PIN_INPUT_PULLDOWN)}, /* vin1a_d14.gpio3_18 */ 8274cc8b09SKipisz, Steven {VIN1A_D16, (M14 | PIN_INPUT_PULLDOWN)}, /* vin1a_d16.gpio3_20 */ 8374cc8b09SKipisz, Steven {VIN1A_D19, (M14 | PIN_INPUT_PULLDOWN)}, /* vin1a_d19.gpio3_23 */ 8474cc8b09SKipisz, Steven {VIN1A_D20, (M14 | PIN_INPUT_PULLDOWN)}, /* vin1a_d20.gpio3_24 */ 8574cc8b09SKipisz, Steven {VIN1A_D22, (M14 | PIN_INPUT_PULLDOWN)}, /* vin1a_d22.gpio3_26 */ 8674cc8b09SKipisz, Steven {VIN2A_CLK0, (M14 | PIN_INPUT_PULLDOWN)}, /* vin2a_clk0.gpio3_28 */ 8774cc8b09SKipisz, Steven {VIN2A_DE0, (M14 | PIN_INPUT_PULLDOWN)}, /* vin2a_de0.gpio3_29 */ 8874cc8b09SKipisz, Steven {VIN2A_FLD0, (M14 | PIN_INPUT_PULLDOWN)}, /* vin2a_fld0.gpio3_30 */ 89d9e14671SLokesh Vutla {VIN2A_HSYNC0, (M11 | PIN_INPUT_PULLUP)}, /* vin2a_hsync0.pr1_uart0_cts_n */ 9089a38953SNishanth Menon {VIN2A_VSYNC0, (M11 | PIN_OUTPUT_PULLUP)}, /* vin2a_vsync0.pr1_uart0_rts_n */ 91d9e14671SLokesh Vutla {VIN2A_D0, (M11 | PIN_INPUT_PULLUP)}, /* vin2a_d0.pr1_uart0_rxd */ 92d9e14671SLokesh Vutla {VIN2A_D1, (M11 | PIN_OUTPUT)}, /* vin2a_d1.pr1_uart0_txd */ 93d9e14671SLokesh Vutla {VIN2A_D2, (M8 | PIN_INPUT_PULLUP)}, /* vin2a_d2.uart10_rxd */ 94d9e14671SLokesh Vutla {VIN2A_D3, (M8 | PIN_OUTPUT)}, /* vin2a_d3.uart10_txd */ 95d9e14671SLokesh Vutla {VIN2A_D4, (M8 | PIN_INPUT_PULLUP)}, /* vin2a_d4.uart10_ctsn */ 96d9e14671SLokesh Vutla {VIN2A_D5, (M8 | PIN_OUTPUT_PULLUP)}, /* vin2a_d5.uart10_rtsn */ 9774cc8b09SKipisz, Steven {VIN2A_D6, (M14 | PIN_INPUT_PULLDOWN)}, /* vin2a_d6.gpio4_7 */ 9874cc8b09SKipisz, Steven {VIN2A_D7, (M14 | PIN_INPUT_PULLDOWN)}, /* vin2a_d7.gpio4_8 */ 9974cc8b09SKipisz, Steven {VIN2A_D8, (M14 | PIN_INPUT_PULLDOWN)}, /* vin2a_d8.gpio4_9 */ 10074cc8b09SKipisz, Steven {VIN2A_D9, (M14 | PIN_INPUT_PULLDOWN)}, /* vin2a_d9.gpio4_10 */ 10189a38953SNishanth Menon {VIN2A_D10, (M10 | PIN_OUTPUT_PULLDOWN)}, /* vin2a_d10.ehrpwm2B */ 10274cc8b09SKipisz, Steven {VIN2A_D11, (M10 | PIN_INPUT_PULLDOWN)}, /* vin2a_d11.ehrpwm2_tripzone_input */ 10389a38953SNishanth Menon {VIN2A_D12, (M3 | PIN_OUTPUT | MANUAL_MODE)}, /* vin2a_d12.rgmii1_txc */ 10489a38953SNishanth Menon {VIN2A_D13, (M3 | PIN_OUTPUT | MANUAL_MODE)}, /* vin2a_d13.rgmii1_txctl */ 10589a38953SNishanth Menon {VIN2A_D14, (M3 | PIN_OUTPUT | MANUAL_MODE)}, /* vin2a_d14.rgmii1_txd3 */ 10689a38953SNishanth Menon {VIN2A_D15, (M3 | PIN_OUTPUT | MANUAL_MODE)}, /* vin2a_d15.rgmii1_txd2 */ 10789a38953SNishanth Menon {VIN2A_D16, (M3 | PIN_OUTPUT | MANUAL_MODE)}, /* vin2a_d16.rgmii1_txd1 */ 10889a38953SNishanth Menon {VIN2A_D17, (M3 | PIN_OUTPUT | MANUAL_MODE)}, /* vin2a_d17.rgmii1_txd0 */ 10989a38953SNishanth Menon {VIN2A_D18, (M3 | PIN_INPUT | MANUAL_MODE)}, /* vin2a_d18.rgmii1_rxc */ 11089a38953SNishanth Menon {VIN2A_D19, (M3 | PIN_INPUT | MANUAL_MODE)}, /* vin2a_d19.rgmii1_rxctl */ 11189a38953SNishanth Menon {VIN2A_D20, (M3 | PIN_INPUT | MANUAL_MODE)}, /* vin2a_d20.rgmii1_rxd3 */ 11289a38953SNishanth Menon {VIN2A_D21, (M3 | PIN_INPUT | MANUAL_MODE)}, /* vin2a_d21.rgmii1_rxd2 */ 11389a38953SNishanth Menon {VIN2A_D22, (M3 | PIN_INPUT | MANUAL_MODE)}, /* vin2a_d22.rgmii1_rxd1 */ 11489a38953SNishanth Menon {VIN2A_D23, (M3 | PIN_INPUT | MANUAL_MODE)}, /* vin2a_d23.rgmii1_rxd0 */ 11574cc8b09SKipisz, Steven {VOUT1_FLD, (M14 | PIN_INPUT)}, /* vout1_fld.gpio4_21 */ 116d9e14671SLokesh Vutla {MDIO_MCLK, (M0 | PIN_OUTPUT | SLEWCONTROL)}, /* mdio_mclk.mdio_mclk */ 117d9e14671SLokesh Vutla {MDIO_D, (M0 | PIN_INPUT | SLEWCONTROL)}, /* mdio_d.mdio_d */ 11874cc8b09SKipisz, Steven {RMII_MHZ_50_CLK, (M14 | PIN_INPUT_PULLUP)}, /* RMII_MHZ_50_CLK.gpio5_17 */ 119d9e14671SLokesh Vutla {UART3_RXD, (M14 | PIN_INPUT_SLEW)}, /* uart3_rxd.gpio5_18 */ 120d9e14671SLokesh Vutla {UART3_TXD, (M14 | PIN_INPUT_SLEW)}, /* uart3_txd.gpio5_19 */ 12189a38953SNishanth Menon {RGMII0_TXC, (M0 | PIN_OUTPUT | MANUAL_MODE)}, /* rgmii0_txc.rgmii0_txc */ 12289a38953SNishanth Menon {RGMII0_TXCTL, (M0 | PIN_OUTPUT | MANUAL_MODE)}, /* rgmii0_txctl.rgmii0_txctl */ 12389a38953SNishanth Menon {RGMII0_TXD3, (M0 | PIN_OUTPUT | MANUAL_MODE)}, /* rgmii0_txd3.rgmii0_txd3 */ 12489a38953SNishanth Menon {RGMII0_TXD2, (M0 | PIN_OUTPUT | MANUAL_MODE)}, /* rgmii0_txd2.rgmii0_txd2 */ 12589a38953SNishanth Menon {RGMII0_TXD1, (M0 | PIN_OUTPUT | MANUAL_MODE)}, /* rgmii0_txd1.rgmii0_txd1 */ 12689a38953SNishanth Menon {RGMII0_TXD0, (M0 | PIN_OUTPUT | MANUAL_MODE)}, /* rgmii0_txd0.rgmii0_txd0 */ 12789a38953SNishanth Menon {RGMII0_RXC, (M0 | PIN_INPUT | MANUAL_MODE)}, /* rgmii0_rxc.rgmii0_rxc */ 12889a38953SNishanth Menon {RGMII0_RXCTL, (M0 | PIN_INPUT | MANUAL_MODE)}, /* rgmii0_rxctl.rgmii0_rxctl */ 12989a38953SNishanth Menon {RGMII0_RXD3, (M0 | PIN_INPUT | MANUAL_MODE)}, /* rgmii0_rxd3.rgmii0_rxd3 */ 13089a38953SNishanth Menon {RGMII0_RXD2, (M0 | PIN_INPUT | MANUAL_MODE)}, /* rgmii0_rxd2.rgmii0_rxd2 */ 13189a38953SNishanth Menon {RGMII0_RXD1, (M0 | PIN_INPUT | MANUAL_MODE)}, /* rgmii0_rxd1.rgmii0_rxd1 */ 13289a38953SNishanth Menon {RGMII0_RXD0, (M0 | PIN_INPUT | MANUAL_MODE)}, /* rgmii0_rxd0.rgmii0_rxd0 */ 133d9e14671SLokesh Vutla {USB1_DRVVBUS, (M0 | PIN_OUTPUT | SLEWCONTROL)}, /* usb1_drvvbus.usb1_drvvbus */ 134d9e14671SLokesh Vutla {USB2_DRVVBUS, (M0 | PIN_OUTPUT_PULLDOWN | SLEWCONTROL)}, /* usb2_drvvbus.usb2_drvvbus */ 13574cc8b09SKipisz, Steven {GPIO6_14, (M10 | PIN_INPUT_PULLUP)}, /* gpio6_14.timer1 */ 13674cc8b09SKipisz, Steven {GPIO6_15, (M10 | PIN_INPUT_PULLUP)}, /* gpio6_15.timer2 */ 13774cc8b09SKipisz, Steven {GPIO6_16, (M10 | PIN_INPUT_PULLUP)}, /* gpio6_16.timer3 */ 13889a38953SNishanth Menon {XREF_CLK0, (M9 | PIN_OUTPUT_PULLDOWN)}, /* xref_clk0.clkout2 */ 13974cc8b09SKipisz, Steven {XREF_CLK1, (M14 | PIN_INPUT_PULLDOWN)}, /* xref_clk1.gpio6_18 */ 14074cc8b09SKipisz, Steven {XREF_CLK2, (M14 | PIN_INPUT_PULLDOWN)}, /* xref_clk2.gpio6_19 */ 14189a38953SNishanth Menon {XREF_CLK3, (M9 | PIN_OUTPUT_PULLDOWN)}, /* xref_clk3.clkout3 */ 14274cc8b09SKipisz, Steven {MCASP1_ACLKX, (M10 | PIN_INPUT_PULLUP)}, /* mcasp1_aclkx.i2c3_sda */ 143d9e14671SLokesh Vutla {MCASP1_FSX, (M10 | PIN_INPUT_PULLUP | SLEWCONTROL)}, /* mcasp1_fsx.i2c3_scl */ 14474cc8b09SKipisz, Steven {MCASP1_ACLKR, (M10 | PIN_INPUT_PULLUP)}, /* mcasp1_aclkr.i2c4_sda */ 14574cc8b09SKipisz, Steven {MCASP1_FSR, (M10 | PIN_INPUT_PULLUP)}, /* mcasp1_fsr.i2c4_scl */ 146d9e14671SLokesh Vutla {MCASP1_AXR0, (M10 | PIN_INPUT_PULLUP | SLEWCONTROL)}, /* mcasp1_axr0.i2c5_sda */ 147d9e14671SLokesh Vutla {MCASP1_AXR1, (M10 | PIN_INPUT_PULLUP | SLEWCONTROL)}, /* mcasp1_axr1.i2c5_scl */ 14874cc8b09SKipisz, Steven {MCASP1_AXR2, (M14 | PIN_INPUT_PULLDOWN)}, /* mcasp1_axr2.gpio5_4 */ 14974cc8b09SKipisz, Steven {MCASP1_AXR3, (M14 | PIN_INPUT_PULLDOWN)}, /* mcasp1_axr3.gpio5_5 */ 15074cc8b09SKipisz, Steven {MCASP1_AXR4, (M14 | PIN_INPUT_PULLDOWN)}, /* mcasp1_axr4.gpio5_6 */ 15174cc8b09SKipisz, Steven {MCASP1_AXR5, (M14 | PIN_INPUT_PULLDOWN)}, /* mcasp1_axr5.gpio5_7 */ 15274cc8b09SKipisz, Steven {MCASP1_AXR6, (M14 | PIN_INPUT_PULLDOWN)}, /* mcasp1_axr6.gpio5_8 */ 15374cc8b09SKipisz, Steven {MCASP1_AXR7, (M14 | PIN_INPUT_PULLDOWN)}, /* mcasp1_axr7.gpio5_9 */ 154d9e14671SLokesh Vutla {MCASP1_AXR8, (M14 | PIN_INPUT | SLEWCONTROL)}, /* mcasp1_axr8.gpio5_10 */ 155d9e14671SLokesh Vutla {MCASP1_AXR9, (M14 | PIN_INPUT | SLEWCONTROL)}, /* mcasp1_axr9.gpio5_11 */ 156d9e14671SLokesh Vutla {MCASP1_AXR10, (M14 | PIN_INPUT | SLEWCONTROL)}, /* mcasp1_axr10.gpio5_12 */ 157d9e14671SLokesh Vutla {MCASP1_AXR11, (M14 | PIN_INPUT_PULLUP | SLEWCONTROL)}, /* mcasp1_axr11.gpio4_17 */ 158d9e14671SLokesh Vutla {MCASP1_AXR12, (M1 | PIN_INPUT_SLEW | VIRTUAL_MODE10)}, /* mcasp1_axr12.mcasp7_axr0 */ 159d9e14671SLokesh Vutla {MCASP1_AXR13, (M1 | PIN_INPUT_SLEW | VIRTUAL_MODE10)}, /* mcasp1_axr13.mcasp7_axr1 */ 160d9e14671SLokesh Vutla {MCASP1_AXR14, (M1 | PIN_INPUT_SLEW | VIRTUAL_MODE10)}, /* mcasp1_axr14.mcasp7_aclkx */ 161d9e14671SLokesh Vutla {MCASP1_AXR15, (M1 | PIN_INPUT_SLEW | VIRTUAL_MODE10)}, /* mcasp1_axr15.mcasp7_fsx */ 16274cc8b09SKipisz, Steven {MCASP3_ACLKX, (M0 | PIN_INPUT_PULLDOWN)}, /* mcasp3_aclkx.mcasp3_aclkx */ 163d9e14671SLokesh Vutla {MCASP3_FSX, (M0 | PIN_INPUT_SLEW)}, /* mcasp3_fsx.mcasp3_fsx */ 164d9e14671SLokesh Vutla {MCASP3_AXR0, (M0 | PIN_INPUT_SLEW)}, /* mcasp3_axr0.mcasp3_axr0 */ 165d9e14671SLokesh Vutla {MCASP3_AXR1, (M0 | PIN_INPUT_SLEW)}, /* mcasp3_axr1.mcasp3_axr1 */ 16689a38953SNishanth Menon {MCASP4_ACLKX, (M3 | PIN_INPUT_PULLUP)}, /* mcasp4_aclkx.uart8_rxd */ 167d9e14671SLokesh Vutla {MCASP4_FSX, (M3 | PIN_OUTPUT)}, /* mcasp4_fsx.uart8_txd */ 168d9e14671SLokesh Vutla {MCASP4_AXR0, (M3 | PIN_INPUT_PULLUP)}, /* mcasp4_axr0.uart8_ctsn */ 16989a38953SNishanth Menon {MCASP4_AXR1, (M3 | PIN_OUTPUT_PULLUP)}, /* mcasp4_axr1.uart8_rtsn */ 17089a38953SNishanth Menon {MCASP5_ACLKX, (M3 | PIN_INPUT_PULLUP)}, /* mcasp5_aclkx.uart9_rxd */ 171d9e14671SLokesh Vutla {MCASP5_FSX, (M3 | PIN_OUTPUT)}, /* mcasp5_fsx.uart9_txd */ 172d9e14671SLokesh Vutla {MCASP5_AXR0, (M3 | PIN_INPUT_PULLUP)}, /* mcasp5_axr0.uart9_ctsn */ 17389a38953SNishanth Menon {MCASP5_AXR1, (M3 | PIN_OUTPUT_PULLUP)}, /* mcasp5_axr1.uart9_rtsn */ 174411278b8SSekhar Nori {MMC1_CLK, (M0 | PIN_INPUT_PULLUP)}, /* mmc1_clk.mmc1_clk */ 17574cc8b09SKipisz, Steven {MMC1_CMD, (M0 | PIN_INPUT_PULLUP)}, /* mmc1_cmd.mmc1_cmd */ 17674cc8b09SKipisz, Steven {MMC1_DAT0, (M0 | PIN_INPUT_PULLUP)}, /* mmc1_dat0.mmc1_dat0 */ 17774cc8b09SKipisz, Steven {MMC1_DAT1, (M0 | PIN_INPUT_PULLUP)}, /* mmc1_dat1.mmc1_dat1 */ 17874cc8b09SKipisz, Steven {MMC1_DAT2, (M0 | PIN_INPUT_PULLUP)}, /* mmc1_dat2.mmc1_dat2 */ 17974cc8b09SKipisz, Steven {MMC1_DAT3, (M0 | PIN_INPUT_PULLUP)}, /* mmc1_dat3.mmc1_dat3 */ 180d9e14671SLokesh Vutla {MMC1_SDCD, (M14 | PIN_INPUT_PULLUP | SLEWCONTROL)}, /* mmc1_sdcd.gpio6_27 */ 18189a38953SNishanth Menon {GPIO6_10, (M10 | PIN_OUTPUT_PULLDOWN)}, /* gpio6_10.ehrpwm2A */ 18289a38953SNishanth Menon {GPIO6_11, (M0 | PIN_INPUT_PULLUP)}, /* gpio6_11.gpio6_11 */ 183411278b8SSekhar Nori {MMC3_CLK, (M0 | PIN_INPUT_PULLUP | MANUAL_MODE)}, /* mmc3_clk.mmc3_clk */ 18489a38953SNishanth Menon {MMC3_CMD, (M0 | PIN_INPUT_PULLUP | MANUAL_MODE)}, /* mmc3_cmd.mmc3_cmd */ 18589a38953SNishanth Menon {MMC3_DAT0, (M0 | PIN_INPUT_PULLUP | MANUAL_MODE)}, /* mmc3_dat0.mmc3_dat0 */ 18689a38953SNishanth Menon {MMC3_DAT1, (M0 | PIN_INPUT_PULLUP | MANUAL_MODE)}, /* mmc3_dat1.mmc3_dat1 */ 18789a38953SNishanth Menon {MMC3_DAT2, (M0 | PIN_INPUT_PULLUP | MANUAL_MODE)}, /* mmc3_dat2.mmc3_dat2 */ 18889a38953SNishanth Menon {MMC3_DAT3, (M0 | PIN_INPUT_PULLUP | MANUAL_MODE)}, /* mmc3_dat3.mmc3_dat3 */ 189d9e14671SLokesh Vutla {MMC3_DAT4, (M0 | PIN_INPUT_PULLUP | MANUAL_MODE)}, /* mmc3_dat4.mmc3_dat4 */ 190d9e14671SLokesh Vutla {MMC3_DAT5, (M0 | PIN_INPUT_PULLUP | MANUAL_MODE)}, /* mmc3_dat5.mmc3_dat5 */ 191d9e14671SLokesh Vutla {MMC3_DAT6, (M0 | PIN_INPUT_PULLUP | MANUAL_MODE)}, /* mmc3_dat6.mmc3_dat6 */ 192d9e14671SLokesh Vutla {MMC3_DAT7, (M0 | PIN_INPUT_PULLUP | MANUAL_MODE)}, /* mmc3_dat7.mmc3_dat7 */ 19374cc8b09SKipisz, Steven {SPI1_SCLK, (M14 | PIN_INPUT_PULLDOWN)}, /* spi1_sclk.gpio7_7 */ 19474cc8b09SKipisz, Steven {SPI1_D1, (M14 | PIN_INPUT_PULLDOWN)}, /* spi1_d1.gpio7_8 */ 19574cc8b09SKipisz, Steven {SPI1_D0, (M14 | PIN_INPUT_PULLDOWN)}, /* spi1_d0.gpio7_9 */ 19689a38953SNishanth Menon {SPI1_CS0, (M14 | PIN_INPUT)}, /* spi1_cs0.gpio7_10 */ 19789a38953SNishanth Menon {SPI1_CS1, (M14 | PIN_INPUT)}, /* spi1_cs1.gpio7_11 */ 198d9e14671SLokesh Vutla {SPI1_CS2, (M14 | PIN_INPUT_SLEW)}, /* spi1_cs2.gpio7_12 */ 199*32651e4fSTomi Valkeinen {SPI1_CS3, (M6 | PIN_INPUT | SLEWCONTROL)}, /* spi1_cs3.hdmi1_cec */ 20074cc8b09SKipisz, Steven {SPI2_SCLK, (M14 | PIN_INPUT_PULLDOWN)}, /* spi2_sclk.gpio7_14 */ 201d9e14671SLokesh Vutla {SPI2_D1, (M14 | PIN_INPUT_SLEW)}, /* spi2_d1.gpio7_15 */ 202d9e14671SLokesh Vutla {SPI2_D0, (M14 | PIN_INPUT_PULLUP | SLEWCONTROL)}, /* spi2_d0.gpio7_16 */ 203d9e14671SLokesh Vutla {SPI2_CS0, (M14 | PIN_INPUT_PULLUP | SLEWCONTROL)}, /* spi2_cs0.gpio7_17 */ 204d9e14671SLokesh Vutla {DCAN1_TX, (M0 | PIN_OUTPUT | SLEWCONTROL)}, /* dcan1_tx.dcan1_tx */ 205d9e14671SLokesh Vutla {DCAN1_RX, (M0 | PIN_INPUT | SLEWCONTROL)}, /* dcan1_rx.dcan1_rx */ 206d9e14671SLokesh Vutla {UART1_RXD, (M0 | PIN_INPUT_PULLUP | SLEWCONTROL)}, /* uart1_rxd.uart1_rxd */ 207d9e14671SLokesh Vutla {UART1_TXD, (M0 | PIN_OUTPUT | SLEWCONTROL)}, /* uart1_txd.uart1_txd */ 20889a38953SNishanth Menon {UART1_CTSN, (M14 | PIN_INPUT_PULLDOWN)}, /* uart1_ctsn.gpio7_24 */ 20989a38953SNishanth Menon {UART1_RTSN, (M14 | PIN_INPUT)}, /* uart1_rtsn.gpio7_25 */ 21089a38953SNishanth Menon {UART2_RXD, (M14 | PIN_INPUT_PULLDOWN)}, /* uart2_rxd.gpio7_26 */ 21189a38953SNishanth Menon {UART2_TXD, (M14 | PIN_INPUT_PULLDOWN)}, /* uart2_txd.gpio7_27 */ 21289a38953SNishanth Menon {UART2_CTSN, (M2 | PIN_INPUT_PULLUP)}, /* uart2_ctsn.uart3_rxd */ 213d9e14671SLokesh Vutla {UART2_RTSN, (M1 | PIN_OUTPUT)}, /* uart2_rtsn.uart3_txd */ 21489a38953SNishanth Menon {I2C1_SDA, (M0 | PIN_INPUT_PULLUP)}, /* i2c1_sda.i2c1_sda */ 21589a38953SNishanth Menon {I2C1_SCL, (M0 | PIN_INPUT_PULLUP)}, /* i2c1_scl.i2c1_scl */ 21689a38953SNishanth Menon {I2C2_SDA, (M1 | PIN_INPUT_PULLUP)}, /* i2c2_sda.hdmi1_ddc_scl */ 21789a38953SNishanth Menon {I2C2_SCL, (M1 | PIN_INPUT_PULLUP)}, /* i2c2_scl.hdmi1_ddc_sda */ 21889a38953SNishanth Menon {WAKEUP0, (M0 | PIN_INPUT)}, /* Wakeup0.Wakeup0 */ 21989a38953SNishanth Menon {WAKEUP1, (M0 | PIN_INPUT)}, /* Wakeup1.Wakeup1 */ 22089a38953SNishanth Menon {WAKEUP2, (M0 | PIN_INPUT)}, /* Wakeup2.Wakeup2 */ 22189a38953SNishanth Menon {WAKEUP3, (M0 | PIN_INPUT)}, /* Wakeup3.Wakeup3 */ 22289a38953SNishanth Menon {ON_OFF, (M0 | PIN_OUTPUT)}, /* on_off.on_off */ 22389a38953SNishanth Menon {RTC_PORZ, (M0 | PIN_INPUT)}, /* rtc_porz.rtc_porz */ 22489a38953SNishanth Menon {TMS, (M0 | PIN_INPUT_PULLUP)}, /* tms.tms */ 225d9e14671SLokesh Vutla {TDI, (M0 | PIN_INPUT_PULLUP | SLEWCONTROL)}, /* tdi.tdi */ 22689a38953SNishanth Menon {TDO, (M0 | PIN_OUTPUT)}, /* tdo.tdo */ 22789a38953SNishanth Menon {TCLK, (M0 | PIN_INPUT_PULLDOWN)}, /* tclk.tclk */ 22889a38953SNishanth Menon {TRSTN, (M0 | PIN_INPUT)}, /* trstn.trstn */ 22989a38953SNishanth Menon {RTCK, (M0 | PIN_OUTPUT)}, /* rtck.rtck */ 23089a38953SNishanth Menon {EMU0, (M0 | PIN_INPUT)}, /* emu0.emu0 */ 23189a38953SNishanth Menon {EMU1, (M0 | PIN_INPUT)}, /* emu1.emu1 */ 23289a38953SNishanth Menon {NMIN_DSP, (M0 | PIN_INPUT)}, /* nmin_dsp.nmin_dsp */ 23389a38953SNishanth Menon {RSTOUTN, (M0 | PIN_OUTPUT)}, /* rstoutn.rstoutn */ 23489a38953SNishanth Menon }; 23589a38953SNishanth Menon 23689a38953SNishanth Menon const struct pad_conf_entry core_padconf_array_delta_x15_sr1_1[] = { 237d9e14671SLokesh Vutla {MMC1_SDWP, (M14 | PIN_INPUT | SLEWCONTROL)}, /* mmc1_sdwp.gpio6_28 */ 238d9e14671SLokesh Vutla {VOUT1_CLK, (M0 | PIN_OUTPUT | SLEWCONTROL)}, /* vout1_clk.vout1_clk */ 239d9e14671SLokesh Vutla {VOUT1_DE, (M0 | PIN_OUTPUT | SLEWCONTROL)}, /* vout1_de.vout1_de */ 240d9e14671SLokesh Vutla {VOUT1_HSYNC, (M0 | PIN_OUTPUT | SLEWCONTROL)}, /* vout1_hsync.vout1_hsync */ 241d9e14671SLokesh Vutla {VOUT1_VSYNC, (M0 | PIN_OUTPUT | SLEWCONTROL)}, /* vout1_vsync.vout1_vsync */ 242d9e14671SLokesh Vutla {VOUT1_D0, (M0 | PIN_OUTPUT | SLEWCONTROL)}, /* vout1_d0.vout1_d0 */ 243d9e14671SLokesh Vutla {VOUT1_D1, (M0 | PIN_OUTPUT | SLEWCONTROL)}, /* vout1_d1.vout1_d1 */ 244d9e14671SLokesh Vutla {VOUT1_D2, (M0 | PIN_OUTPUT | SLEWCONTROL)}, /* vout1_d2.vout1_d2 */ 245d9e14671SLokesh Vutla {VOUT1_D3, (M0 | PIN_OUTPUT | SLEWCONTROL)}, /* vout1_d3.vout1_d3 */ 246d9e14671SLokesh Vutla {VOUT1_D4, (M0 | PIN_OUTPUT | SLEWCONTROL)}, /* vout1_d4.vout1_d4 */ 247d9e14671SLokesh Vutla {VOUT1_D5, (M0 | PIN_OUTPUT | SLEWCONTROL)}, /* vout1_d5.vout1_d5 */ 248d9e14671SLokesh Vutla {VOUT1_D6, (M0 | PIN_OUTPUT | SLEWCONTROL)}, /* vout1_d6.vout1_d6 */ 249d9e14671SLokesh Vutla {VOUT1_D7, (M0 | PIN_OUTPUT | SLEWCONTROL)}, /* vout1_d7.vout1_d7 */ 250d9e14671SLokesh Vutla {VOUT1_D8, (M0 | PIN_OUTPUT | SLEWCONTROL)}, /* vout1_d8.vout1_d8 */ 251d9e14671SLokesh Vutla {VOUT1_D9, (M0 | PIN_OUTPUT | SLEWCONTROL)}, /* vout1_d9.vout1_d9 */ 252d9e14671SLokesh Vutla {VOUT1_D10, (M0 | PIN_OUTPUT | SLEWCONTROL)}, /* vout1_d10.vout1_d10 */ 253d9e14671SLokesh Vutla {VOUT1_D11, (M0 | PIN_OUTPUT | SLEWCONTROL)}, /* vout1_d11.vout1_d11 */ 254d9e14671SLokesh Vutla {VOUT1_D12, (M0 | PIN_OUTPUT | SLEWCONTROL)}, /* vout1_d12.vout1_d12 */ 255d9e14671SLokesh Vutla {VOUT1_D13, (M0 | PIN_OUTPUT | SLEWCONTROL)}, /* vout1_d13.vout1_d13 */ 256d9e14671SLokesh Vutla {VOUT1_D14, (M0 | PIN_OUTPUT | SLEWCONTROL)}, /* vout1_d14.vout1_d14 */ 257d9e14671SLokesh Vutla {VOUT1_D15, (M0 | PIN_OUTPUT | SLEWCONTROL)}, /* vout1_d15.vout1_d15 */ 258d9e14671SLokesh Vutla {VOUT1_D16, (M0 | PIN_OUTPUT | SLEWCONTROL)}, /* vout1_d16.vout1_d16 */ 259d9e14671SLokesh Vutla {VOUT1_D17, (M0 | PIN_OUTPUT | SLEWCONTROL)}, /* vout1_d17.vout1_d17 */ 260d9e14671SLokesh Vutla {VOUT1_D18, (M0 | PIN_OUTPUT | SLEWCONTROL)}, /* vout1_d18.vout1_d18 */ 261d9e14671SLokesh Vutla {VOUT1_D19, (M0 | PIN_OUTPUT | SLEWCONTROL)}, /* vout1_d19.vout1_d19 */ 262d9e14671SLokesh Vutla {VOUT1_D20, (M0 | PIN_OUTPUT | SLEWCONTROL)}, /* vout1_d20.vout1_d20 */ 263d9e14671SLokesh Vutla {VOUT1_D21, (M0 | PIN_OUTPUT | SLEWCONTROL)}, /* vout1_d21.vout1_d21 */ 264d9e14671SLokesh Vutla {VOUT1_D22, (M0 | PIN_OUTPUT | SLEWCONTROL)}, /* vout1_d22.vout1_d22 */ 265d9e14671SLokesh Vutla {VOUT1_D23, (M0 | PIN_OUTPUT | SLEWCONTROL)}, /* vout1_d23.vout1_d23 */ 26689a38953SNishanth Menon }; 26789a38953SNishanth Menon 26889a38953SNishanth Menon const struct pad_conf_entry core_padconf_array_delta_x15_sr2_0[] = { 26989a38953SNishanth Menon {VIN1A_CLK0, (M14 | PIN_INPUT)}, /* vin1a_clk0.gpio2_30 */ 270d9e14671SLokesh Vutla {VOUT1_CLK, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)}, /* vout1_clk.vout1_clk */ 271d9e14671SLokesh Vutla {VOUT1_DE, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)}, /* vout1_de.vout1_de */ 272d9e14671SLokesh Vutla {VOUT1_HSYNC, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)}, /* vout1_hsync.vout1_hsync */ 273d9e14671SLokesh Vutla {VOUT1_VSYNC, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)}, /* vout1_vsync.vout1_vsync */ 274d9e14671SLokesh Vutla {VOUT1_D0, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)}, /* vout1_d0.vout1_d0 */ 275d9e14671SLokesh Vutla {VOUT1_D1, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)}, /* vout1_d1.vout1_d1 */ 276d9e14671SLokesh Vutla {VOUT1_D2, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)}, /* vout1_d2.vout1_d2 */ 277d9e14671SLokesh Vutla {VOUT1_D3, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)}, /* vout1_d3.vout1_d3 */ 278d9e14671SLokesh Vutla {VOUT1_D4, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)}, /* vout1_d4.vout1_d4 */ 279d9e14671SLokesh Vutla {VOUT1_D5, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)}, /* vout1_d5.vout1_d5 */ 280d9e14671SLokesh Vutla {VOUT1_D6, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)}, /* vout1_d6.vout1_d6 */ 281d9e14671SLokesh Vutla {VOUT1_D7, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)}, /* vout1_d7.vout1_d7 */ 282d9e14671SLokesh Vutla {VOUT1_D8, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)}, /* vout1_d8.vout1_d8 */ 283d9e14671SLokesh Vutla {VOUT1_D9, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)}, /* vout1_d9.vout1_d9 */ 284d9e14671SLokesh Vutla {VOUT1_D10, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)}, /* vout1_d10.vout1_d10 */ 285d9e14671SLokesh Vutla {VOUT1_D11, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)}, /* vout1_d11.vout1_d11 */ 286d9e14671SLokesh Vutla {VOUT1_D12, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)}, /* vout1_d12.vout1_d12 */ 287d9e14671SLokesh Vutla {VOUT1_D13, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)}, /* vout1_d13.vout1_d13 */ 288d9e14671SLokesh Vutla {VOUT1_D14, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)}, /* vout1_d14.vout1_d14 */ 289d9e14671SLokesh Vutla {VOUT1_D15, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)}, /* vout1_d15.vout1_d15 */ 290d9e14671SLokesh Vutla {VOUT1_D16, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)}, /* vout1_d16.vout1_d16 */ 291d9e14671SLokesh Vutla {VOUT1_D17, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)}, /* vout1_d17.vout1_d17 */ 292d9e14671SLokesh Vutla {VOUT1_D18, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)}, /* vout1_d18.vout1_d18 */ 293d9e14671SLokesh Vutla {VOUT1_D19, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)}, /* vout1_d19.vout1_d19 */ 294d9e14671SLokesh Vutla {VOUT1_D20, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)}, /* vout1_d20.vout1_d20 */ 295d9e14671SLokesh Vutla {VOUT1_D21, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)}, /* vout1_d21.vout1_d21 */ 296d9e14671SLokesh Vutla {VOUT1_D22, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)}, /* vout1_d22.vout1_d22 */ 297d9e14671SLokesh Vutla {VOUT1_D23, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)}, /* vout1_d23.vout1_d23 */ 29874cc8b09SKipisz, Steven }; 29974cc8b09SKipisz, Steven 300443b0df3SLokesh Vutla const struct pad_conf_entry core_padconf_array_essential_am574x_idk[] = { 301443b0df3SLokesh Vutla {GPMC_A0, (M6 | PIN_INPUT | MANUAL_MODE)}, /* gpmc_a0.vin4b_d0 */ 302443b0df3SLokesh Vutla {GPMC_A1, (M6 | PIN_INPUT | MANUAL_MODE)}, /* gpmc_a1.vin4b_d1 */ 303443b0df3SLokesh Vutla {GPMC_A2, (M6 | PIN_INPUT | MANUAL_MODE)}, /* gpmc_a2.vin4b_d2 */ 304443b0df3SLokesh Vutla {GPMC_A3, (M6 | PIN_INPUT | MANUAL_MODE)}, /* gpmc_a3.vin4b_d3 */ 305443b0df3SLokesh Vutla {GPMC_A4, (M6 | PIN_INPUT | MANUAL_MODE)}, /* gpmc_a4.vin4b_d4 */ 306443b0df3SLokesh Vutla {GPMC_A5, (M6 | PIN_INPUT | MANUAL_MODE)}, /* gpmc_a5.vin4b_d5 */ 307443b0df3SLokesh Vutla {GPMC_A6, (M6 | PIN_INPUT | MANUAL_MODE)}, /* gpmc_a6.vin4b_d6 */ 308443b0df3SLokesh Vutla {GPMC_A7, (M6 | PIN_INPUT | MANUAL_MODE)}, /* gpmc_a7.vin4b_d7 */ 309443b0df3SLokesh Vutla {GPMC_A8, (M6 | PIN_INPUT | MANUAL_MODE)}, /* gpmc_a8.vin4b_hsync1 */ 310443b0df3SLokesh Vutla {GPMC_A9, (M6 | PIN_INPUT | MANUAL_MODE)}, /* gpmc_a9.vin4b_vsync1 */ 311443b0df3SLokesh Vutla {GPMC_A10, (M6 | PIN_INPUT | MANUAL_MODE)}, /* gpmc_a10.vin4b_clk1 */ 312443b0df3SLokesh Vutla {GPMC_A11, (M6 | PIN_INPUT | MANUAL_MODE)}, /* gpmc_a11.vin4b_de1 */ 313443b0df3SLokesh Vutla {GPMC_A12, (M6 | PIN_INPUT | MANUAL_MODE)}, /* gpmc_a12.vin4b_fld1 */ 314443b0df3SLokesh Vutla {GPMC_A13, (M1 | PIN_INPUT | MANUAL_MODE)}, /* gpmc_a13.qspi1_rtclk */ 315443b0df3SLokesh Vutla {GPMC_A14, (M1 | PIN_INPUT | MANUAL_MODE)}, /* gpmc_a14.qspi1_d3 */ 316443b0df3SLokesh Vutla {GPMC_A15, (M1 | PIN_INPUT | MANUAL_MODE)}, /* gpmc_a15.qspi1_d2 */ 317443b0df3SLokesh Vutla {GPMC_A16, (M1 | PIN_INPUT | MANUAL_MODE)}, /* gpmc_a16.qspi1_d0 */ 318443b0df3SLokesh Vutla {GPMC_A17, (M1 | PIN_INPUT | MANUAL_MODE)}, /* gpmc_a17.qspi1_d1 */ 319443b0df3SLokesh Vutla {GPMC_A18, (M1 | PIN_OUTPUT | MANUAL_MODE)}, /* gpmc_a18.qspi1_sclk */ 320443b0df3SLokesh Vutla {GPMC_A19, (M1 | PIN_INPUT_PULLUP)}, /* gpmc_a19.mmc2_dat4 */ 321443b0df3SLokesh Vutla {GPMC_A20, (M1 | PIN_INPUT_PULLUP)}, /* gpmc_a20.mmc2_dat5 */ 322443b0df3SLokesh Vutla {GPMC_A21, (M1 | PIN_INPUT_PULLUP)}, /* gpmc_a21.mmc2_dat6 */ 323443b0df3SLokesh Vutla {GPMC_A22, (M1 | PIN_INPUT_PULLUP)}, /* gpmc_a22.mmc2_dat7 */ 324443b0df3SLokesh Vutla {GPMC_A23, (M1 | PIN_INPUT_PULLUP)}, /* gpmc_a23.mmc2_clk */ 325443b0df3SLokesh Vutla {GPMC_A24, (M1 | PIN_INPUT_PULLUP)}, /* gpmc_a24.mmc2_dat0 */ 326443b0df3SLokesh Vutla {GPMC_A25, (M1 | PIN_INPUT_PULLUP)}, /* gpmc_a25.mmc2_dat1 */ 327443b0df3SLokesh Vutla {GPMC_A26, (M1 | PIN_INPUT_PULLUP)}, /* gpmc_a26.mmc2_dat2 */ 328443b0df3SLokesh Vutla {GPMC_A27, (M1 | PIN_INPUT_PULLUP)}, /* gpmc_a27.mmc2_dat3 */ 329443b0df3SLokesh Vutla {GPMC_CS1, (M1 | PIN_INPUT_PULLUP)}, /* gpmc_cs1.mmc2_cmd */ 330443b0df3SLokesh Vutla {GPMC_CS2, (M1 | PIN_OUTPUT | MANUAL_MODE)}, /* gpmc_cs2.qspi1_cs0 */ 331443b0df3SLokesh Vutla {VIN1A_D5, (M14 | PIN_OUTPUT)}, /* vin1a_d5.gpio3_9 */ 332443b0df3SLokesh Vutla {VIN1A_D6, (M14 | PIN_OUTPUT)}, /* vin1a_d6.gpio3_10 */ 333443b0df3SLokesh Vutla {VIN1A_D7, (M14 | PIN_OUTPUT)}, /* vin1a_d7.gpio3_11 */ 334443b0df3SLokesh Vutla {VIN1A_D8, (M14 | PIN_OUTPUT)}, /* vin1a_d8.gpio3_12 */ 335443b0df3SLokesh Vutla {VIN1A_D10, (M14 | PIN_INPUT_PULLDOWN)}, /* vin1a_d10.gpio3_14 */ 336443b0df3SLokesh Vutla {VIN1A_D12, (M14 | PIN_INPUT)}, /* vin1a_d12.gpio3_16 */ 337443b0df3SLokesh Vutla {VIN1A_D13, (M14 | PIN_OUTPUT)}, /* vin1a_d13.gpio3_17 */ 338443b0df3SLokesh Vutla {VIN1A_D14, (M14 | PIN_OUTPUT)}, /* vin1a_d14.gpio3_18 */ 339443b0df3SLokesh Vutla {VIN1A_D15, (M14 | PIN_OUTPUT)}, /* vin1a_d15.gpio3_19 */ 340443b0df3SLokesh Vutla {VIN1A_D17, (M14 | PIN_OUTPUT)}, /* vin1a_d17.gpio3_21 */ 341443b0df3SLokesh Vutla {VIN1A_D18, (M14 | PIN_OUTPUT_PULLDOWN)}, /* vin1a_d18.gpio3_22 */ 342443b0df3SLokesh Vutla {VIN1A_D19, (M14 | PIN_OUTPUT_PULLUP)}, /* vin1a_d19.gpio3_23 */ 343443b0df3SLokesh Vutla {VIN1A_D22, (M14 | PIN_INPUT)}, /* vin1a_d22.gpio3_26 */ 344443b0df3SLokesh Vutla {VIN2A_CLK0, (M14 | PIN_INPUT_PULLUP)}, /* vin2a_clk0.gpio3_28 */ 345443b0df3SLokesh Vutla {VIN2A_DE0, (M14 | PIN_INPUT_PULLUP)}, /* vin2a_de0.gpio3_29 */ 346443b0df3SLokesh Vutla {VIN2A_FLD0, (M14 | PIN_INPUT_PULLUP)}, /* vin2a_fld0.gpio3_30 */ 347443b0df3SLokesh Vutla {VIN2A_HSYNC0, (M14 | PIN_INPUT_PULLUP)}, /* vin2a_hsync0.gpio3_31 */ 348443b0df3SLokesh Vutla {VIN2A_VSYNC0, (M14 | PIN_INPUT)}, /* vin2a_vsync0.gpio4_0 */ 349443b0df3SLokesh Vutla {VIN2A_D0, (M11 | PIN_INPUT)}, /* vin2a_d0.pr1_uart0_rxd */ 350443b0df3SLokesh Vutla {VIN2A_D1, (M11 | PIN_OUTPUT)}, /* vin2a_d1.pr1_uart0_txd */ 351443b0df3SLokesh Vutla {VIN2A_D2, (M10 | PIN_OUTPUT)}, /* vin2a_d2.eCAP1_in_PWM1_out */ 352443b0df3SLokesh Vutla {VIN2A_D3, (M11 | PIN_INPUT_PULLDOWN)}, /* vin2a_d3.pr1_edc_latch0_in */ 353443b0df3SLokesh Vutla {VIN2A_D4, (M11 | PIN_OUTPUT)}, /* vin2a_d4.pr1_edc_sync0_out */ 354443b0df3SLokesh Vutla {VIN2A_D5, (M13 | PIN_OUTPUT_PULLDOWN | MANUAL_MODE)}, /* vin2a_d5.pr1_pru1_gpo2 */ 355443b0df3SLokesh Vutla {VIN2A_D10, (M11 | PIN_OUTPUT_PULLDOWN)}, /* vin2a_d10.pr1_mdio_mdclk */ 356443b0df3SLokesh Vutla {VIN2A_D11, (M11 | PIN_INPUT)}, /* vin2a_d11.pr1_mdio_data */ 357443b0df3SLokesh Vutla {VIN2A_D12, (M3 | PIN_OUTPUT_PULLDOWN | MANUAL_MODE)}, /* vin2a_d12.rgmii1_txc */ 358443b0df3SLokesh Vutla {VIN2A_D13, (M3 | PIN_OUTPUT_PULLDOWN | MANUAL_MODE)}, /* vin2a_d13.rgmii1_txctl */ 359443b0df3SLokesh Vutla {VIN2A_D14, (M3 | PIN_OUTPUT_PULLDOWN | MANUAL_MODE)}, /* vin2a_d14.rgmii1_txd3 */ 360443b0df3SLokesh Vutla {VIN2A_D15, (M3 | PIN_OUTPUT_PULLDOWN | MANUAL_MODE)}, /* vin2a_d15.rgmii1_txd2 */ 361443b0df3SLokesh Vutla {VIN2A_D16, (M3 | PIN_OUTPUT_PULLDOWN | MANUAL_MODE)}, /* vin2a_d16.rgmii1_txd1 */ 362443b0df3SLokesh Vutla {VIN2A_D17, (M3 | PIN_OUTPUT_PULLDOWN | MANUAL_MODE)}, /* vin2a_d17.rgmii1_txd0 */ 363443b0df3SLokesh Vutla {VIN2A_D18, (M3 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* vin2a_d18.rgmii1_rxc */ 364443b0df3SLokesh Vutla {VIN2A_D19, (M3 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* vin2a_d19.rgmii1_rxctl */ 365443b0df3SLokesh Vutla {VIN2A_D20, (M3 | PIN_INPUT_PULLUP | MANUAL_MODE)}, /* vin2a_d20.rgmii1_rxd3 */ 366443b0df3SLokesh Vutla {VIN2A_D21, (M3 | PIN_INPUT_PULLUP | MANUAL_MODE)}, /* vin2a_d21.rgmii1_rxd2 */ 367443b0df3SLokesh Vutla {VIN2A_D22, (M3 | PIN_INPUT_PULLUP | MANUAL_MODE)}, /* vin2a_d22.rgmii1_rxd1 */ 368443b0df3SLokesh Vutla {VIN2A_D23, (M3 | PIN_INPUT_PULLUP | MANUAL_MODE)}, /* vin2a_d23.rgmii1_rxd0 */ 369443b0df3SLokesh Vutla {VOUT1_CLK, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)}, /* vout1_clk.vout1_clk */ 370443b0df3SLokesh Vutla {VOUT1_DE, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)}, /* vout1_de.vout1_de */ 371443b0df3SLokesh Vutla {VOUT1_FLD, (M14 | PIN_OUTPUT)}, /* vout1_fld.gpio4_21 */ 372443b0df3SLokesh Vutla {VOUT1_HSYNC, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)}, /* vout1_hsync.vout1_hsync */ 373443b0df3SLokesh Vutla {VOUT1_VSYNC, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)}, /* vout1_vsync.vout1_vsync */ 374443b0df3SLokesh Vutla {VOUT1_D0, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)}, /* vout1_d0.vout1_d0 */ 375443b0df3SLokesh Vutla {VOUT1_D1, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)}, /* vout1_d1.vout1_d1 */ 376443b0df3SLokesh Vutla {VOUT1_D2, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)}, /* vout1_d2.vout1_d2 */ 377443b0df3SLokesh Vutla {VOUT1_D3, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)}, /* vout1_d3.vout1_d3 */ 378443b0df3SLokesh Vutla {VOUT1_D4, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)}, /* vout1_d4.vout1_d4 */ 379443b0df3SLokesh Vutla {VOUT1_D5, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)}, /* vout1_d5.vout1_d5 */ 380443b0df3SLokesh Vutla {VOUT1_D6, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)}, /* vout1_d6.vout1_d6 */ 381443b0df3SLokesh Vutla {VOUT1_D7, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)}, /* vout1_d7.vout1_d7 */ 382443b0df3SLokesh Vutla {VOUT1_D8, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)}, /* vout1_d8.vout1_d8 */ 383443b0df3SLokesh Vutla {VOUT1_D9, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)}, /* vout1_d9.vout1_d9 */ 384443b0df3SLokesh Vutla {VOUT1_D10, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)}, /* vout1_d10.vout1_d10 */ 385443b0df3SLokesh Vutla {VOUT1_D11, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)}, /* vout1_d11.vout1_d11 */ 386443b0df3SLokesh Vutla {VOUT1_D12, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)}, /* vout1_d12.vout1_d12 */ 387443b0df3SLokesh Vutla {VOUT1_D13, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)}, /* vout1_d13.vout1_d13 */ 388443b0df3SLokesh Vutla {VOUT1_D14, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)}, /* vout1_d14.vout1_d14 */ 389443b0df3SLokesh Vutla {VOUT1_D15, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)}, /* vout1_d15.vout1_d15 */ 390443b0df3SLokesh Vutla {VOUT1_D16, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)}, /* vout1_d16.vout1_d16 */ 391443b0df3SLokesh Vutla {VOUT1_D17, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)}, /* vout1_d17.vout1_d17 */ 392443b0df3SLokesh Vutla {VOUT1_D18, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)}, /* vout1_d18.vout1_d18 */ 393443b0df3SLokesh Vutla {VOUT1_D19, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)}, /* vout1_d19.vout1_d19 */ 394443b0df3SLokesh Vutla {VOUT1_D20, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)}, /* vout1_d20.vout1_d20 */ 395443b0df3SLokesh Vutla {VOUT1_D21, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)}, /* vout1_d21.vout1_d21 */ 396443b0df3SLokesh Vutla {VOUT1_D22, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)}, /* vout1_d22.vout1_d22 */ 397443b0df3SLokesh Vutla {VOUT1_D23, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)}, /* vout1_d23.vout1_d23 */ 398443b0df3SLokesh Vutla {MDIO_MCLK, (M0 | PIN_INPUT_SLEW)}, /* mdio_mclk.mdio_mclk */ 399443b0df3SLokesh Vutla {MDIO_D, (M0 | PIN_INPUT | SLEWCONTROL)}, /* mdio_d.mdio_d */ 400443b0df3SLokesh Vutla {RGMII0_TXC, (M0 | PIN_OUTPUT_PULLDOWN | MANUAL_MODE)}, /* rgmii0_txc.rgmii0_txc */ 401443b0df3SLokesh Vutla {RGMII0_TXCTL, (M0 | PIN_OUTPUT_PULLDOWN | MANUAL_MODE)}, /* rgmii0_txctl.rgmii0_txctl */ 402443b0df3SLokesh Vutla {RGMII0_TXD3, (M0 | PIN_OUTPUT_PULLDOWN | MANUAL_MODE)}, /* rgmii0_txd3.rgmii0_txd3 */ 403443b0df3SLokesh Vutla {RGMII0_TXD2, (M0 | PIN_OUTPUT_PULLDOWN | MANUAL_MODE)}, /* rgmii0_txd2.rgmii0_txd2 */ 404443b0df3SLokesh Vutla {RGMII0_TXD1, (M0 | PIN_OUTPUT_PULLDOWN | MANUAL_MODE)}, /* rgmii0_txd1.rgmii0_txd1 */ 405443b0df3SLokesh Vutla {RGMII0_TXD0, (M0 | PIN_OUTPUT_PULLDOWN | MANUAL_MODE)}, /* rgmii0_txd0.rgmii0_txd0 */ 406443b0df3SLokesh Vutla {RGMII0_RXC, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* rgmii0_rxc.rgmii0_rxc */ 407443b0df3SLokesh Vutla {RGMII0_RXCTL, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* rgmii0_rxctl.rgmii0_rxctl */ 408443b0df3SLokesh Vutla {RGMII0_RXD3, (M0 | PIN_INPUT_PULLUP | MANUAL_MODE)}, /* rgmii0_rxd3.rgmii0_rxd3 */ 409443b0df3SLokesh Vutla {RGMII0_RXD2, (M0 | PIN_INPUT_PULLUP | MANUAL_MODE)}, /* rgmii0_rxd2.rgmii0_rxd2 */ 410443b0df3SLokesh Vutla {RGMII0_RXD1, (M0 | PIN_INPUT_PULLUP | MANUAL_MODE)}, /* rgmii0_rxd1.rgmii0_rxd1 */ 411443b0df3SLokesh Vutla {RGMII0_RXD0, (M0 | PIN_INPUT_PULLUP | MANUAL_MODE)}, /* rgmii0_rxd0.rgmii0_rxd0 */ 412443b0df3SLokesh Vutla {USB1_DRVVBUS, (M0 | PIN_OUTPUT | SLEWCONTROL)}, /* usb1_drvvbus.usb1_drvvbus */ 413443b0df3SLokesh Vutla {USB2_DRVVBUS, (M0 | PIN_OUTPUT | SLEWCONTROL)}, /* usb2_drvvbus.usb2_drvvbus */ 414443b0df3SLokesh Vutla {GPIO6_14, (M0 | PIN_OUTPUT)}, /* gpio6_14.gpio6_14 */ 415443b0df3SLokesh Vutla {GPIO6_15, (M0 | PIN_OUTPUT)}, /* gpio6_15.gpio6_15 */ 416443b0df3SLokesh Vutla {GPIO6_16, (M0 | PIN_INPUT_PULLUP)}, /* gpio6_16.gpio6_16 */ 417443b0df3SLokesh Vutla {XREF_CLK0, (M11 | PIN_INPUT_PULLDOWN)}, /* xref_clk0.pr2_mii1_col */ 418443b0df3SLokesh Vutla {XREF_CLK1, (M11 | PIN_INPUT_PULLDOWN)}, /* xref_clk1.pr2_mii1_crs */ 419443b0df3SLokesh Vutla {XREF_CLK2, (M14 | PIN_OUTPUT)}, /* xref_clk2.gpio6_19 */ 420443b0df3SLokesh Vutla {XREF_CLK3, (M9 | PIN_OUTPUT_PULLDOWN)}, /* xref_clk3.clkout3 */ 421443b0df3SLokesh Vutla {MCASP1_ACLKX, (M11 | PIN_OUTPUT_PULLDOWN)}, /* mcasp1_aclkx.pr2_mdio_mdclk */ 422443b0df3SLokesh Vutla {MCASP1_FSX, (M11 | PIN_INPUT | SLEWCONTROL)}, /* mcasp1_fsx.pr2_mdio_data */ 423443b0df3SLokesh Vutla {MCASP1_ACLKR, (M14 | PIN_INPUT)}, /* mcasp1_aclkr.gpio5_0 */ 424443b0df3SLokesh Vutla {MCASP1_FSR, (M14 | PIN_INPUT)}, /* mcasp1_fsr.gpio5_1 */ 425443b0df3SLokesh Vutla {MCASP1_AXR0, (M11 | PIN_INPUT_PULLUP | SLEWCONTROL)}, /* mcasp1_axr0.pr2_mii0_rxer */ 426443b0df3SLokesh Vutla {MCASP1_AXR1, (M11 | PIN_INPUT_PULLUP | SLEWCONTROL)}, /* mcasp1_axr1.pr2_mii_mt0_clk */ 427443b0df3SLokesh Vutla {MCASP1_AXR2, (M14 | PIN_INPUT)}, /* mcasp1_axr2.gpio5_4 */ 428443b0df3SLokesh Vutla {MCASP1_AXR3, (M14 | PIN_INPUT)}, /* mcasp1_axr3.gpio5_5 */ 429443b0df3SLokesh Vutla {MCASP1_AXR4, (M14 | PIN_OUTPUT)}, /* mcasp1_axr4.gpio5_6 */ 430443b0df3SLokesh Vutla {MCASP1_AXR5, (M14 | PIN_OUTPUT)}, /* mcasp1_axr5.gpio5_7 */ 431443b0df3SLokesh Vutla {MCASP1_AXR6, (M14 | PIN_OUTPUT)}, /* mcasp1_axr6.gpio5_8 */ 432443b0df3SLokesh Vutla {MCASP1_AXR7, (M14 | PIN_OUTPUT)}, /* mcasp1_axr7.gpio5_9 */ 433443b0df3SLokesh Vutla {MCASP1_AXR8, (M11 | PIN_OUTPUT_PULLUP | SLEWCONTROL)}, /* mcasp1_axr8.pr2_mii0_txen */ 434443b0df3SLokesh Vutla {MCASP1_AXR9, (M11 | PIN_OUTPUT_PULLUP | SLEWCONTROL)}, /* mcasp1_axr9.pr2_mii0_txd3 */ 435443b0df3SLokesh Vutla {MCASP1_AXR10, (M11 | PIN_OUTPUT_PULLUP | SLEWCONTROL)}, /* mcasp1_axr10.pr2_mii0_txd2 */ 436443b0df3SLokesh Vutla {MCASP1_AXR11, (M11 | PIN_OUTPUT_PULLUP | SLEWCONTROL)}, /* mcasp1_axr11.pr2_mii0_txd1 */ 437443b0df3SLokesh Vutla {MCASP1_AXR12, (M11 | PIN_OUTPUT_PULLUP | SLEWCONTROL)}, /* mcasp1_axr12.pr2_mii0_txd0 */ 438443b0df3SLokesh Vutla {MCASP1_AXR13, (M11 | PIN_INPUT_PULLUP | SLEWCONTROL)}, /* mcasp1_axr13.pr2_mii_mr0_clk */ 439443b0df3SLokesh Vutla {MCASP1_AXR14, (M11 | PIN_INPUT_SLEW)}, /* mcasp1_axr14.pr2_mii0_rxdv */ 440443b0df3SLokesh Vutla {MCASP1_AXR15, (M11 | PIN_INPUT_SLEW)}, /* mcasp1_axr15.pr2_mii0_rxd3 */ 441443b0df3SLokesh Vutla {MCASP2_ACLKX, (M11 | PIN_INPUT_PULLDOWN)}, /* mcasp2_aclkx.pr2_mii0_rxd2 */ 442443b0df3SLokesh Vutla {MCASP2_FSX, (M11 | PIN_INPUT_SLEW)}, /* mcasp2_fsx.pr2_mii0_rxd1 */ 443443b0df3SLokesh Vutla {MCASP2_AXR2, (M11 | PIN_INPUT_SLEW)}, /* mcasp2_axr2.pr2_mii0_rxd0 */ 444443b0df3SLokesh Vutla {MCASP2_AXR3, (M11 | PIN_INPUT_SLEW)}, /* mcasp2_axr3.pr2_mii0_rxlink */ 445443b0df3SLokesh Vutla {MCASP2_AXR4, (M14 | PIN_INPUT)}, /* mcasp2_axr4.gpio1_4 */ 446443b0df3SLokesh Vutla {MCASP2_AXR5, (M14 | PIN_OUTPUT)}, /* mcasp2_axr5.gpio6_7 */ 447443b0df3SLokesh Vutla {MCASP2_AXR6, (M14 | PIN_OUTPUT)}, /* mcasp2_axr6.gpio2_29 */ 448443b0df3SLokesh Vutla {MCASP2_AXR7, (M14 | PIN_INPUT)}, /* mcasp2_axr7.gpio1_5 */ 449443b0df3SLokesh Vutla {MCASP3_ACLKX, (M11 | PIN_INPUT_PULLDOWN)}, /* mcasp3_aclkx.pr2_mii0_crs */ 450443b0df3SLokesh Vutla {MCASP3_FSX, (M11 | PIN_INPUT_SLEW)}, /* mcasp3_fsx.pr2_mii0_col */ 451443b0df3SLokesh Vutla {MCASP3_AXR0, (M11 | PIN_INPUT_PULLUP | SLEWCONTROL)}, /* mcasp3_axr0.pr2_mii1_rxer */ 452443b0df3SLokesh Vutla {MCASP3_AXR1, (M11 | PIN_INPUT_PULLUP | SLEWCONTROL)}, /* mcasp3_axr1.pr2_mii1_rxlink */ 453443b0df3SLokesh Vutla {MCASP4_ACLKX, (M2 | PIN_INPUT)}, /* mcasp4_aclkx.spi3_sclk */ 454443b0df3SLokesh Vutla {MCASP4_FSX, (M2 | PIN_INPUT)}, /* mcasp4_fsx.spi3_d1 */ 455443b0df3SLokesh Vutla {MCASP4_AXR1, (M2 | PIN_INPUT_PULLUP)}, /* mcasp4_axr1.spi3_cs0 */ 456443b0df3SLokesh Vutla {MCASP5_ACLKX, (M13 | PIN_OUTPUT | MANUAL_MODE)}, /* mcasp5_aclkx.pr2_pru1_gpo1 */ 457443b0df3SLokesh Vutla {MCASP5_FSX, (M12 | PIN_INPUT | MANUAL_MODE)}, /* mcasp5_fsx.pr2_pru1_gpi2 */ 458443b0df3SLokesh Vutla {MMC1_CLK, (M0 | PIN_INPUT_PULLUP)}, /* mmc1_clk.mmc1_clk */ 459443b0df3SLokesh Vutla {MMC1_CMD, (M0 | PIN_INPUT_PULLUP)}, /* mmc1_cmd.mmc1_cmd */ 460443b0df3SLokesh Vutla {MMC1_DAT0, (M0 | PIN_INPUT_PULLUP)}, /* mmc1_dat0.mmc1_dat0 */ 461443b0df3SLokesh Vutla {MMC1_DAT1, (M0 | PIN_INPUT_PULLUP)}, /* mmc1_dat1.mmc1_dat1 */ 462443b0df3SLokesh Vutla {MMC1_DAT2, (M0 | PIN_INPUT_PULLUP)}, /* mmc1_dat2.mmc1_dat2 */ 463443b0df3SLokesh Vutla {MMC1_DAT3, (M0 | PIN_INPUT_PULLUP)}, /* mmc1_dat3.mmc1_dat3 */ 464443b0df3SLokesh Vutla {MMC1_SDCD, (M14 | PIN_INPUT | SLEWCONTROL)}, /* mmc1_sdcd.gpio6_27 */ 465443b0df3SLokesh Vutla {MMC1_SDWP, (M14 | PIN_INPUT | SLEWCONTROL)}, /* mmc1_sdwp.gpio6_28 */ 466443b0df3SLokesh Vutla {GPIO6_10, (M11 | PIN_INPUT_PULLUP)}, /* gpio6_10.pr2_mii_mt1_clk */ 467443b0df3SLokesh Vutla {GPIO6_11, (M11 | PIN_OUTPUT_PULLUP)}, /* gpio6_11.pr2_mii1_txen */ 468443b0df3SLokesh Vutla {MMC3_CLK, (M11 | PIN_OUTPUT_PULLUP)}, /* mmc3_clk.pr2_mii1_txd3 */ 469443b0df3SLokesh Vutla {MMC3_CMD, (M11 | PIN_OUTPUT_PULLUP)}, /* mmc3_cmd.pr2_mii1_txd2 */ 470443b0df3SLokesh Vutla {MMC3_DAT0, (M11 | PIN_OUTPUT_PULLUP)}, /* mmc3_dat0.pr2_mii1_txd1 */ 471443b0df3SLokesh Vutla {MMC3_DAT1, (M11 | PIN_OUTPUT_PULLUP)}, /* mmc3_dat1.pr2_mii1_txd0 */ 472443b0df3SLokesh Vutla {MMC3_DAT2, (M11 | PIN_INPUT_PULLUP)}, /* mmc3_dat2.pr2_mii_mr1_clk */ 473443b0df3SLokesh Vutla {MMC3_DAT3, (M11 | PIN_INPUT_PULLDOWN)}, /* mmc3_dat3.pr2_mii1_rxdv */ 474443b0df3SLokesh Vutla {MMC3_DAT4, (M11 | PIN_INPUT_PULLDOWN)}, /* mmc3_dat4.pr2_mii1_rxd3 */ 475443b0df3SLokesh Vutla {MMC3_DAT5, (M11 | PIN_INPUT_PULLDOWN)}, /* mmc3_dat5.pr2_mii1_rxd2 */ 476443b0df3SLokesh Vutla {MMC3_DAT6, (M11 | PIN_INPUT_PULLDOWN)}, /* mmc3_dat6.pr2_mii1_rxd1 */ 477443b0df3SLokesh Vutla {MMC3_DAT7, (M11 | PIN_INPUT_PULLDOWN)}, /* mmc3_dat7.pr2_mii1_rxd0 */ 478443b0df3SLokesh Vutla {SPI1_SCLK, (M14 | PIN_OUTPUT)}, /* spi1_sclk.gpio7_7 */ 479443b0df3SLokesh Vutla {SPI1_D1, (M14 | PIN_OUTPUT)}, /* spi1_d1.gpio7_8 */ 480443b0df3SLokesh Vutla {SPI1_D0, (M14 | PIN_OUTPUT)}, /* spi1_d0.gpio7_9 */ 481443b0df3SLokesh Vutla {SPI1_CS0, (M14 | PIN_OUTPUT)}, /* spi1_cs0.gpio7_10 */ 482443b0df3SLokesh Vutla {SPI1_CS1, (M14 | PIN_OUTPUT)}, /* spi1_cs1.gpio7_11 */ 483443b0df3SLokesh Vutla {SPI1_CS2, (M14 | PIN_INPUT_SLEW)}, /* spi1_cs2.gpio7_12 */ 484*32651e4fSTomi Valkeinen {SPI1_CS3, (M6 | PIN_INPUT | SLEWCONTROL)}, /* spi1_cs3.hdmi1_cec */ 485443b0df3SLokesh Vutla {SPI2_SCLK, (M0 | PIN_INPUT)}, /* spi2_sclk.spi2_sclk */ 486443b0df3SLokesh Vutla {SPI2_D1, (M0 | PIN_INPUT | SLEWCONTROL)}, /* spi2_d1.spi2_d1 */ 487443b0df3SLokesh Vutla {SPI2_D0, (M0 | PIN_INPUT | SLEWCONTROL)}, /* spi2_d0.spi2_d0 */ 488443b0df3SLokesh Vutla {SPI2_CS0, (M0 | PIN_INPUT | SLEWCONTROL)}, /* spi2_cs0.spi2_cs0 */ 489443b0df3SLokesh Vutla {DCAN1_TX, (M15 | PULL_UP)}, /* dcan1_tx.safe for dcan1_tx */ 490443b0df3SLokesh Vutla {DCAN1_RX, (M15 | PULL_UP)}, /* dcan1_rx.safe for dcan1_rx */ 491443b0df3SLokesh Vutla {UART1_RXD, (M14 | PIN_OUTPUT | SLEWCONTROL)}, /* uart1_rxd.gpio7_22 */ 492443b0df3SLokesh Vutla {UART1_TXD, (M14 | PIN_OUTPUT | SLEWCONTROL)}, /* uart1_txd.gpio7_23 */ 493443b0df3SLokesh Vutla {UART2_RXD, (M4 | PIN_INPUT)}, /* uart2_rxd.uart2_rxd */ 494443b0df3SLokesh Vutla {UART2_TXD, (M0 | PIN_OUTPUT)}, /* uart2_txd.uart2_txd */ 495443b0df3SLokesh Vutla {UART2_CTSN, (M2 | PIN_INPUT)}, /* uart2_ctsn.uart3_rxd */ 496443b0df3SLokesh Vutla {UART2_RTSN, (M1 | PIN_OUTPUT)}, /* uart2_rtsn.uart3_txd */ 497443b0df3SLokesh Vutla {I2C1_SDA, (M0 | PIN_INPUT)}, /* i2c1_sda.i2c1_sda */ 498443b0df3SLokesh Vutla {I2C1_SCL, (M0 | PIN_INPUT)}, /* i2c1_scl.i2c1_scl */ 499443b0df3SLokesh Vutla {I2C2_SDA, (M1 | PIN_INPUT)}, /* i2c2_sda.hdmi1_ddc_scl */ 500443b0df3SLokesh Vutla {I2C2_SCL, (M1 | PIN_INPUT)}, /* i2c2_scl.hdmi1_ddc_sda */ 501443b0df3SLokesh Vutla {WAKEUP0, (M0 | PIN_INPUT)}, /* Wakeup0.Wakeup0 */ 502443b0df3SLokesh Vutla {WAKEUP1, (M0 | PIN_INPUT)}, /* Wakeup1.Wakeup1 */ 503443b0df3SLokesh Vutla {WAKEUP2, (M0 | PIN_INPUT)}, /* Wakeup2.Wakeup2 */ 504443b0df3SLokesh Vutla {WAKEUP3, (M0 | PIN_INPUT)}, /* Wakeup3.Wakeup3 */ 505443b0df3SLokesh Vutla {ON_OFF, (M0 | PIN_OUTPUT)}, /* on_off.on_off */ 506443b0df3SLokesh Vutla {RTC_PORZ, (M0 | PIN_INPUT)}, /* rtc_porz.rtc_porz */ 507443b0df3SLokesh Vutla {TMS, (M0 | PIN_INPUT_PULLUP)}, /* tms.tms */ 508443b0df3SLokesh Vutla {TDI, (M0 | PIN_INPUT_PULLUP | SLEWCONTROL)}, /* tdi.tdi */ 509443b0df3SLokesh Vutla {TDO, (M0 | PIN_OUTPUT_PULLUP)}, /* tdo.tdo */ 510443b0df3SLokesh Vutla {TCLK, (M0 | PIN_INPUT_PULLUP)}, /* tclk.tclk */ 511443b0df3SLokesh Vutla {TRSTN, (M0 | PIN_INPUT_PULLDOWN)}, /* trstn.trstn */ 512443b0df3SLokesh Vutla {RTCK, (M0 | PIN_OUTPUT_PULLUP)}, /* rtck.rtck */ 513443b0df3SLokesh Vutla {EMU0, (M0 | PIN_INPUT_PULLUP)}, /* emu0.emu0 */ 514443b0df3SLokesh Vutla {EMU1, (M0 | PIN_INPUT_PULLUP)}, /* emu1.emu1 */ 515443b0df3SLokesh Vutla {RESETN, (M0 | PIN_INPUT)}, /* resetn.resetn */ 516443b0df3SLokesh Vutla {NMIN_DSP, (M0 | PIN_INPUT)}, /* nmin_dsp.nmin_dsp */ 517443b0df3SLokesh Vutla {RSTOUTN, (M0 | PIN_OUTPUT)}, /* rstoutn.rstoutn */ 518443b0df3SLokesh Vutla }; 519443b0df3SLokesh Vutla 520c020d355SSteve Kipisz const struct pad_conf_entry core_padconf_array_essential_am572x_idk[] = { 521c887bef8SLokesh Vutla {GPMC_A0, (M6 | PIN_INPUT | MANUAL_MODE)}, /* gpmc_a0.vin4b_d0 */ 522c887bef8SLokesh Vutla {GPMC_A1, (M6 | PIN_INPUT | MANUAL_MODE)}, /* gpmc_a1.vin4b_d1 */ 523c887bef8SLokesh Vutla {GPMC_A2, (M6 | PIN_INPUT | MANUAL_MODE)}, /* gpmc_a2.vin4b_d2 */ 524c887bef8SLokesh Vutla {GPMC_A3, (M6 | PIN_INPUT | MANUAL_MODE)}, /* gpmc_a3.vin4b_d3 */ 525c887bef8SLokesh Vutla {GPMC_A4, (M6 | PIN_INPUT | MANUAL_MODE)}, /* gpmc_a4.vin4b_d4 */ 526c887bef8SLokesh Vutla {GPMC_A5, (M6 | PIN_INPUT | MANUAL_MODE)}, /* gpmc_a5.vin4b_d5 */ 527c887bef8SLokesh Vutla {GPMC_A6, (M6 | PIN_INPUT | MANUAL_MODE)}, /* gpmc_a6.vin4b_d6 */ 528c887bef8SLokesh Vutla {GPMC_A7, (M6 | PIN_INPUT | MANUAL_MODE)}, /* gpmc_a7.vin4b_d7 */ 529c887bef8SLokesh Vutla {GPMC_A8, (M6 | PIN_INPUT | MANUAL_MODE)}, /* gpmc_a8.vin4b_hsync1 */ 530c887bef8SLokesh Vutla {GPMC_A9, (M6 | PIN_INPUT | MANUAL_MODE)}, /* gpmc_a9.vin4b_vsync1 */ 531c887bef8SLokesh Vutla {GPMC_A10, (M6 | PIN_INPUT | MANUAL_MODE)}, /* gpmc_a10.vin4b_clk1 */ 532c887bef8SLokesh Vutla {GPMC_A11, (M6 | PIN_INPUT | MANUAL_MODE)}, /* gpmc_a11.vin4b_de1 */ 533c887bef8SLokesh Vutla {GPMC_A12, (M6 | PIN_INPUT | MANUAL_MODE)}, /* gpmc_a12.vin4b_fld1 */ 534c887bef8SLokesh Vutla {GPMC_A13, (M1 | PIN_INPUT | MANUAL_MODE)}, /* gpmc_a13.qspi1_rtclk */ 535c887bef8SLokesh Vutla {GPMC_A14, (M1 | PIN_INPUT | MANUAL_MODE)}, /* gpmc_a14.qspi1_d3 */ 536c887bef8SLokesh Vutla {GPMC_A15, (M1 | PIN_INPUT | MANUAL_MODE)}, /* gpmc_a15.qspi1_d2 */ 537c887bef8SLokesh Vutla {GPMC_A16, (M1 | PIN_INPUT | MANUAL_MODE)}, /* gpmc_a16.qspi1_d0 */ 538c887bef8SLokesh Vutla {GPMC_A17, (M1 | PIN_INPUT | MANUAL_MODE)}, /* gpmc_a17.qspi1_d1 */ 539c887bef8SLokesh Vutla {GPMC_A18, (M1 | PIN_OUTPUT | MANUAL_MODE)}, /* gpmc_a18.qspi1_sclk */ 540e79d2dc7SLokesh Vutla {GPMC_A19, (M1 | PIN_INPUT_PULLUP)}, /* gpmc_a19.mmc2_dat4 */ 541e79d2dc7SLokesh Vutla {GPMC_A20, (M1 | PIN_INPUT_PULLUP)}, /* gpmc_a20.mmc2_dat5 */ 542e79d2dc7SLokesh Vutla {GPMC_A21, (M1 | PIN_INPUT_PULLUP)}, /* gpmc_a21.mmc2_dat6 */ 543e79d2dc7SLokesh Vutla {GPMC_A22, (M1 | PIN_INPUT_PULLUP)}, /* gpmc_a22.mmc2_dat7 */ 544c020d355SSteve Kipisz {GPMC_A23, (M1 | PIN_INPUT_PULLUP)}, /* gpmc_a23.mmc2_clk */ 545e79d2dc7SLokesh Vutla {GPMC_A24, (M1 | PIN_INPUT_PULLUP)}, /* gpmc_a24.mmc2_dat0 */ 546e79d2dc7SLokesh Vutla {GPMC_A25, (M1 | PIN_INPUT_PULLUP)}, /* gpmc_a25.mmc2_dat1 */ 547e79d2dc7SLokesh Vutla {GPMC_A26, (M1 | PIN_INPUT_PULLUP)}, /* gpmc_a26.mmc2_dat2 */ 548e79d2dc7SLokesh Vutla {GPMC_A27, (M1 | PIN_INPUT_PULLUP)}, /* gpmc_a27.mmc2_dat3 */ 549e79d2dc7SLokesh Vutla {GPMC_CS1, (M1 | PIN_INPUT_PULLUP)}, /* gpmc_cs1.mmc2_cmd */ 550c887bef8SLokesh Vutla {GPMC_CS2, (M1 | PIN_OUTPUT | MANUAL_MODE)}, /* gpmc_cs2.qspi1_cs0 */ 551c887bef8SLokesh Vutla {VIN1A_D5, (M14 | PIN_OUTPUT)}, /* vin1a_d5.gpio3_9 */ 552c887bef8SLokesh Vutla {VIN1A_D6, (M14 | PIN_OUTPUT)}, /* vin1a_d6.gpio3_10 */ 553c887bef8SLokesh Vutla {VIN1A_D7, (M14 | PIN_OUTPUT)}, /* vin1a_d7.gpio3_11 */ 554c887bef8SLokesh Vutla {VIN1A_D8, (M14 | PIN_OUTPUT)}, /* vin1a_d8.gpio3_12 */ 555c020d355SSteve Kipisz {VIN1A_D10, (M14 | PIN_INPUT_PULLDOWN)}, /* vin1a_d10.gpio3_14 */ 556c887bef8SLokesh Vutla {VIN1A_D12, (M14 | PIN_INPUT)}, /* vin1a_d12.gpio3_16 */ 557c887bef8SLokesh Vutla {VIN1A_D13, (M14 | PIN_OUTPUT)}, /* vin1a_d13.gpio3_17 */ 558c887bef8SLokesh Vutla {VIN1A_D14, (M14 | PIN_OUTPUT)}, /* vin1a_d14.gpio3_18 */ 559c887bef8SLokesh Vutla {VIN1A_D15, (M14 | PIN_OUTPUT)}, /* vin1a_d15.gpio3_19 */ 560c887bef8SLokesh Vutla {VIN1A_D17, (M14 | PIN_OUTPUT)}, /* vin1a_d17.gpio3_21 */ 561c887bef8SLokesh Vutla {VIN1A_D18, (M14 | PIN_OUTPUT_PULLDOWN)}, /* vin1a_d18.gpio3_22 */ 562c887bef8SLokesh Vutla {VIN1A_D19, (M14 | PIN_OUTPUT_PULLUP)}, /* vin1a_d19.gpio3_23 */ 563c887bef8SLokesh Vutla {VIN1A_D22, (M14 | PIN_INPUT)}, /* vin1a_d22.gpio3_26 */ 564c020d355SSteve Kipisz {VIN2A_CLK0, (M14 | PIN_INPUT_PULLUP)}, /* vin2a_clk0.gpio3_28 */ 565c020d355SSteve Kipisz {VIN2A_DE0, (M14 | PIN_INPUT_PULLUP)}, /* vin2a_de0.gpio3_29 */ 566c020d355SSteve Kipisz {VIN2A_FLD0, (M14 | PIN_INPUT_PULLUP)}, /* vin2a_fld0.gpio3_30 */ 567c020d355SSteve Kipisz {VIN2A_HSYNC0, (M14 | PIN_INPUT_PULLUP)}, /* vin2a_hsync0.gpio3_31 */ 568c887bef8SLokesh Vutla {VIN2A_VSYNC0, (M14 | PIN_INPUT)}, /* vin2a_vsync0.gpio4_0 */ 569c887bef8SLokesh Vutla {VIN2A_D0, (M11 | PIN_INPUT)}, /* vin2a_d0.pr1_uart0_rxd */ 570c887bef8SLokesh Vutla {VIN2A_D1, (M11 | PIN_OUTPUT)}, /* vin2a_d1.pr1_uart0_txd */ 571c887bef8SLokesh Vutla {VIN2A_D2, (M10 | PIN_OUTPUT)}, /* vin2a_d2.eCAP1_in_PWM1_out */ 572c887bef8SLokesh Vutla {VIN2A_D3, (M11 | PIN_INPUT_PULLDOWN)}, /* vin2a_d3.pr1_edc_latch0_in */ 573c887bef8SLokesh Vutla {VIN2A_D4, (M11 | PIN_OUTPUT)}, /* vin2a_d4.pr1_edc_sync0_out */ 574c887bef8SLokesh Vutla {VIN2A_D5, (M13 | PIN_OUTPUT_PULLDOWN | MANUAL_MODE)}, /* vin2a_d5.pr1_pru1_gpo2 */ 575c887bef8SLokesh Vutla {VIN2A_D10, (M11 | PIN_OUTPUT_PULLDOWN)}, /* vin2a_d10.pr1_mdio_mdclk */ 576c887bef8SLokesh Vutla {VIN2A_D11, (M11 | PIN_INPUT)}, /* vin2a_d11.pr1_mdio_data */ 577c887bef8SLokesh Vutla {VIN2A_D12, (M3 | PIN_OUTPUT_PULLDOWN | MANUAL_MODE)}, /* vin2a_d12.rgmii1_txc */ 578c887bef8SLokesh Vutla {VIN2A_D13, (M3 | PIN_OUTPUT_PULLDOWN | MANUAL_MODE)}, /* vin2a_d13.rgmii1_txctl */ 579c887bef8SLokesh Vutla {VIN2A_D14, (M3 | PIN_OUTPUT_PULLDOWN | MANUAL_MODE)}, /* vin2a_d14.rgmii1_txd3 */ 580c887bef8SLokesh Vutla {VIN2A_D15, (M3 | PIN_OUTPUT_PULLDOWN | MANUAL_MODE)}, /* vin2a_d15.rgmii1_txd2 */ 581c887bef8SLokesh Vutla {VIN2A_D16, (M3 | PIN_OUTPUT_PULLDOWN | MANUAL_MODE)}, /* vin2a_d16.rgmii1_txd1 */ 582c887bef8SLokesh Vutla {VIN2A_D17, (M3 | PIN_OUTPUT_PULLDOWN | MANUAL_MODE)}, /* vin2a_d17.rgmii1_txd0 */ 583c020d355SSteve Kipisz {VIN2A_D18, (M3 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* vin2a_d18.rgmii1_rxc */ 584c887bef8SLokesh Vutla {VIN2A_D19, (M3 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* vin2a_d19.rgmii1_rxctl */ 585c020d355SSteve Kipisz {VIN2A_D20, (M3 | PIN_INPUT_PULLUP | MANUAL_MODE)}, /* vin2a_d20.rgmii1_rxd3 */ 586c020d355SSteve Kipisz {VIN2A_D21, (M3 | PIN_INPUT_PULLUP | MANUAL_MODE)}, /* vin2a_d21.rgmii1_rxd2 */ 587c020d355SSteve Kipisz {VIN2A_D22, (M3 | PIN_INPUT_PULLUP | MANUAL_MODE)}, /* vin2a_d22.rgmii1_rxd1 */ 588c020d355SSteve Kipisz {VIN2A_D23, (M3 | PIN_INPUT_PULLUP | MANUAL_MODE)}, /* vin2a_d23.rgmii1_rxd0 */ 589e79d2dc7SLokesh Vutla {VOUT1_CLK, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)}, /* vout1_clk.vout1_clk */ 590e79d2dc7SLokesh Vutla {VOUT1_DE, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)}, /* vout1_de.vout1_de */ 591c887bef8SLokesh Vutla {VOUT1_FLD, (M14 | PIN_OUTPUT)}, /* vout1_fld.gpio4_21 */ 592e79d2dc7SLokesh Vutla {VOUT1_HSYNC, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)}, /* vout1_hsync.vout1_hsync */ 593e79d2dc7SLokesh Vutla {VOUT1_VSYNC, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)}, /* vout1_vsync.vout1_vsync */ 594e79d2dc7SLokesh Vutla {VOUT1_D0, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)}, /* vout1_d0.vout1_d0 */ 595e79d2dc7SLokesh Vutla {VOUT1_D1, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)}, /* vout1_d1.vout1_d1 */ 596e79d2dc7SLokesh Vutla {VOUT1_D2, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)}, /* vout1_d2.vout1_d2 */ 597e79d2dc7SLokesh Vutla {VOUT1_D3, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)}, /* vout1_d3.vout1_d3 */ 598e79d2dc7SLokesh Vutla {VOUT1_D4, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)}, /* vout1_d4.vout1_d4 */ 599e79d2dc7SLokesh Vutla {VOUT1_D5, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)}, /* vout1_d5.vout1_d5 */ 600e79d2dc7SLokesh Vutla {VOUT1_D6, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)}, /* vout1_d6.vout1_d6 */ 601e79d2dc7SLokesh Vutla {VOUT1_D7, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)}, /* vout1_d7.vout1_d7 */ 602e79d2dc7SLokesh Vutla {VOUT1_D8, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)}, /* vout1_d8.vout1_d8 */ 603e79d2dc7SLokesh Vutla {VOUT1_D9, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)}, /* vout1_d9.vout1_d9 */ 604e79d2dc7SLokesh Vutla {VOUT1_D10, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)}, /* vout1_d10.vout1_d10 */ 605e79d2dc7SLokesh Vutla {VOUT1_D11, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)}, /* vout1_d11.vout1_d11 */ 606e79d2dc7SLokesh Vutla {VOUT1_D12, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)}, /* vout1_d12.vout1_d12 */ 607e79d2dc7SLokesh Vutla {VOUT1_D13, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)}, /* vout1_d13.vout1_d13 */ 608e79d2dc7SLokesh Vutla {VOUT1_D14, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)}, /* vout1_d14.vout1_d14 */ 609e79d2dc7SLokesh Vutla {VOUT1_D15, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)}, /* vout1_d15.vout1_d15 */ 610e79d2dc7SLokesh Vutla {VOUT1_D16, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)}, /* vout1_d16.vout1_d16 */ 611e79d2dc7SLokesh Vutla {VOUT1_D17, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)}, /* vout1_d17.vout1_d17 */ 612e79d2dc7SLokesh Vutla {VOUT1_D18, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)}, /* vout1_d18.vout1_d18 */ 613e79d2dc7SLokesh Vutla {VOUT1_D19, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)}, /* vout1_d19.vout1_d19 */ 614e79d2dc7SLokesh Vutla {VOUT1_D20, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)}, /* vout1_d20.vout1_d20 */ 615e79d2dc7SLokesh Vutla {VOUT1_D21, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)}, /* vout1_d21.vout1_d21 */ 616e79d2dc7SLokesh Vutla {VOUT1_D22, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)}, /* vout1_d22.vout1_d22 */ 617e79d2dc7SLokesh Vutla {VOUT1_D23, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)}, /* vout1_d23.vout1_d23 */ 618e79d2dc7SLokesh Vutla {MDIO_MCLK, (M0 | PIN_INPUT_SLEW)}, /* mdio_mclk.mdio_mclk */ 619e79d2dc7SLokesh Vutla {MDIO_D, (M0 | PIN_INPUT | SLEWCONTROL)}, /* mdio_d.mdio_d */ 620c887bef8SLokesh Vutla {RGMII0_TXC, (M0 | PIN_OUTPUT_PULLDOWN | MANUAL_MODE)}, /* rgmii0_txc.rgmii0_txc */ 621c887bef8SLokesh Vutla {RGMII0_TXCTL, (M0 | PIN_OUTPUT_PULLDOWN | MANUAL_MODE)}, /* rgmii0_txctl.rgmii0_txctl */ 622c887bef8SLokesh Vutla {RGMII0_TXD3, (M0 | PIN_OUTPUT_PULLDOWN | MANUAL_MODE)}, /* rgmii0_txd3.rgmii0_txd3 */ 623c887bef8SLokesh Vutla {RGMII0_TXD2, (M0 | PIN_OUTPUT_PULLDOWN | MANUAL_MODE)}, /* rgmii0_txd2.rgmii0_txd2 */ 624c887bef8SLokesh Vutla {RGMII0_TXD1, (M0 | PIN_OUTPUT_PULLDOWN | MANUAL_MODE)}, /* rgmii0_txd1.rgmii0_txd1 */ 625c887bef8SLokesh Vutla {RGMII0_TXD0, (M0 | PIN_OUTPUT_PULLDOWN | MANUAL_MODE)}, /* rgmii0_txd0.rgmii0_txd0 */ 626c020d355SSteve Kipisz {RGMII0_RXC, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* rgmii0_rxc.rgmii0_rxc */ 627c020d355SSteve Kipisz {RGMII0_RXCTL, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* rgmii0_rxctl.rgmii0_rxctl */ 628c020d355SSteve Kipisz {RGMII0_RXD3, (M0 | PIN_INPUT_PULLUP | MANUAL_MODE)}, /* rgmii0_rxd3.rgmii0_rxd3 */ 629c020d355SSteve Kipisz {RGMII0_RXD2, (M0 | PIN_INPUT_PULLUP | MANUAL_MODE)}, /* rgmii0_rxd2.rgmii0_rxd2 */ 630c020d355SSteve Kipisz {RGMII0_RXD1, (M0 | PIN_INPUT_PULLUP | MANUAL_MODE)}, /* rgmii0_rxd1.rgmii0_rxd1 */ 631c020d355SSteve Kipisz {RGMII0_RXD0, (M0 | PIN_INPUT_PULLUP | MANUAL_MODE)}, /* rgmii0_rxd0.rgmii0_rxd0 */ 632e79d2dc7SLokesh Vutla {USB1_DRVVBUS, (M0 | PIN_OUTPUT | SLEWCONTROL)}, /* usb1_drvvbus.usb1_drvvbus */ 633e79d2dc7SLokesh Vutla {USB2_DRVVBUS, (M0 | PIN_OUTPUT | SLEWCONTROL)}, /* usb2_drvvbus.usb2_drvvbus */ 634c887bef8SLokesh Vutla {GPIO6_14, (M0 | PIN_OUTPUT)}, /* gpio6_14.gpio6_14 */ 635c887bef8SLokesh Vutla {GPIO6_15, (M0 | PIN_OUTPUT)}, /* gpio6_15.gpio6_15 */ 636c887bef8SLokesh Vutla {GPIO6_16, (M0 | PIN_INPUT_PULLUP)}, /* gpio6_16.gpio6_16 */ 637c020d355SSteve Kipisz {XREF_CLK0, (M11 | PIN_INPUT_PULLDOWN)}, /* xref_clk0.pr2_mii1_col */ 638c020d355SSteve Kipisz {XREF_CLK1, (M11 | PIN_INPUT_PULLDOWN)}, /* xref_clk1.pr2_mii1_crs */ 639c887bef8SLokesh Vutla {XREF_CLK2, (M14 | PIN_OUTPUT)}, /* xref_clk2.gpio6_19 */ 640c887bef8SLokesh Vutla {XREF_CLK3, (M9 | PIN_OUTPUT_PULLDOWN)}, /* xref_clk3.clkout3 */ 641c887bef8SLokesh Vutla {MCASP1_ACLKX, (M11 | PIN_OUTPUT_PULLDOWN)}, /* mcasp1_aclkx.pr2_mdio_mdclk */ 642e79d2dc7SLokesh Vutla {MCASP1_FSX, (M11 | PIN_INPUT | SLEWCONTROL)}, /* mcasp1_fsx.pr2_mdio_data */ 643c887bef8SLokesh Vutla {MCASP1_ACLKR, (M14 | PIN_INPUT)}, /* mcasp1_aclkr.gpio5_0 */ 644c887bef8SLokesh Vutla {MCASP1_FSR, (M14 | PIN_INPUT)}, /* mcasp1_fsr.gpio5_1 */ 645e79d2dc7SLokesh Vutla {MCASP1_AXR0, (M11 | PIN_INPUT_PULLUP | SLEWCONTROL)}, /* mcasp1_axr0.pr2_mii0_rxer */ 646e79d2dc7SLokesh Vutla {MCASP1_AXR1, (M11 | PIN_INPUT_PULLUP | SLEWCONTROL)}, /* mcasp1_axr1.pr2_mii_mt0_clk */ 647c887bef8SLokesh Vutla {MCASP1_AXR2, (M14 | PIN_INPUT)}, /* mcasp1_axr2.gpio5_4 */ 648c887bef8SLokesh Vutla {MCASP1_AXR3, (M14 | PIN_INPUT)}, /* mcasp1_axr3.gpio5_5 */ 649c887bef8SLokesh Vutla {MCASP1_AXR4, (M14 | PIN_OUTPUT)}, /* mcasp1_axr4.gpio5_6 */ 650c887bef8SLokesh Vutla {MCASP1_AXR5, (M14 | PIN_OUTPUT)}, /* mcasp1_axr5.gpio5_7 */ 651c887bef8SLokesh Vutla {MCASP1_AXR6, (M14 | PIN_OUTPUT)}, /* mcasp1_axr6.gpio5_8 */ 652c887bef8SLokesh Vutla {MCASP1_AXR7, (M14 | PIN_OUTPUT)}, /* mcasp1_axr7.gpio5_9 */ 653e79d2dc7SLokesh Vutla {MCASP1_AXR8, (M11 | PIN_OUTPUT_PULLUP | SLEWCONTROL)}, /* mcasp1_axr8.pr2_mii0_txen */ 654e79d2dc7SLokesh Vutla {MCASP1_AXR9, (M11 | PIN_OUTPUT_PULLUP | SLEWCONTROL)}, /* mcasp1_axr9.pr2_mii0_txd3 */ 655e79d2dc7SLokesh Vutla {MCASP1_AXR10, (M11 | PIN_OUTPUT_PULLUP | SLEWCONTROL)}, /* mcasp1_axr10.pr2_mii0_txd2 */ 656e79d2dc7SLokesh Vutla {MCASP1_AXR11, (M11 | PIN_OUTPUT_PULLUP | SLEWCONTROL)}, /* mcasp1_axr11.pr2_mii0_txd1 */ 657e79d2dc7SLokesh Vutla {MCASP1_AXR12, (M11 | PIN_OUTPUT_PULLUP | SLEWCONTROL)}, /* mcasp1_axr12.pr2_mii0_txd0 */ 658e79d2dc7SLokesh Vutla {MCASP1_AXR13, (M11 | PIN_INPUT_PULLUP | SLEWCONTROL)}, /* mcasp1_axr13.pr2_mii_mr0_clk */ 659e79d2dc7SLokesh Vutla {MCASP1_AXR14, (M11 | PIN_INPUT_SLEW)}, /* mcasp1_axr14.pr2_mii0_rxdv */ 660e79d2dc7SLokesh Vutla {MCASP1_AXR15, (M11 | PIN_INPUT_SLEW)}, /* mcasp1_axr15.pr2_mii0_rxd3 */ 661c887bef8SLokesh Vutla {MCASP2_ACLKX, (M11 | PIN_INPUT_PULLDOWN)}, /* mcasp2_aclkx.pr2_mii0_rxd2 */ 662e79d2dc7SLokesh Vutla {MCASP2_FSX, (M11 | PIN_INPUT_SLEW)}, /* mcasp2_fsx.pr2_mii0_rxd1 */ 663e79d2dc7SLokesh Vutla {MCASP2_AXR2, (M11 | PIN_INPUT_SLEW)}, /* mcasp2_axr2.pr2_mii0_rxd0 */ 664e79d2dc7SLokesh Vutla {MCASP2_AXR3, (M11 | PIN_INPUT_SLEW)}, /* mcasp2_axr3.pr2_mii0_rxlink */ 665c887bef8SLokesh Vutla {MCASP2_AXR4, (M14 | PIN_OUTPUT)}, /* mcasp2_axr4.gpio1_4 */ 666c887bef8SLokesh Vutla {MCASP2_AXR5, (M14 | PIN_OUTPUT)}, /* mcasp2_axr5.gpio6_7 */ 667c887bef8SLokesh Vutla {MCASP2_AXR6, (M14 | PIN_OUTPUT)}, /* mcasp2_axr6.gpio2_29 */ 668c887bef8SLokesh Vutla {MCASP2_AXR7, (M14 | PIN_OUTPUT)}, /* mcasp2_axr7.gpio1_5 */ 669c020d355SSteve Kipisz {MCASP3_ACLKX, (M11 | PIN_INPUT_PULLDOWN)}, /* mcasp3_aclkx.pr2_mii0_crs */ 670e79d2dc7SLokesh Vutla {MCASP3_FSX, (M11 | PIN_INPUT_SLEW)}, /* mcasp3_fsx.pr2_mii0_col */ 671e79d2dc7SLokesh Vutla {MCASP3_AXR0, (M11 | PIN_INPUT_PULLUP | SLEWCONTROL)}, /* mcasp3_axr0.pr2_mii1_rxer */ 672e79d2dc7SLokesh Vutla {MCASP3_AXR1, (M11 | PIN_INPUT_PULLUP | SLEWCONTROL)}, /* mcasp3_axr1.pr2_mii1_rxlink */ 673c887bef8SLokesh Vutla {MCASP4_ACLKX, (M2 | PIN_INPUT)}, /* mcasp4_aclkx.spi3_sclk */ 674c887bef8SLokesh Vutla {MCASP4_FSX, (M2 | PIN_INPUT)}, /* mcasp4_fsx.spi3_d1 */ 675e79d2dc7SLokesh Vutla {MCASP4_AXR1, (M2 | PIN_INPUT_PULLUP)}, /* mcasp4_axr1.spi3_cs0 */ 676c887bef8SLokesh Vutla {MCASP5_ACLKX, (M13 | PIN_OUTPUT | MANUAL_MODE)}, /* mcasp5_aclkx.pr2_pru1_gpo1 */ 677c887bef8SLokesh Vutla {MCASP5_FSX, (M12 | PIN_INPUT | MANUAL_MODE)}, /* mcasp5_fsx.pr2_pru1_gpi2 */ 678c887bef8SLokesh Vutla {MMC1_CLK, (M0 | PIN_INPUT_PULLUP)}, /* mmc1_clk.mmc1_clk */ 679e79d2dc7SLokesh Vutla {MMC1_CMD, (M0 | PIN_INPUT_PULLUP)}, /* mmc1_cmd.mmc1_cmd */ 680e79d2dc7SLokesh Vutla {MMC1_DAT0, (M0 | PIN_INPUT_PULLUP)}, /* mmc1_dat0.mmc1_dat0 */ 681e79d2dc7SLokesh Vutla {MMC1_DAT1, (M0 | PIN_INPUT_PULLUP)}, /* mmc1_dat1.mmc1_dat1 */ 682e79d2dc7SLokesh Vutla {MMC1_DAT2, (M0 | PIN_INPUT_PULLUP)}, /* mmc1_dat2.mmc1_dat2 */ 683e79d2dc7SLokesh Vutla {MMC1_DAT3, (M0 | PIN_INPUT_PULLUP)}, /* mmc1_dat3.mmc1_dat3 */ 684e79d2dc7SLokesh Vutla {MMC1_SDCD, (M14 | PIN_INPUT | SLEWCONTROL)}, /* mmc1_sdcd.gpio6_27 */ 685e79d2dc7SLokesh Vutla {MMC1_SDWP, (M14 | PIN_INPUT | SLEWCONTROL)}, /* mmc1_sdwp.gpio6_28 */ 686c020d355SSteve Kipisz {GPIO6_10, (M11 | PIN_INPUT_PULLUP)}, /* gpio6_10.pr2_mii_mt1_clk */ 687c887bef8SLokesh Vutla {GPIO6_11, (M11 | PIN_OUTPUT_PULLUP)}, /* gpio6_11.pr2_mii1_txen */ 688c887bef8SLokesh Vutla {MMC3_CLK, (M11 | PIN_OUTPUT_PULLUP)}, /* mmc3_clk.pr2_mii1_txd3 */ 689c887bef8SLokesh Vutla {MMC3_CMD, (M11 | PIN_OUTPUT_PULLUP)}, /* mmc3_cmd.pr2_mii1_txd2 */ 690c887bef8SLokesh Vutla {MMC3_DAT0, (M11 | PIN_OUTPUT_PULLUP)}, /* mmc3_dat0.pr2_mii1_txd1 */ 691c887bef8SLokesh Vutla {MMC3_DAT1, (M11 | PIN_OUTPUT_PULLUP)}, /* mmc3_dat1.pr2_mii1_txd0 */ 692c020d355SSteve Kipisz {MMC3_DAT2, (M11 | PIN_INPUT_PULLUP)}, /* mmc3_dat2.pr2_mii_mr1_clk */ 693c020d355SSteve Kipisz {MMC3_DAT3, (M11 | PIN_INPUT_PULLDOWN)}, /* mmc3_dat3.pr2_mii1_rxdv */ 694c020d355SSteve Kipisz {MMC3_DAT4, (M11 | PIN_INPUT_PULLDOWN)}, /* mmc3_dat4.pr2_mii1_rxd3 */ 695c020d355SSteve Kipisz {MMC3_DAT5, (M11 | PIN_INPUT_PULLDOWN)}, /* mmc3_dat5.pr2_mii1_rxd2 */ 696c020d355SSteve Kipisz {MMC3_DAT6, (M11 | PIN_INPUT_PULLDOWN)}, /* mmc3_dat6.pr2_mii1_rxd1 */ 697c020d355SSteve Kipisz {MMC3_DAT7, (M11 | PIN_INPUT_PULLDOWN)}, /* mmc3_dat7.pr2_mii1_rxd0 */ 698c887bef8SLokesh Vutla {SPI1_SCLK, (M14 | PIN_OUTPUT)}, /* spi1_sclk.gpio7_7 */ 699c887bef8SLokesh Vutla {SPI1_D1, (M14 | PIN_OUTPUT)}, /* spi1_d1.gpio7_8 */ 700c887bef8SLokesh Vutla {SPI1_D0, (M14 | PIN_OUTPUT)}, /* spi1_d0.gpio7_9 */ 701c020d355SSteve Kipisz {SPI1_CS0, (M14 | PIN_OUTPUT)}, /* spi1_cs0.gpio7_10 */ 702c887bef8SLokesh Vutla {SPI1_CS1, (M14 | PIN_OUTPUT)}, /* spi1_cs1.gpio7_11 */ 703e79d2dc7SLokesh Vutla {SPI1_CS2, (M14 | PIN_INPUT_SLEW)}, /* spi1_cs2.gpio7_12 */ 704*32651e4fSTomi Valkeinen {SPI1_CS3, (M6 | PIN_INPUT | SLEWCONTROL)}, /* spi1_cs3.hdmi1_cec */ 705e79d2dc7SLokesh Vutla {SPI2_SCLK, (M0 | PIN_INPUT)}, /* spi2_sclk.spi2_sclk */ 706e79d2dc7SLokesh Vutla {SPI2_D1, (M0 | PIN_INPUT | SLEWCONTROL)}, /* spi2_d1.spi2_d1 */ 707e79d2dc7SLokesh Vutla {SPI2_D0, (M0 | PIN_INPUT | SLEWCONTROL)}, /* spi2_d0.spi2_d0 */ 708e79d2dc7SLokesh Vutla {SPI2_CS0, (M0 | PIN_INPUT | SLEWCONTROL)}, /* spi2_cs0.spi2_cs0 */ 709c887bef8SLokesh Vutla {DCAN1_TX, (M15 | PULL_UP)}, /* dcan1_tx.safe for dcan1_tx */ 710c887bef8SLokesh Vutla {DCAN1_RX, (M15 | PULL_UP)}, /* dcan1_rx.safe for dcan1_rx */ 711e79d2dc7SLokesh Vutla {UART1_RXD, (M14 | PIN_OUTPUT | SLEWCONTROL)}, /* uart1_rxd.gpio7_22 */ 712e79d2dc7SLokesh Vutla {UART1_TXD, (M14 | PIN_OUTPUT | SLEWCONTROL)}, /* uart1_txd.gpio7_23 */ 713c887bef8SLokesh Vutla {UART2_RXD, (M4 | PIN_INPUT)}, /* uart2_rxd.uart2_rxd */ 714c887bef8SLokesh Vutla {UART2_TXD, (M0 | PIN_OUTPUT)}, /* uart2_txd.uart2_txd */ 715c887bef8SLokesh Vutla {UART2_CTSN, (M2 | PIN_INPUT)}, /* uart2_ctsn.uart3_rxd */ 716c887bef8SLokesh Vutla {UART2_RTSN, (M1 | PIN_OUTPUT)}, /* uart2_rtsn.uart3_txd */ 717c887bef8SLokesh Vutla {I2C1_SDA, (M0 | PIN_INPUT)}, /* i2c1_sda.i2c1_sda */ 718c887bef8SLokesh Vutla {I2C1_SCL, (M0 | PIN_INPUT)}, /* i2c1_scl.i2c1_scl */ 719c020d355SSteve Kipisz {I2C2_SDA, (M1 | PIN_INPUT)}, /* i2c2_sda.hdmi1_ddc_scl */ 720c020d355SSteve Kipisz {I2C2_SCL, (M1 | PIN_INPUT)}, /* i2c2_scl.hdmi1_ddc_sda */ 721c887bef8SLokesh Vutla {WAKEUP0, (M0 | PIN_INPUT)}, /* Wakeup0.Wakeup0 */ 722c887bef8SLokesh Vutla {WAKEUP1, (M0 | PIN_INPUT)}, /* Wakeup1.Wakeup1 */ 723c887bef8SLokesh Vutla {WAKEUP2, (M0 | PIN_INPUT)}, /* Wakeup2.Wakeup2 */ 724c887bef8SLokesh Vutla {WAKEUP3, (M0 | PIN_INPUT)}, /* Wakeup3.Wakeup3 */ 725c887bef8SLokesh Vutla {ON_OFF, (M0 | PIN_OUTPUT)}, /* on_off.on_off */ 726c887bef8SLokesh Vutla {RTC_PORZ, (M0 | PIN_INPUT)}, /* rtc_porz.rtc_porz */ 727c020d355SSteve Kipisz {TMS, (M0 | PIN_INPUT_PULLUP)}, /* tms.tms */ 728e79d2dc7SLokesh Vutla {TDI, (M0 | PIN_INPUT_PULLUP | SLEWCONTROL)}, /* tdi.tdi */ 729c887bef8SLokesh Vutla {TDO, (M0 | PIN_OUTPUT_PULLUP)}, /* tdo.tdo */ 730c020d355SSteve Kipisz {TCLK, (M0 | PIN_INPUT_PULLUP)}, /* tclk.tclk */ 731c020d355SSteve Kipisz {TRSTN, (M0 | PIN_INPUT_PULLDOWN)}, /* trstn.trstn */ 732c887bef8SLokesh Vutla {RTCK, (M0 | PIN_OUTPUT_PULLUP)}, /* rtck.rtck */ 733c020d355SSteve Kipisz {EMU0, (M0 | PIN_INPUT_PULLUP)}, /* emu0.emu0 */ 734c020d355SSteve Kipisz {EMU1, (M0 | PIN_INPUT_PULLUP)}, /* emu1.emu1 */ 735c887bef8SLokesh Vutla {RESETN, (M0 | PIN_INPUT)}, /* resetn.resetn */ 736e79d2dc7SLokesh Vutla {NMIN_DSP, (M0 | PIN_INPUT)}, /* nmin_dsp.nmin_dsp */ 737c887bef8SLokesh Vutla {RSTOUTN, (M0 | PIN_OUTPUT)}, /* rstoutn.rstoutn */ 738c020d355SSteve Kipisz }; 739c020d355SSteve Kipisz 7404d8397c6SSteve Kipisz const struct pad_conf_entry core_padconf_array_essential_am571x_idk[] = { 7412d7e9e9dSLokesh Vutla {GPMC_A0, (M6 | PIN_INPUT | MANUAL_MODE)}, /* gpmc_a0.vin1b_d0 */ 7422d7e9e9dSLokesh Vutla {GPMC_A1, (M6 | PIN_INPUT | MANUAL_MODE)}, /* gpmc_a1.vin1b_d1 */ 7432d7e9e9dSLokesh Vutla {GPMC_A2, (M6 | PIN_INPUT | MANUAL_MODE)}, /* gpmc_a2.vin1b_d2 */ 7442d7e9e9dSLokesh Vutla {GPMC_A3, (M6 | PIN_INPUT | MANUAL_MODE)}, /* gpmc_a3.vin1b_d3 */ 7452d7e9e9dSLokesh Vutla {GPMC_A4, (M6 | PIN_INPUT | MANUAL_MODE)}, /* gpmc_a4.vin1b_d4 */ 7462d7e9e9dSLokesh Vutla {GPMC_A5, (M6 | PIN_INPUT | MANUAL_MODE)}, /* gpmc_a5.vin1b_d5 */ 7472d7e9e9dSLokesh Vutla {GPMC_A6, (M6 | PIN_INPUT | MANUAL_MODE)}, /* gpmc_a6.vin1b_d6 */ 7482d7e9e9dSLokesh Vutla {GPMC_A7, (M6 | PIN_INPUT | MANUAL_MODE)}, /* gpmc_a7.vin1b_d7 */ 7492d7e9e9dSLokesh Vutla {GPMC_A8, (M6 | PIN_INPUT | MANUAL_MODE)}, /* gpmc_a8.vin1b_hsync1 */ 7502d7e9e9dSLokesh Vutla {GPMC_A9, (M6 | PIN_INPUT | MANUAL_MODE)}, /* gpmc_a9.vin1b_vsync1 */ 7512d7e9e9dSLokesh Vutla {GPMC_A10, (M6 | PIN_INPUT | MANUAL_MODE)}, /* gpmc_a10.vin1b_clk1 */ 7522d7e9e9dSLokesh Vutla {GPMC_A11, (M6 | PIN_INPUT | MANUAL_MODE)}, /* gpmc_a11.vin1b_de1 */ 7532d7e9e9dSLokesh Vutla {GPMC_A12, (M6 | PIN_INPUT | MANUAL_MODE)}, /* gpmc_a12.vin1b_fld1 */ 7542d7e9e9dSLokesh Vutla {GPMC_A13, (M1 | PIN_INPUT | MANUAL_MODE)}, /* gpmc_a13.qspi1_rtclk */ 7552d7e9e9dSLokesh Vutla {GPMC_A14, (M1 | PIN_INPUT | MANUAL_MODE)}, /* gpmc_a14.qspi1_d3 */ 7562d7e9e9dSLokesh Vutla {GPMC_A15, (M1 | PIN_INPUT | MANUAL_MODE)}, /* gpmc_a15.qspi1_d2 */ 7572d7e9e9dSLokesh Vutla {GPMC_A16, (M1 | PIN_INPUT | MANUAL_MODE)}, /* gpmc_a16.qspi1_d0 */ 7582d7e9e9dSLokesh Vutla {GPMC_A17, (M1 | PIN_INPUT | MANUAL_MODE)}, /* gpmc_a17.qspi1_d1 */ 7592d7e9e9dSLokesh Vutla {GPMC_A18, (M1 | PIN_OUTPUT | MANUAL_MODE)}, /* gpmc_a18.qspi1_sclk */ 7604d8397c6SSteve Kipisz {GPMC_A19, (M1 | PIN_INPUT_PULLUP)}, /* gpmc_a19.mmc2_dat4 */ 7614d8397c6SSteve Kipisz {GPMC_A20, (M1 | PIN_INPUT_PULLUP)}, /* gpmc_a20.mmc2_dat5 */ 7624d8397c6SSteve Kipisz {GPMC_A21, (M1 | PIN_INPUT_PULLUP)}, /* gpmc_a21.mmc2_dat6 */ 7634d8397c6SSteve Kipisz {GPMC_A22, (M1 | PIN_INPUT_PULLUP)}, /* gpmc_a22.mmc2_dat7 */ 7644d8397c6SSteve Kipisz {GPMC_A23, (M1 | PIN_INPUT_PULLUP)}, /* gpmc_a23.mmc2_clk */ 7654d8397c6SSteve Kipisz {GPMC_A24, (M1 | PIN_INPUT_PULLUP)}, /* gpmc_a24.mmc2_dat0 */ 7664d8397c6SSteve Kipisz {GPMC_A25, (M1 | PIN_INPUT_PULLUP)}, /* gpmc_a25.mmc2_dat1 */ 7674d8397c6SSteve Kipisz {GPMC_A26, (M1 | PIN_INPUT_PULLUP)}, /* gpmc_a26.mmc2_dat2 */ 7684d8397c6SSteve Kipisz {GPMC_A27, (M1 | PIN_INPUT_PULLUP)}, /* gpmc_a27.mmc2_dat3 */ 7694d8397c6SSteve Kipisz {GPMC_CS1, (M1 | PIN_INPUT_PULLUP)}, /* gpmc_cs1.mmc2_cmd */ 7702d7e9e9dSLokesh Vutla {GPMC_CS0, (M14 | PIN_OUTPUT)}, /* gpmc_cs0.gpio2_19 */ 7712d7e9e9dSLokesh Vutla {GPMC_CS2, (M1 | PIN_OUTPUT | MANUAL_MODE)}, /* gpmc_cs2.qspi1_cs0 */ 7722d7e9e9dSLokesh Vutla {GPMC_CS3, (M14 | PIN_OUTPUT)}, /* gpmc_cs3.gpio2_21 */ 7732d7e9e9dSLokesh Vutla {GPMC_CLK, (M14 | PIN_INPUT)}, /* gpmc_clk.gpio2_22 */ 7742d7e9e9dSLokesh Vutla {GPMC_ADVN_ALE, (M14 | PIN_OUTPUT)}, /* gpmc_advn_ale.gpio2_23 */ 7752d7e9e9dSLokesh Vutla {GPMC_OEN_REN, (M14 | PIN_OUTPUT)}, /* gpmc_oen_ren.gpio2_24 */ 7762d7e9e9dSLokesh Vutla {GPMC_WEN, (M14 | PIN_OUTPUT)}, /* gpmc_wen.gpio2_25 */ 7772d7e9e9dSLokesh Vutla {GPMC_BEN0, (M14 | PIN_OUTPUT)}, /* gpmc_ben0.gpio2_26 */ 7782d7e9e9dSLokesh Vutla {GPMC_BEN1, (M14 | PIN_OUTPUT)}, /* gpmc_ben1.gpio2_27 */ 7792d7e9e9dSLokesh Vutla {GPMC_WAIT0, (M14 | PIN_OUTPUT | SLEWCONTROL)}, /* gpmc_wait0.gpio2_28 */ 7804d8397c6SSteve Kipisz {VIN2A_CLK0, (M14 | PIN_INPUT_PULLUP)}, /* vin2a_clk0.gpio3_28 */ 7814d8397c6SSteve Kipisz {VIN2A_DE0, (M14 | PIN_INPUT_PULLUP)}, /* vin2a_de0.gpio3_29 */ 7824d8397c6SSteve Kipisz {VIN2A_FLD0, (M14 | PIN_INPUT_PULLUP)}, /* vin2a_fld0.gpio3_30 */ 7834d8397c6SSteve Kipisz {VIN2A_HSYNC0, (M14 | PIN_INPUT_PULLUP)}, /* vin2a_hsync0.gpio3_31 */ 7842d7e9e9dSLokesh Vutla {VIN2A_VSYNC0, (M14 | PIN_OUTPUT)}, /* vin2a_vsync0.gpio4_0 */ 7852d7e9e9dSLokesh Vutla {VIN2A_D0, (M11 | PIN_INPUT)}, /* vin2a_d0.pr1_uart0_rxd */ 7862d7e9e9dSLokesh Vutla {VIN2A_D1, (M11 | PIN_OUTPUT)}, /* vin2a_d1.pr1_uart0_txd */ 7872d7e9e9dSLokesh Vutla {VIN2A_D2, (M10 | PIN_OUTPUT)}, /* vin2a_d2.eCAP1_in_PWM1_out */ 7882d7e9e9dSLokesh Vutla {VIN2A_D10, (M11 | PIN_OUTPUT_PULLDOWN)}, /* vin2a_d10.pr1_mdio_mdclk */ 7892d7e9e9dSLokesh Vutla {VIN2A_D11, (M11 | PIN_INPUT)}, /* vin2a_d11.pr1_mdio_data */ 7902d7e9e9dSLokesh Vutla {VIN2A_D12, (M3 | PIN_OUTPUT_PULLDOWN | MANUAL_MODE)}, /* vin2a_d12.rgmii1_txc */ 7912d7e9e9dSLokesh Vutla {VIN2A_D13, (M3 | PIN_OUTPUT_PULLDOWN | MANUAL_MODE)}, /* vin2a_d13.rgmii1_txctl */ 7922d7e9e9dSLokesh Vutla {VIN2A_D14, (M3 | PIN_OUTPUT_PULLDOWN | MANUAL_MODE)}, /* vin2a_d14.rgmii1_txd3 */ 7932d7e9e9dSLokesh Vutla {VIN2A_D15, (M3 | PIN_OUTPUT_PULLDOWN | MANUAL_MODE)}, /* vin2a_d15.rgmii1_txd2 */ 7942d7e9e9dSLokesh Vutla {VIN2A_D16, (M3 | PIN_OUTPUT_PULLDOWN | MANUAL_MODE)}, /* vin2a_d16.rgmii1_txd1 */ 7952d7e9e9dSLokesh Vutla {VIN2A_D17, (M3 | PIN_OUTPUT_PULLDOWN | MANUAL_MODE)}, /* vin2a_d17.rgmii1_txd0 */ 7964d8397c6SSteve Kipisz {VIN2A_D18, (M3 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* vin2a_d18.rgmii1_rxc */ 7972d7e9e9dSLokesh Vutla {VIN2A_D19, (M3 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* vin2a_d19.rgmii1_rxctl */ 7984d8397c6SSteve Kipisz {VIN2A_D20, (M3 | PIN_INPUT_PULLUP | MANUAL_MODE)}, /* vin2a_d20.rgmii1_rxd3 */ 7994d8397c6SSteve Kipisz {VIN2A_D21, (M3 | PIN_INPUT_PULLUP | MANUAL_MODE)}, /* vin2a_d21.rgmii1_rxd2 */ 8004d8397c6SSteve Kipisz {VIN2A_D22, (M3 | PIN_INPUT_PULLUP | MANUAL_MODE)}, /* vin2a_d22.rgmii1_rxd1 */ 8014d8397c6SSteve Kipisz {VIN2A_D23, (M3 | PIN_INPUT_PULLUP | MANUAL_MODE)}, /* vin2a_d23.rgmii1_rxd0 */ 8022d7e9e9dSLokesh Vutla {VOUT1_FLD, (M14 | PIN_OUTPUT)}, /* vout1_fld.gpio4_21 */ 8032d7e9e9dSLokesh Vutla {MDIO_MCLK, (M0 | PIN_OUTPUT_PULLDOWN | SLEWCONTROL)}, /* mdio_mclk.mdio_mclk */ 8042d7e9e9dSLokesh Vutla {MDIO_D, (M0 | PIN_INPUT | SLEWCONTROL)}, /* mdio_d.mdio_d */ 8052d7e9e9dSLokesh Vutla {UART3_RXD, (M14 | PIN_OUTPUT_PULLUP | SLEWCONTROL)}, /* uart3_rxd.gpio5_18 */ 8062d7e9e9dSLokesh Vutla {UART3_TXD, (M14 | PIN_OUTPUT_PULLDOWN | SLEWCONTROL)}, /* uart3_txd.gpio5_19 */ 8072d7e9e9dSLokesh Vutla {RGMII0_TXC, (M0 | PIN_OUTPUT_PULLDOWN | MANUAL_MODE)}, /* rgmii0_txc.rgmii0_txc */ 8082d7e9e9dSLokesh Vutla {RGMII0_TXCTL, (M0 | PIN_OUTPUT_PULLDOWN | MANUAL_MODE)}, /* rgmii0_txctl.rgmii0_txctl */ 8092d7e9e9dSLokesh Vutla {RGMII0_TXD3, (M0 | PIN_OUTPUT_PULLDOWN | MANUAL_MODE)}, /* rgmii0_txd3.rgmii0_txd3 */ 8102d7e9e9dSLokesh Vutla {RGMII0_TXD2, (M0 | PIN_OUTPUT_PULLDOWN | MANUAL_MODE)}, /* rgmii0_txd2.rgmii0_txd2 */ 8112d7e9e9dSLokesh Vutla {RGMII0_TXD1, (M0 | PIN_OUTPUT_PULLDOWN | MANUAL_MODE)}, /* rgmii0_txd1.rgmii0_txd1 */ 8122d7e9e9dSLokesh Vutla {RGMII0_TXD0, (M0 | PIN_OUTPUT_PULLDOWN | MANUAL_MODE)}, /* rgmii0_txd0.rgmii0_txd0 */ 8134d8397c6SSteve Kipisz {RGMII0_RXC, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* rgmii0_rxc.rgmii0_rxc */ 8144d8397c6SSteve Kipisz {RGMII0_RXCTL, (M0 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* rgmii0_rxctl.rgmii0_rxctl */ 8152d7e9e9dSLokesh Vutla {RGMII0_RXD3, (M0 | PIN_INPUT_PULLUP | MANUAL_MODE)}, /* rgmii0_rxd3.rgmii0_rxd3 */ 8162d7e9e9dSLokesh Vutla {RGMII0_RXD2, (M0 | PIN_INPUT_PULLUP | MANUAL_MODE)}, /* rgmii0_rxd2.rgmii0_rxd2 */ 8172d7e9e9dSLokesh Vutla {RGMII0_RXD1, (M0 | PIN_INPUT_PULLUP | MANUAL_MODE)}, /* rgmii0_rxd1.rgmii0_rxd1 */ 8182d7e9e9dSLokesh Vutla {RGMII0_RXD0, (M0 | PIN_INPUT_PULLUP | MANUAL_MODE)}, /* rgmii0_rxd0.rgmii0_rxd0 */ 8192d7e9e9dSLokesh Vutla {USB1_DRVVBUS, (M0 | PIN_OUTPUT | SLEWCONTROL)}, /* usb1_drvvbus.usb1_drvvbus */ 8202d7e9e9dSLokesh Vutla {USB2_DRVVBUS, (M0 | PIN_OUTPUT | SLEWCONTROL)}, /* usb2_drvvbus.usb2_drvvbus */ 8212d7e9e9dSLokesh Vutla {GPIO6_14, (M0 | PIN_OUTPUT)}, /* gpio6_14.gpio6_14 */ 8222d7e9e9dSLokesh Vutla {GPIO6_15, (M0 | PIN_OUTPUT)}, /* gpio6_15.gpio6_15 */ 8232d7e9e9dSLokesh Vutla {GPIO6_16, (M0 | PIN_INPUT_PULLUP)}, /* gpio6_16.gpio6_16 */ 8242d7e9e9dSLokesh Vutla {XREF_CLK0, (M11 | PIN_INPUT_PULLDOWN)}, /* xref_clk0.pr2_mii1_col */ 8252d7e9e9dSLokesh Vutla {XREF_CLK1, (M11 | PIN_INPUT_PULLDOWN)}, /* xref_clk1.pr2_mii1_crs */ 8262d7e9e9dSLokesh Vutla {XREF_CLK2, (M14 | PIN_OUTPUT)}, /* xref_clk2.gpio6_19 */ 8272d7e9e9dSLokesh Vutla {XREF_CLK3, (M7 | PIN_INPUT)}, /* xref_clk3.hdq0 */ 8282d7e9e9dSLokesh Vutla {MCASP1_ACLKX, (M11 | PIN_OUTPUT_PULLDOWN)}, /* mcasp1_aclkx.pr2_mdio_mdclk */ 8292d7e9e9dSLokesh Vutla {MCASP1_FSX, (M11 | PIN_INPUT | SLEWCONTROL)}, /* mcasp1_fsx.pr2_mdio_data */ 8302d7e9e9dSLokesh Vutla {MCASP1_ACLKR, (M14 | PIN_INPUT)}, /* mcasp1_aclkr.gpio5_0 */ 8312d7e9e9dSLokesh Vutla {MCASP1_FSR, (M14 | PIN_INPUT)}, /* mcasp1_fsr.gpio5_1 */ 8322d7e9e9dSLokesh Vutla {MCASP1_AXR0, (M11 | PIN_INPUT_PULLUP | SLEWCONTROL)}, /* mcasp1_axr0.pr2_mii0_rxer */ 8332d7e9e9dSLokesh Vutla {MCASP1_AXR1, (M11 | PIN_INPUT_PULLUP | SLEWCONTROL)}, /* mcasp1_axr1.pr2_mii_mt0_clk */ 8342d7e9e9dSLokesh Vutla {MCASP1_AXR2, (M14 | PIN_INPUT)}, /* mcasp1_axr2.gpio5_4 */ 8352d7e9e9dSLokesh Vutla {MCASP1_AXR3, (M14 | PIN_INPUT)}, /* mcasp1_axr3.gpio5_5 */ 8364d8397c6SSteve Kipisz {MCASP1_AXR4, (M14 | PIN_INPUT_PULLDOWN)}, /* mcasp1_axr4.gpio5_6 */ 8372d7e9e9dSLokesh Vutla {MCASP1_AXR5, (M14 | PIN_INPUT)}, /* mcasp1_axr5.gpio5_7 */ 8382d7e9e9dSLokesh Vutla {MCASP1_AXR6, (M14 | PIN_OUTPUT)}, /* mcasp1_axr6.gpio5_8 */ 8392d7e9e9dSLokesh Vutla {MCASP1_AXR7, (M14 | PIN_OUTPUT)}, /* mcasp1_axr7.gpio5_9 */ 8402d7e9e9dSLokesh Vutla {MCASP1_AXR8, (M11 | PIN_OUTPUT_PULLUP | SLEWCONTROL)}, /* mcasp1_axr8.pr2_mii0_txen */ 8412d7e9e9dSLokesh Vutla {MCASP1_AXR9, (M11 | PIN_OUTPUT_PULLUP | SLEWCONTROL)}, /* mcasp1_axr9.pr2_mii0_txd3 */ 8422d7e9e9dSLokesh Vutla {MCASP1_AXR10, (M11 | PIN_OUTPUT_PULLUP | SLEWCONTROL)}, /* mcasp1_axr10.pr2_mii0_txd2 */ 8432d7e9e9dSLokesh Vutla {MCASP1_AXR11, (M11 | PIN_OUTPUT_PULLUP | SLEWCONTROL)}, /* mcasp1_axr11.pr2_mii0_txd1 */ 8442d7e9e9dSLokesh Vutla {MCASP1_AXR12, (M11 | PIN_OUTPUT_PULLUP | SLEWCONTROL)}, /* mcasp1_axr12.pr2_mii0_txd0 */ 8452d7e9e9dSLokesh Vutla {MCASP1_AXR13, (M11 | PIN_INPUT_PULLUP | SLEWCONTROL)}, /* mcasp1_axr13.pr2_mii_mr0_clk */ 8462d7e9e9dSLokesh Vutla {MCASP1_AXR14, (M11 | PIN_INPUT_SLEW)}, /* mcasp1_axr14.pr2_mii0_rxdv */ 8472d7e9e9dSLokesh Vutla {MCASP1_AXR15, (M11 | PIN_INPUT_SLEW)}, /* mcasp1_axr15.pr2_mii0_rxd3 */ 8482d7e9e9dSLokesh Vutla {MCASP2_ACLKX, (M11 | PIN_INPUT_PULLDOWN)}, /* mcasp2_aclkx.pr2_mii0_rxd2 */ 8492d7e9e9dSLokesh Vutla {MCASP2_FSX, (M11 | PIN_INPUT_SLEW)}, /* mcasp2_fsx.pr2_mii0_rxd1 */ 8502d7e9e9dSLokesh Vutla {MCASP2_AXR2, (M11 | PIN_INPUT_SLEW)}, /* mcasp2_axr2.pr2_mii0_rxd0 */ 8512d7e9e9dSLokesh Vutla {MCASP2_AXR3, (M11 | PIN_INPUT_SLEW)}, /* mcasp2_axr3.pr2_mii0_rxlink */ 8522d7e9e9dSLokesh Vutla {MCASP2_AXR4, (M14 | PIN_OUTPUT)}, /* mcasp2_axr4.gpio1_4 */ 8532d7e9e9dSLokesh Vutla {MCASP2_AXR5, (M14 | PIN_OUTPUT)}, /* mcasp2_axr5.gpio6_7 */ 8542d7e9e9dSLokesh Vutla {MCASP2_AXR6, (M14 | PIN_OUTPUT)}, /* mcasp2_axr6.gpio2_29 */ 8552d7e9e9dSLokesh Vutla {MCASP2_AXR7, (M14 | PIN_OUTPUT)}, /* mcasp2_axr7.gpio1_5 */ 8562d7e9e9dSLokesh Vutla {MCASP3_ACLKX, (M11 | PIN_INPUT_PULLDOWN)}, /* mcasp3_aclkx.pr2_mii0_crs */ 8572d7e9e9dSLokesh Vutla {MCASP3_FSX, (M11 | PIN_INPUT_SLEW)}, /* mcasp3_fsx.pr2_mii0_col */ 8582d7e9e9dSLokesh Vutla {MCASP3_AXR0, (M11 | PIN_INPUT_PULLUP | SLEWCONTROL)}, /* mcasp3_axr0.pr2_mii1_rxer */ 8592d7e9e9dSLokesh Vutla {MCASP3_AXR1, (M11 | PIN_INPUT_PULLUP | SLEWCONTROL)}, /* mcasp3_axr1.pr2_mii1_rxlink */ 8602d7e9e9dSLokesh Vutla {MCASP4_ACLKX, (M2 | PIN_OUTPUT)}, /* mcasp4_aclkx.spi3_sclk */ 8612d7e9e9dSLokesh Vutla {MCASP4_FSX, (M2 | PIN_INPUT)}, /* mcasp4_fsx.spi3_d1 */ 8622d7e9e9dSLokesh Vutla {MCASP4_AXR1, (M2 | PIN_OUTPUT_PULLUP)}, /* mcasp4_axr1.spi3_cs0 */ 8632d7e9e9dSLokesh Vutla {MCASP5_AXR0, (M4 | PIN_INPUT)}, /* mcasp5_axr0.uart3_rxd */ 8642d7e9e9dSLokesh Vutla {MCASP5_AXR1, (M4 | PIN_OUTPUT)}, /* mcasp5_axr1.uart3_txd */ 8654d8397c6SSteve Kipisz {MMC1_CLK, (M0 | PIN_INPUT_PULLUP)}, /* mmc1_clk.mmc1_clk */ 8664d8397c6SSteve Kipisz {MMC1_CMD, (M0 | PIN_INPUT_PULLUP)}, /* mmc1_cmd.mmc1_cmd */ 8674d8397c6SSteve Kipisz {MMC1_DAT0, (M0 | PIN_INPUT_PULLUP)}, /* mmc1_dat0.mmc1_dat0 */ 8684d8397c6SSteve Kipisz {MMC1_DAT1, (M0 | PIN_INPUT_PULLUP)}, /* mmc1_dat1.mmc1_dat1 */ 8694d8397c6SSteve Kipisz {MMC1_DAT2, (M0 | PIN_INPUT_PULLUP)}, /* mmc1_dat2.mmc1_dat2 */ 8704d8397c6SSteve Kipisz {MMC1_DAT3, (M0 | PIN_INPUT_PULLUP)}, /* mmc1_dat3.mmc1_dat3 */ 8712d7e9e9dSLokesh Vutla {MMC1_SDCD, (M14 | PIN_INPUT | SLEWCONTROL)}, /* mmc1_sdcd.gpio6_27 */ 8722d7e9e9dSLokesh Vutla {MMC1_SDWP, (M14 | PIN_INPUT | SLEWCONTROL)}, /* mmc1_sdwp.gpio6_28 */ 8732d7e9e9dSLokesh Vutla {GPIO6_10, (M11 | PIN_INPUT_PULLUP)}, /* gpio6_10.pr2_mii_mt1_clk */ 8742d7e9e9dSLokesh Vutla {GPIO6_11, (M11 | PIN_OUTPUT_PULLUP)}, /* gpio6_11.pr2_mii1_txen */ 8752d7e9e9dSLokesh Vutla {MMC3_CLK, (M11 | PIN_OUTPUT_PULLUP)}, /* mmc3_clk.pr2_mii1_txd3 */ 8762d7e9e9dSLokesh Vutla {MMC3_CMD, (M11 | PIN_OUTPUT_PULLUP)}, /* mmc3_cmd.pr2_mii1_txd2 */ 8772d7e9e9dSLokesh Vutla {MMC3_DAT0, (M11 | PIN_OUTPUT_PULLUP)}, /* mmc3_dat0.pr2_mii1_txd1 */ 8782d7e9e9dSLokesh Vutla {MMC3_DAT1, (M11 | PIN_OUTPUT_PULLUP)}, /* mmc3_dat1.pr2_mii1_txd0 */ 8792d7e9e9dSLokesh Vutla {MMC3_DAT2, (M11 | PIN_INPUT_PULLUP)}, /* mmc3_dat2.pr2_mii_mr1_clk */ 8804d8397c6SSteve Kipisz {MMC3_DAT3, (M11 | PIN_INPUT_PULLDOWN)}, /* mmc3_dat3.pr2_mii1_rxdv */ 8812d7e9e9dSLokesh Vutla {MMC3_DAT4, (M11 | PIN_INPUT_PULLDOWN)}, /* mmc3_dat4.pr2_mii1_rxd3 */ 8822d7e9e9dSLokesh Vutla {MMC3_DAT5, (M11 | PIN_INPUT_PULLDOWN)}, /* mmc3_dat5.pr2_mii1_rxd2 */ 8832d7e9e9dSLokesh Vutla {MMC3_DAT6, (M11 | PIN_INPUT_PULLDOWN)}, /* mmc3_dat6.pr2_mii1_rxd1 */ 8842d7e9e9dSLokesh Vutla {MMC3_DAT7, (M11 | PIN_INPUT_PULLDOWN)}, /* mmc3_dat7.pr2_mii1_rxd0 */ 8852d7e9e9dSLokesh Vutla {SPI1_SCLK, (M14 | PIN_OUTPUT)}, /* spi1_sclk.gpio7_7 */ 8862d7e9e9dSLokesh Vutla {SPI1_D1, (M14 | PIN_OUTPUT)}, /* spi1_d1.gpio7_8 */ 8872d7e9e9dSLokesh Vutla {SPI1_D0, (M14 | PIN_OUTPUT)}, /* spi1_d0.gpio7_9 */ 8882d7e9e9dSLokesh Vutla {SPI1_CS0, (M14 | PIN_OUTPUT)}, /* spi1_cs0.gpio7_10 */ 8892d7e9e9dSLokesh Vutla {SPI1_CS1, (M14 | PIN_OUTPUT)}, /* spi1_cs1.gpio7_11 */ 8902d7e9e9dSLokesh Vutla {SPI1_CS2, (M14 | PIN_INPUT_SLEW)}, /* spi1_cs2.gpio7_12 */ 8912d7e9e9dSLokesh Vutla {SPI1_CS3, (M6 | PIN_INPUT | SLEWCONTROL)}, /* spi1_cs3.hdmi1_cec */ 8922d7e9e9dSLokesh Vutla {SPI2_SCLK, (M0 | PIN_INPUT)}, /* spi2_sclk.spi2_sclk */ 8932d7e9e9dSLokesh Vutla {SPI2_D1, (M0 | PIN_INPUT | SLEWCONTROL)}, /* spi2_d1.spi2_d1 */ 8942d7e9e9dSLokesh Vutla {SPI2_D0, (M0 | PIN_INPUT | SLEWCONTROL)}, /* spi2_d0.spi2_d0 */ 8952d7e9e9dSLokesh Vutla {SPI2_CS0, (M0 | PIN_INPUT | SLEWCONTROL)}, /* spi2_cs0.spi2_cs0 */ 8964d8397c6SSteve Kipisz {DCAN1_TX, (M15 | PULL_UP)}, /* dcan1_tx.safe for dcan1_tx */ 8974d8397c6SSteve Kipisz {DCAN1_RX, (M15 | PULL_UP)}, /* dcan1_rx.safe for dcan1_rx */ 8982d7e9e9dSLokesh Vutla {UART1_RXD, (M14 | PIN_INPUT | SLEWCONTROL)}, /* uart1_rxd.gpio7_22 */ 8992d7e9e9dSLokesh Vutla {UART1_CTSN, (M14 | PIN_OUTPUT)}, /* uart1_ctsn.gpio7_24 */ 9002d7e9e9dSLokesh Vutla {UART1_RTSN, (M14 | PIN_OUTPUT)}, /* uart1_rtsn.gpio7_25 */ 9012d7e9e9dSLokesh Vutla {I2C1_SDA, (M0 | PIN_INPUT)}, /* i2c1_sda.i2c1_sda */ 9022d7e9e9dSLokesh Vutla {I2C1_SCL, (M0 | PIN_INPUT)}, /* i2c1_scl.i2c1_scl */ 9032d7e9e9dSLokesh Vutla {I2C2_SDA, (M1 | PIN_INPUT)}, /* i2c2_sda.hdmi1_ddc_scl */ 9042d7e9e9dSLokesh Vutla {I2C2_SCL, (M1 | PIN_INPUT)}, /* i2c2_scl.hdmi1_ddc_sda */ 9052d7e9e9dSLokesh Vutla {WAKEUP0, (M0 | PIN_INPUT)}, /* Wakeup0.Wakeup0 */ 9062d7e9e9dSLokesh Vutla {WAKEUP3, (M0 | PIN_INPUT)}, /* Wakeup3.Wakeup3 */ 9072d7e9e9dSLokesh Vutla {ON_OFF, (M0 | PIN_OUTPUT)}, /* on_off.on_off */ 9082d7e9e9dSLokesh Vutla {RTC_PORZ, (M0 | PIN_INPUT)}, /* rtc_porz.rtc_porz */ 9094d8397c6SSteve Kipisz {TMS, (M0 | PIN_INPUT_PULLUP)}, /* tms.tms */ 9104d8397c6SSteve Kipisz {TDI, (M0 | PIN_INPUT_PULLUP | SLEWCONTROL)}, /* tdi.tdi */ 9112d7e9e9dSLokesh Vutla {TDO, (M0 | PIN_OUTPUT_PULLUP)}, /* tdo.tdo */ 9124d8397c6SSteve Kipisz {TCLK, (M0 | PIN_INPUT_PULLUP)}, /* tclk.tclk */ 9132d7e9e9dSLokesh Vutla {TRSTN, (M0 | PIN_INPUT)}, /* trstn.trstn */ 9142d7e9e9dSLokesh Vutla {RTCK, (M0 | PIN_OUTPUT_PULLUP)}, /* rtck.rtck */ 9152d7e9e9dSLokesh Vutla {EMU0, (M0 | PIN_INPUT)}, /* emu0.emu0 */ 9162d7e9e9dSLokesh Vutla {EMU1, (M0 | PIN_INPUT)}, /* emu1.emu1 */ 9172d7e9e9dSLokesh Vutla {RESETN, (M0 | PIN_INPUT)}, /* resetn.resetn */ 9182d7e9e9dSLokesh Vutla {RSTOUTN, (M0 | PIN_OUTPUT)}, /* rstoutn.rstoutn */ 9194d8397c6SSteve Kipisz }; 9204d8397c6SSteve Kipisz 92137611052SRoger Quadros const struct pad_conf_entry core_padconf_array_icss1eth_am571x_idk[] = { 92237611052SRoger Quadros /* PR1 MII0 */ 9232d7e9e9dSLokesh Vutla {VOUT1_D8, (M12 | PIN_INPUT_PULLUP)}, /* vout1_d8.pr1_mii_mt0_clk */ 9242d7e9e9dSLokesh Vutla {VOUT1_D9, (M13 | PIN_OUTPUT_PULLUP)}, /* vout1_d9.pr1_mii0_txd3 */ 9252d7e9e9dSLokesh Vutla {VOUT1_D10, (M13 | PIN_OUTPUT_PULLUP)}, /* vout1_d10.pr1_mii0_txd2 */ 9262d7e9e9dSLokesh Vutla {VOUT1_D11, (M13 | PIN_OUTPUT_PULLUP)}, /* vout1_d11.pr1_mii0_txen */ 9272d7e9e9dSLokesh Vutla {VOUT1_D12, (M13 | PIN_OUTPUT_PULLUP)}, /* vout1_d12.pr1_mii0_txd1 */ 9282d7e9e9dSLokesh Vutla {VOUT1_D13, (M13 | PIN_OUTPUT_PULLUP)}, /* vout1_d13.pr1_mii0_txd0 */ 9292d7e9e9dSLokesh Vutla {VOUT1_D14, (M12 | PIN_INPUT_PULLUP)}, /* vout1_d14.pr1_mii_mr0_clk */ 93037611052SRoger Quadros {VOUT1_D15, (M12 | PIN_INPUT_PULLDOWN)}, /* vout1_d15.pr1_mii0_rxdv */ 9312d7e9e9dSLokesh Vutla {VOUT1_D16, (M12 | PIN_INPUT_PULLDOWN)}, /* vout1_d16.pr1_mii0_rxd3 */ 9322d7e9e9dSLokesh Vutla {VOUT1_D17, (M12 | PIN_INPUT_PULLDOWN)}, /* vout1_d17.pr1_mii0_rxd2 */ 9332d7e9e9dSLokesh Vutla {VOUT1_D18, (M12 | PIN_INPUT_PULLDOWN)}, /* vout1_d18.pr1_mii0_rxd1 */ 9342d7e9e9dSLokesh Vutla {VOUT1_D19, (M12 | PIN_INPUT_PULLDOWN)}, /* vout1_d19.pr1_mii0_rxd0 */ 93537611052SRoger Quadros {VOUT1_D20, (M12 | PIN_INPUT_PULLUP)}, /* vout1_d20.pr1_mii0_rxer */ 9362d7e9e9dSLokesh Vutla {VOUT1_D21, (M12 | PIN_INPUT_PULLDOWN)}, /* vout1_d21.pr1_mii0_rxlink */ 9372d7e9e9dSLokesh Vutla {VOUT1_D22, (M12 | PIN_INPUT_PULLDOWN)}, /* vout1_d22.pr1_mii0_col */ 9382d7e9e9dSLokesh Vutla {VOUT1_D23, (M12 | PIN_INPUT_PULLDOWN)}, /* vout1_d23.pr1_mii0_crs */ 93937611052SRoger Quadros 94037611052SRoger Quadros /* PR1 MII1 */ 9412d7e9e9dSLokesh Vutla {VIN2A_D3, (M12 | PIN_INPUT_PULLDOWN)}, /* vin2a_d3.pr1_mii1_col */ 9422d7e9e9dSLokesh Vutla {VIN2A_D4, (M13 | PIN_OUTPUT_PULLUP)}, /* vin2a_d4.pr1_mii1_txd1 */ 9432d7e9e9dSLokesh Vutla {VIN2A_D5, (M13 | PIN_OUTPUT_PULLUP)}, /* vin2a_d5.pr1_mii1_txd0 */ 9442d7e9e9dSLokesh Vutla {VIN2A_D6, (M11 | PIN_INPUT_PULLUP)}, /* vin2a_d6.pr1_mii_mt1_clk */ 9452d7e9e9dSLokesh Vutla {VIN2A_D7, (M11 | PIN_OUTPUT_PULLUP)}, /* vin2a_d7.pr1_mii1_txen */ 9462d7e9e9dSLokesh Vutla {VIN2A_D8, (M11 | PIN_OUTPUT_PULLUP)}, /* vin2a_d8.pr1_mii1_txd3 */ 9472d7e9e9dSLokesh Vutla {VIN2A_D9, (M11 | PIN_OUTPUT_PULLUP)}, /* vin2a_d9.pr1_mii1_txd2 */ 94837611052SRoger Quadros {VOUT1_VSYNC, (M12 | PIN_INPUT_PULLUP)}, /* vout1_vsync.pr1_mii1_rxer */ 9492d7e9e9dSLokesh Vutla {VOUT1_D0, (M12 | PIN_INPUT_PULLUP)}, /* vout1_d0.pr1_mii1_rxlink */ 9502d7e9e9dSLokesh Vutla {VOUT1_D1, (M12 | PIN_INPUT_PULLDOWN)}, /* vout1_d1.pr1_mii1_crs */ 9512d7e9e9dSLokesh Vutla {VOUT1_D2, (M12 | PIN_INPUT_PULLUP)}, /* vout1_d2.pr1_mii_mr1_clk */ 95237611052SRoger Quadros {VOUT1_D3, (M12 | PIN_INPUT_PULLDOWN)}, /* vout1_d3.pr1_mii1_rxdv */ 9532d7e9e9dSLokesh Vutla {VOUT1_D4, (M12 | PIN_INPUT_PULLDOWN)}, /* vout1_d4.pr1_mii1_rxd3 */ 9542d7e9e9dSLokesh Vutla {VOUT1_D5, (M12 | PIN_INPUT_PULLDOWN)}, /* vout1_d5.pr1_mii1_rxd2 */ 9552d7e9e9dSLokesh Vutla {VOUT1_D6, (M12 | PIN_INPUT_PULLDOWN)}, /* vout1_d6.pr1_mii1_rxd1 */ 9562d7e9e9dSLokesh Vutla {VOUT1_D7, (M12 | PIN_INPUT_PULLDOWN)}, /* vout1_d7.pr1_mii1_rxd0 */ 95737611052SRoger Quadros }; 95837611052SRoger Quadros 95937611052SRoger Quadros const struct pad_conf_entry core_padconf_array_vout_am571x_idk[] = { 9602d7e9e9dSLokesh Vutla {VOUT1_CLK, (M0 | PIN_OUTPUT | SLEWCONTROL)}, /* vout1_clk.vout1_clk */ 9612d7e9e9dSLokesh Vutla {VOUT1_DE, (M0 | PIN_OUTPUT | SLEWCONTROL)}, /* vout1_de.vout1_de */ 9622d7e9e9dSLokesh Vutla {VOUT1_HSYNC, (M0 | PIN_OUTPUT | SLEWCONTROL)}, /* vout1_hsync.vout1_hsync */ 9632d7e9e9dSLokesh Vutla {VOUT1_VSYNC, (M0 | PIN_OUTPUT | SLEWCONTROL)}, /* vout1_vsync.vout1_vsync */ 9642d7e9e9dSLokesh Vutla {VOUT1_D0, (M0 | PIN_OUTPUT | SLEWCONTROL)}, /* vout1_d0.vout1_d0 */ 9652d7e9e9dSLokesh Vutla {VOUT1_D1, (M0 | PIN_OUTPUT | SLEWCONTROL)}, /* vout1_d1.vout1_d1 */ 9662d7e9e9dSLokesh Vutla {VOUT1_D2, (M0 | PIN_OUTPUT | SLEWCONTROL)}, /* vout1_d2.vout1_d2 */ 9672d7e9e9dSLokesh Vutla {VOUT1_D3, (M0 | PIN_OUTPUT | SLEWCONTROL)}, /* vout1_d3.vout1_d3 */ 9682d7e9e9dSLokesh Vutla {VOUT1_D4, (M0 | PIN_OUTPUT | SLEWCONTROL)}, /* vout1_d4.vout1_d4 */ 9692d7e9e9dSLokesh Vutla {VOUT1_D5, (M0 | PIN_OUTPUT | SLEWCONTROL)}, /* vout1_d5.vout1_d5 */ 9702d7e9e9dSLokesh Vutla {VOUT1_D6, (M0 | PIN_OUTPUT | SLEWCONTROL)}, /* vout1_d6.vout1_d6 */ 9712d7e9e9dSLokesh Vutla {VOUT1_D7, (M0 | PIN_OUTPUT | SLEWCONTROL)}, /* vout1_d7.vout1_d7 */ 9722d7e9e9dSLokesh Vutla {VOUT1_D8, (M0 | PIN_OUTPUT | SLEWCONTROL)}, /* vout1_d8.vout1_d8 */ 9732d7e9e9dSLokesh Vutla {VOUT1_D9, (M0 | PIN_OUTPUT | SLEWCONTROL)}, /* vout1_d9.vout1_d9 */ 9742d7e9e9dSLokesh Vutla {VOUT1_D10, (M0 | PIN_OUTPUT | SLEWCONTROL)}, /* vout1_d10.vout1_d10 */ 9752d7e9e9dSLokesh Vutla {VOUT1_D11, (M0 | PIN_OUTPUT | SLEWCONTROL)}, /* vout1_d11.vout1_d11 */ 9762d7e9e9dSLokesh Vutla {VOUT1_D12, (M0 | PIN_OUTPUT | SLEWCONTROL)}, /* vout1_d12.vout1_d12 */ 9772d7e9e9dSLokesh Vutla {VOUT1_D13, (M0 | PIN_OUTPUT | SLEWCONTROL)}, /* vout1_d13.vout1_d13 */ 9782d7e9e9dSLokesh Vutla {VOUT1_D14, (M0 | PIN_OUTPUT | SLEWCONTROL)}, /* vout1_d14.vout1_d14 */ 9792d7e9e9dSLokesh Vutla {VOUT1_D15, (M0 | PIN_OUTPUT | SLEWCONTROL)}, /* vout1_d15.vout1_d15 */ 9802d7e9e9dSLokesh Vutla {VOUT1_D16, (M0 | PIN_OUTPUT | SLEWCONTROL)}, /* vout1_d16.vout1_d16 */ 9812d7e9e9dSLokesh Vutla {VOUT1_D17, (M0 | PIN_OUTPUT | SLEWCONTROL)}, /* vout1_d17.vout1_d17 */ 9822d7e9e9dSLokesh Vutla {VOUT1_D18, (M0 | PIN_OUTPUT | SLEWCONTROL)}, /* vout1_d18.vout1_d18 */ 9832d7e9e9dSLokesh Vutla {VOUT1_D19, (M0 | PIN_OUTPUT | SLEWCONTROL)}, /* vout1_d19.vout1_d19 */ 9842d7e9e9dSLokesh Vutla {VOUT1_D20, (M0 | PIN_OUTPUT | SLEWCONTROL)}, /* vout1_d20.vout1_d20 */ 9852d7e9e9dSLokesh Vutla {VOUT1_D21, (M0 | PIN_OUTPUT | SLEWCONTROL)}, /* vout1_d21.vout1_d21 */ 9862d7e9e9dSLokesh Vutla {VOUT1_D22, (M0 | PIN_OUTPUT | SLEWCONTROL)}, /* vout1_d22.vout1_d22 */ 9872d7e9e9dSLokesh Vutla {VOUT1_D23, (M0 | PIN_OUTPUT | SLEWCONTROL)}, /* vout1_d23.vout1_d23 */ 9882d7e9e9dSLokesh Vutla 9892d7e9e9dSLokesh Vutla {MCASP5_ACLKX, (M12 | PIN_INPUT | MANUAL_MODE)}, /* mcasp5_aclkx.pr2_pru1_gpi1 */ 9902d7e9e9dSLokesh Vutla {MCASP5_FSX, (M12 | PIN_INPUT | MANUAL_MODE)}, /* mcasp5_fsx.pr2_pru1_gpi2 */ 9912d7e9e9dSLokesh Vutla {UART2_RXD, (M0 | PIN_INPUT)}, /* uart2_rxd.uart2_rxd */ 9922d7e9e9dSLokesh Vutla {UART2_TXD, (M0 | PIN_OUTPUT)}, /* uart2_txd.uart2_txd */ 9932d7e9e9dSLokesh Vutla {VIN2A_D5, (M13 | PIN_OUTPUT_PULLDOWN | MANUAL_MODE)}, /* vin2a_d5.pr1_pru1_gpo2 */ 99437611052SRoger Quadros }; 99537611052SRoger Quadros 99674cc8b09SKipisz, Steven const struct pad_conf_entry early_padconf[] = { 99774cc8b09SKipisz, Steven {UART2_CTSN, (M2 | PIN_INPUT_SLEW)}, /* uart2_ctsn.uart3_rxd */ 99874cc8b09SKipisz, Steven {UART2_RTSN, (M1 | PIN_INPUT_SLEW)}, /* uart2_rtsn.uart3_txd */ 99974cc8b09SKipisz, Steven {I2C1_SDA, (PIN_INPUT_PULLUP | M0)}, /* I2C1_SDA */ 100074cc8b09SKipisz, Steven {I2C1_SCL, (PIN_INPUT_PULLUP | M0)}, /* I2C1_SCL */ 100174cc8b09SKipisz, Steven }; 100274cc8b09SKipisz, Steven 100374cc8b09SKipisz, Steven #ifdef CONFIG_IODELAY_RECALIBRATION 100489a38953SNishanth Menon const struct iodelay_cfg_entry iodelay_cfg_array_x15_sr1_1[] = { 100574cc8b09SKipisz, Steven {0x0114, 2980, 0}, /* CFG_GPMC_A0_IN */ 100674cc8b09SKipisz, Steven {0x0120, 2648, 0}, /* CFG_GPMC_A10_IN */ 100774cc8b09SKipisz, Steven {0x012C, 2918, 0}, /* CFG_GPMC_A11_IN */ 100874cc8b09SKipisz, Steven {0x0198, 2917, 0}, /* CFG_GPMC_A1_IN */ 100974cc8b09SKipisz, Steven {0x0204, 3156, 178}, /* CFG_GPMC_A2_IN */ 101074cc8b09SKipisz, Steven {0x0210, 3109, 246}, /* CFG_GPMC_A3_IN */ 101174cc8b09SKipisz, Steven {0x021C, 3142, 100}, /* CFG_GPMC_A4_IN */ 101274cc8b09SKipisz, Steven {0x0228, 3084, 33}, /* CFG_GPMC_A5_IN */ 101374cc8b09SKipisz, Steven {0x0234, 2778, 0}, /* CFG_GPMC_A6_IN */ 101474cc8b09SKipisz, Steven {0x0240, 3110, 0}, /* CFG_GPMC_A7_IN */ 101574cc8b09SKipisz, Steven {0x024C, 2874, 0}, /* CFG_GPMC_A8_IN */ 101674cc8b09SKipisz, Steven {0x0258, 3072, 0}, /* CFG_GPMC_A9_IN */ 101774cc8b09SKipisz, Steven {0x0264, 2466, 0}, /* CFG_GPMC_AD0_IN */ 101874cc8b09SKipisz, Steven {0x0270, 2523, 0}, /* CFG_GPMC_AD10_IN */ 101974cc8b09SKipisz, Steven {0x027C, 2453, 0}, /* CFG_GPMC_AD11_IN */ 102074cc8b09SKipisz, Steven {0x0288, 2285, 0}, /* CFG_GPMC_AD12_IN */ 102174cc8b09SKipisz, Steven {0x0294, 2206, 0}, /* CFG_GPMC_AD13_IN */ 102274cc8b09SKipisz, Steven {0x02A0, 1898, 0}, /* CFG_GPMC_AD14_IN */ 102374cc8b09SKipisz, Steven {0x02AC, 2473, 0}, /* CFG_GPMC_AD15_IN */ 102474cc8b09SKipisz, Steven {0x02B8, 2307, 0}, /* CFG_GPMC_AD1_IN */ 102574cc8b09SKipisz, Steven {0x02C4, 2691, 0}, /* CFG_GPMC_AD2_IN */ 102674cc8b09SKipisz, Steven {0x02D0, 2384, 0}, /* CFG_GPMC_AD3_IN */ 102774cc8b09SKipisz, Steven {0x02DC, 2462, 0}, /* CFG_GPMC_AD4_IN */ 102874cc8b09SKipisz, Steven {0x02E8, 2335, 0}, /* CFG_GPMC_AD5_IN */ 102974cc8b09SKipisz, Steven {0x02F4, 2370, 0}, /* CFG_GPMC_AD6_IN */ 103074cc8b09SKipisz, Steven {0x0300, 2389, 0}, /* CFG_GPMC_AD7_IN */ 103174cc8b09SKipisz, Steven {0x030C, 2672, 0}, /* CFG_GPMC_AD8_IN */ 103274cc8b09SKipisz, Steven {0x0318, 2334, 0}, /* CFG_GPMC_AD9_IN */ 1033d9e14671SLokesh Vutla {0x0378, 0, 0}, /* CFG_GPMC_CS3_IN */ 1034d9e14671SLokesh Vutla {0x0678, 406, 0}, /* CFG_MMC3_CLK_IN */ 1035d9e14671SLokesh Vutla {0x0680, 659, 0}, /* CFG_MMC3_CLK_OUT */ 1036d9e14671SLokesh Vutla {0x0684, 0, 0}, /* CFG_MMC3_CMD_IN */ 1037d9e14671SLokesh Vutla {0x0688, 0, 0}, /* CFG_MMC3_CMD_OEN */ 1038d9e14671SLokesh Vutla {0x068C, 0, 0}, /* CFG_MMC3_CMD_OUT */ 1039d9e14671SLokesh Vutla {0x0690, 130, 0}, /* CFG_MMC3_DAT0_IN */ 1040d9e14671SLokesh Vutla {0x0694, 0, 0}, /* CFG_MMC3_DAT0_OEN */ 1041d9e14671SLokesh Vutla {0x0698, 0, 0}, /* CFG_MMC3_DAT0_OUT */ 1042d9e14671SLokesh Vutla {0x069C, 169, 0}, /* CFG_MMC3_DAT1_IN */ 1043d9e14671SLokesh Vutla {0x06A0, 0, 0}, /* CFG_MMC3_DAT1_OEN */ 1044d9e14671SLokesh Vutla {0x06A4, 0, 0}, /* CFG_MMC3_DAT1_OUT */ 1045d9e14671SLokesh Vutla {0x06A8, 0, 0}, /* CFG_MMC3_DAT2_IN */ 1046d9e14671SLokesh Vutla {0x06AC, 0, 0}, /* CFG_MMC3_DAT2_OEN */ 1047d9e14671SLokesh Vutla {0x06B0, 0, 0}, /* CFG_MMC3_DAT2_OUT */ 1048d9e14671SLokesh Vutla {0x06B4, 457, 0}, /* CFG_MMC3_DAT3_IN */ 1049d9e14671SLokesh Vutla {0x06B8, 0, 0}, /* CFG_MMC3_DAT3_OEN */ 1050d9e14671SLokesh Vutla {0x06BC, 0, 0}, /* CFG_MMC3_DAT3_OUT */ 1051d9e14671SLokesh Vutla {0x06C0, 702, 0}, /* CFG_MMC3_DAT4_IN */ 1052d9e14671SLokesh Vutla {0x06C4, 0, 0}, /* CFG_MMC3_DAT4_OEN */ 1053d9e14671SLokesh Vutla {0x06C8, 0, 0}, /* CFG_MMC3_DAT4_OUT */ 1054d9e14671SLokesh Vutla {0x06CC, 738, 0}, /* CFG_MMC3_DAT5_IN */ 1055d9e14671SLokesh Vutla {0x06D0, 0, 0}, /* CFG_MMC3_DAT5_OEN */ 1056d9e14671SLokesh Vutla {0x06D4, 0, 0}, /* CFG_MMC3_DAT5_OUT */ 1057d9e14671SLokesh Vutla {0x06D8, 856, 0}, /* CFG_MMC3_DAT6_IN */ 1058d9e14671SLokesh Vutla {0x06DC, 0, 0}, /* CFG_MMC3_DAT6_OEN */ 1059d9e14671SLokesh Vutla {0x06E0, 0, 0}, /* CFG_MMC3_DAT6_OUT */ 1060d9e14671SLokesh Vutla {0x06E4, 610, 0}, /* CFG_MMC3_DAT7_IN */ 1061d9e14671SLokesh Vutla {0x06E8, 0, 0}, /* CFG_MMC3_DAT7_OEN */ 1062d9e14671SLokesh Vutla {0x06EC, 0, 0}, /* CFG_MMC3_DAT7_OUT */ 106374cc8b09SKipisz, Steven {0x06F0, 480, 0}, /* CFG_RGMII0_RXC_IN */ 106474cc8b09SKipisz, Steven {0x06FC, 111, 1641}, /* CFG_RGMII0_RXCTL_IN */ 106574cc8b09SKipisz, Steven {0x0708, 272, 1116}, /* CFG_RGMII0_RXD0_IN */ 106674cc8b09SKipisz, Steven {0x0714, 243, 1260}, /* CFG_RGMII0_RXD1_IN */ 106774cc8b09SKipisz, Steven {0x0720, 0, 1614}, /* CFG_RGMII0_RXD2_IN */ 106874cc8b09SKipisz, Steven {0x072C, 105, 1673}, /* CFG_RGMII0_RXD3_IN */ 106974cc8b09SKipisz, Steven {0x0740, 531, 120}, /* CFG_RGMII0_TXC_OUT */ 10705d43e168SNishanth Menon {0x074C, 201, 60}, /* CFG_RGMII0_TXCTL_OUT */ 10715d43e168SNishanth Menon {0x0758, 229, 120}, /* CFG_RGMII0_TXD0_OUT */ 10725d43e168SNishanth Menon {0x0764, 141, 0}, /* CFG_RGMII0_TXD1_OUT */ 10735d43e168SNishanth Menon {0x0770, 495, 120}, /* CFG_RGMII0_TXD2_OUT */ 10745d43e168SNishanth Menon {0x077C, 660, 120}, /* CFG_RGMII0_TXD3_OUT */ 107574cc8b09SKipisz, Steven {0x0A70, 1551, 115}, /* CFG_VIN2A_D12_OUT */ 107674cc8b09SKipisz, Steven {0x0A7C, 816, 0}, /* CFG_VIN2A_D13_OUT */ 107774cc8b09SKipisz, Steven {0x0A88, 876, 0}, /* CFG_VIN2A_D14_OUT */ 107874cc8b09SKipisz, Steven {0x0A94, 312, 0}, /* CFG_VIN2A_D15_OUT */ 107974cc8b09SKipisz, Steven {0x0AA0, 58, 0}, /* CFG_VIN2A_D16_OUT */ 108074cc8b09SKipisz, Steven {0x0AAC, 0, 0}, /* CFG_VIN2A_D17_OUT */ 108174cc8b09SKipisz, Steven {0x0AB0, 702, 0}, /* CFG_VIN2A_D18_IN */ 108274cc8b09SKipisz, Steven {0x0ABC, 136, 976}, /* CFG_VIN2A_D19_IN */ 108374cc8b09SKipisz, Steven {0x0AD4, 210, 1357}, /* CFG_VIN2A_D20_IN */ 108474cc8b09SKipisz, Steven {0x0AE0, 189, 1462}, /* CFG_VIN2A_D21_IN */ 108574cc8b09SKipisz, Steven {0x0AEC, 232, 1278}, /* CFG_VIN2A_D22_IN */ 108674cc8b09SKipisz, Steven {0x0AF8, 0, 1397}, /* CFG_VIN2A_D23_IN */ 108774cc8b09SKipisz, Steven }; 1088c020d355SSteve Kipisz 108989a38953SNishanth Menon const struct iodelay_cfg_entry iodelay_cfg_array_x15_sr2_0[] = { 109089a38953SNishanth Menon {0x0114, 2519, 702}, /* CFG_GPMC_A0_IN */ 109189a38953SNishanth Menon {0x0120, 2435, 411}, /* CFG_GPMC_A10_IN */ 109289a38953SNishanth Menon {0x012C, 2379, 755}, /* CFG_GPMC_A11_IN */ 109389a38953SNishanth Menon {0x0198, 2384, 778}, /* CFG_GPMC_A1_IN */ 109489a38953SNishanth Menon {0x0204, 2499, 1127}, /* CFG_GPMC_A2_IN */ 109589a38953SNishanth Menon {0x0210, 2455, 1181}, /* CFG_GPMC_A3_IN */ 109689a38953SNishanth Menon {0x021C, 2486, 1039}, /* CFG_GPMC_A4_IN */ 109789a38953SNishanth Menon {0x0228, 2456, 938}, /* CFG_GPMC_A5_IN */ 109889a38953SNishanth Menon {0x0234, 2463, 573}, /* CFG_GPMC_A6_IN */ 109989a38953SNishanth Menon {0x0240, 2608, 783}, /* CFG_GPMC_A7_IN */ 110089a38953SNishanth Menon {0x024C, 2430, 656}, /* CFG_GPMC_A8_IN */ 110189a38953SNishanth Menon {0x0258, 2465, 850}, /* CFG_GPMC_A9_IN */ 110289a38953SNishanth Menon {0x0264, 2316, 301}, /* CFG_GPMC_AD0_IN */ 110389a38953SNishanth Menon {0x0270, 2324, 406}, /* CFG_GPMC_AD10_IN */ 110489a38953SNishanth Menon {0x027C, 2278, 352}, /* CFG_GPMC_AD11_IN */ 110589a38953SNishanth Menon {0x0288, 2297, 160}, /* CFG_GPMC_AD12_IN */ 110689a38953SNishanth Menon {0x0294, 2278, 108}, /* CFG_GPMC_AD13_IN */ 110789a38953SNishanth Menon {0x02A0, 2035, 0}, /* CFG_GPMC_AD14_IN */ 110889a38953SNishanth Menon {0x02AC, 2279, 378}, /* CFG_GPMC_AD15_IN */ 110989a38953SNishanth Menon {0x02B8, 2440, 70}, /* CFG_GPMC_AD1_IN */ 111089a38953SNishanth Menon {0x02C4, 2404, 446}, /* CFG_GPMC_AD2_IN */ 111189a38953SNishanth Menon {0x02D0, 2343, 212}, /* CFG_GPMC_AD3_IN */ 111289a38953SNishanth Menon {0x02DC, 2355, 322}, /* CFG_GPMC_AD4_IN */ 111389a38953SNishanth Menon {0x02E8, 2337, 192}, /* CFG_GPMC_AD5_IN */ 111489a38953SNishanth Menon {0x02F4, 2270, 314}, /* CFG_GPMC_AD6_IN */ 111589a38953SNishanth Menon {0x0300, 2339, 259}, /* CFG_GPMC_AD7_IN */ 111689a38953SNishanth Menon {0x030C, 2308, 577}, /* CFG_GPMC_AD8_IN */ 111789a38953SNishanth Menon {0x0318, 2334, 166}, /* CFG_GPMC_AD9_IN */ 111889a38953SNishanth Menon {0x0378, 0, 0}, /* CFG_GPMC_CS3_IN */ 111989a38953SNishanth Menon {0x0678, 0, 386}, /* CFG_MMC3_CLK_IN */ 112089a38953SNishanth Menon {0x0680, 605, 0}, /* CFG_MMC3_CLK_OUT */ 112189a38953SNishanth Menon {0x0684, 0, 0}, /* CFG_MMC3_CMD_IN */ 112289a38953SNishanth Menon {0x0688, 0, 0}, /* CFG_MMC3_CMD_OEN */ 112389a38953SNishanth Menon {0x068C, 0, 0}, /* CFG_MMC3_CMD_OUT */ 112489a38953SNishanth Menon {0x0690, 171, 0}, /* CFG_MMC3_DAT0_IN */ 112589a38953SNishanth Menon {0x0694, 0, 0}, /* CFG_MMC3_DAT0_OEN */ 112689a38953SNishanth Menon {0x0698, 0, 0}, /* CFG_MMC3_DAT0_OUT */ 112789a38953SNishanth Menon {0x069C, 221, 0}, /* CFG_MMC3_DAT1_IN */ 112889a38953SNishanth Menon {0x06A0, 0, 0}, /* CFG_MMC3_DAT1_OEN */ 112989a38953SNishanth Menon {0x06A4, 0, 0}, /* CFG_MMC3_DAT1_OUT */ 113089a38953SNishanth Menon {0x06A8, 0, 0}, /* CFG_MMC3_DAT2_IN */ 113189a38953SNishanth Menon {0x06AC, 0, 0}, /* CFG_MMC3_DAT2_OEN */ 113289a38953SNishanth Menon {0x06B0, 0, 0}, /* CFG_MMC3_DAT2_OUT */ 113389a38953SNishanth Menon {0x06B4, 474, 0}, /* CFG_MMC3_DAT3_IN */ 113489a38953SNishanth Menon {0x06B8, 0, 0}, /* CFG_MMC3_DAT3_OEN */ 113589a38953SNishanth Menon {0x06BC, 0, 0}, /* CFG_MMC3_DAT3_OUT */ 1136d9e14671SLokesh Vutla {0x06C0, 792, 0}, /* CFG_MMC3_DAT4_IN */ 1137d9e14671SLokesh Vutla {0x06C4, 0, 0}, /* CFG_MMC3_DAT4_OEN */ 1138d9e14671SLokesh Vutla {0x06C8, 0, 0}, /* CFG_MMC3_DAT4_OUT */ 1139d9e14671SLokesh Vutla {0x06CC, 782, 0}, /* CFG_MMC3_DAT5_IN */ 1140d9e14671SLokesh Vutla {0x06D0, 0, 0}, /* CFG_MMC3_DAT5_OEN */ 1141d9e14671SLokesh Vutla {0x06D4, 0, 0}, /* CFG_MMC3_DAT5_OUT */ 1142d9e14671SLokesh Vutla {0x06D8, 942, 0}, /* CFG_MMC3_DAT6_IN */ 1143d9e14671SLokesh Vutla {0x06DC, 0, 0}, /* CFG_MMC3_DAT6_OEN */ 1144d9e14671SLokesh Vutla {0x06E0, 0, 0}, /* CFG_MMC3_DAT6_OUT */ 1145d9e14671SLokesh Vutla {0x06E4, 636, 0}, /* CFG_MMC3_DAT7_IN */ 1146d9e14671SLokesh Vutla {0x06E8, 0, 0}, /* CFG_MMC3_DAT7_OEN */ 1147d9e14671SLokesh Vutla {0x06EC, 0, 0}, /* CFG_MMC3_DAT7_OUT */ 114889a38953SNishanth Menon {0x06F0, 260, 0}, /* CFG_RGMII0_RXC_IN */ 114989a38953SNishanth Menon {0x06FC, 0, 1412}, /* CFG_RGMII0_RXCTL_IN */ 115089a38953SNishanth Menon {0x0708, 123, 1047}, /* CFG_RGMII0_RXD0_IN */ 115189a38953SNishanth Menon {0x0714, 139, 1081}, /* CFG_RGMII0_RXD1_IN */ 115289a38953SNishanth Menon {0x0720, 195, 1100}, /* CFG_RGMII0_RXD2_IN */ 115389a38953SNishanth Menon {0x072C, 239, 1216}, /* CFG_RGMII0_RXD3_IN */ 115489a38953SNishanth Menon {0x0740, 89, 0}, /* CFG_RGMII0_TXC_OUT */ 115589a38953SNishanth Menon {0x074C, 15, 125}, /* CFG_RGMII0_TXCTL_OUT */ 115689a38953SNishanth Menon {0x0758, 339, 162}, /* CFG_RGMII0_TXD0_OUT */ 115789a38953SNishanth Menon {0x0764, 146, 94}, /* CFG_RGMII0_TXD1_OUT */ 115889a38953SNishanth Menon {0x0770, 0, 27}, /* CFG_RGMII0_TXD2_OUT */ 115989a38953SNishanth Menon {0x077C, 291, 205}, /* CFG_RGMII0_TXD3_OUT */ 116089a38953SNishanth Menon {0x0A70, 0, 0}, /* CFG_VIN2A_D12_OUT */ 116189a38953SNishanth Menon {0x0A7C, 219, 101}, /* CFG_VIN2A_D13_OUT */ 116289a38953SNishanth Menon {0x0A88, 92, 58}, /* CFG_VIN2A_D14_OUT */ 116389a38953SNishanth Menon {0x0A94, 135, 100}, /* CFG_VIN2A_D15_OUT */ 116489a38953SNishanth Menon {0x0AA0, 154, 101}, /* CFG_VIN2A_D16_OUT */ 116589a38953SNishanth Menon {0x0AAC, 78, 27}, /* CFG_VIN2A_D17_OUT */ 116689a38953SNishanth Menon {0x0AB0, 411, 0}, /* CFG_VIN2A_D18_IN */ 116789a38953SNishanth Menon {0x0ABC, 0, 382}, /* CFG_VIN2A_D19_IN */ 116889a38953SNishanth Menon {0x0AD4, 320, 750}, /* CFG_VIN2A_D20_IN */ 116989a38953SNishanth Menon {0x0AE0, 192, 836}, /* CFG_VIN2A_D21_IN */ 117089a38953SNishanth Menon {0x0AEC, 294, 669}, /* CFG_VIN2A_D22_IN */ 117189a38953SNishanth Menon {0x0AF8, 50, 700}, /* CFG_VIN2A_D23_IN */ 1172d9e14671SLokesh Vutla {0x0B9C, 0, 706}, /* CFG_VOUT1_CLK_OUT */ 1173d9e14671SLokesh Vutla {0x0BA8, 2313, 0}, /* CFG_VOUT1_D0_OUT */ 1174d9e14671SLokesh Vutla {0x0BB4, 2199, 0}, /* CFG_VOUT1_D10_OUT */ 1175d9e14671SLokesh Vutla {0x0BC0, 2266, 0}, /* CFG_VOUT1_D11_OUT */ 1176d9e14671SLokesh Vutla {0x0BCC, 3159, 0}, /* CFG_VOUT1_D12_OUT */ 1177d9e14671SLokesh Vutla {0x0BD8, 2100, 0}, /* CFG_VOUT1_D13_OUT */ 1178d9e14671SLokesh Vutla {0x0BE4, 2229, 0}, /* CFG_VOUT1_D14_OUT */ 1179d9e14671SLokesh Vutla {0x0BF0, 2202, 0}, /* CFG_VOUT1_D15_OUT */ 1180d9e14671SLokesh Vutla {0x0BFC, 2084, 0}, /* CFG_VOUT1_D16_OUT */ 1181d9e14671SLokesh Vutla {0x0C08, 2195, 0}, /* CFG_VOUT1_D17_OUT */ 1182d9e14671SLokesh Vutla {0x0C14, 2342, 0}, /* CFG_VOUT1_D18_OUT */ 1183d9e14671SLokesh Vutla {0x0C20, 2463, 0}, /* CFG_VOUT1_D19_OUT */ 1184d9e14671SLokesh Vutla {0x0C2C, 2439, 0}, /* CFG_VOUT1_D1_OUT */ 1185d9e14671SLokesh Vutla {0x0C38, 2304, 0}, /* CFG_VOUT1_D20_OUT */ 1186d9e14671SLokesh Vutla {0x0C44, 2103, 0}, /* CFG_VOUT1_D21_OUT */ 1187d9e14671SLokesh Vutla {0x0C50, 2145, 0}, /* CFG_VOUT1_D22_OUT */ 1188d9e14671SLokesh Vutla {0x0C5C, 1932, 0}, /* CFG_VOUT1_D23_OUT */ 1189d9e14671SLokesh Vutla {0x0C68, 2200, 0}, /* CFG_VOUT1_D2_OUT */ 1190d9e14671SLokesh Vutla {0x0C74, 2355, 0}, /* CFG_VOUT1_D3_OUT */ 1191d9e14671SLokesh Vutla {0x0C80, 3215, 0}, /* CFG_VOUT1_D4_OUT */ 1192d9e14671SLokesh Vutla {0x0C8C, 2314, 0}, /* CFG_VOUT1_D5_OUT */ 1193d9e14671SLokesh Vutla {0x0C98, 2238, 0}, /* CFG_VOUT1_D6_OUT */ 1194d9e14671SLokesh Vutla {0x0CA4, 2381, 0}, /* CFG_VOUT1_D7_OUT */ 1195d9e14671SLokesh Vutla {0x0CB0, 2138, 0}, /* CFG_VOUT1_D8_OUT */ 1196d9e14671SLokesh Vutla {0x0CBC, 2383, 0}, /* CFG_VOUT1_D9_OUT */ 1197d9e14671SLokesh Vutla {0x0CC8, 1984, 0}, /* CFG_VOUT1_DE_OUT */ 1198d9e14671SLokesh Vutla {0x0CE0, 1947, 0}, /* CFG_VOUT1_HSYNC_OUT */ 1199d9e14671SLokesh Vutla {0x0CEC, 2739, 0}, /* CFG_VOUT1_VSYNC_OUT */ 120089a38953SNishanth Menon }; 120189a38953SNishanth Menon 1202443b0df3SLokesh Vutla const struct iodelay_cfg_entry iodelay_cfg_array_am574x_idk[] = { 1203443b0df3SLokesh Vutla {0x0114, 2199, 621}, /* CFG_GPMC_A0_IN */ 1204443b0df3SLokesh Vutla {0x0120, 0, 0}, /* CFG_GPMC_A10_IN */ 1205443b0df3SLokesh Vutla {0x012C, 2133, 859}, /* CFG_GPMC_A11_IN */ 1206443b0df3SLokesh Vutla {0x0138, 2258, 562}, /* CFG_GPMC_A12_IN */ 1207443b0df3SLokesh Vutla {0x0144, 0, 0}, /* CFG_GPMC_A13_IN */ 1208443b0df3SLokesh Vutla {0x0150, 2149, 1052}, /* CFG_GPMC_A14_IN */ 1209443b0df3SLokesh Vutla {0x015C, 2121, 997}, /* CFG_GPMC_A15_IN */ 1210443b0df3SLokesh Vutla {0x0168, 2159, 1134}, /* CFG_GPMC_A16_IN */ 1211443b0df3SLokesh Vutla {0x0170, 0, 0}, /* CFG_GPMC_A16_OUT */ 1212443b0df3SLokesh Vutla {0x0174, 2135, 1085}, /* CFG_GPMC_A17_IN */ 1213443b0df3SLokesh Vutla {0x0188, 0, 0}, /* CFG_GPMC_A18_OUT */ 1214443b0df3SLokesh Vutla {0x0198, 1989, 612}, /* CFG_GPMC_A1_IN */ 1215443b0df3SLokesh Vutla {0x0204, 2218, 912}, /* CFG_GPMC_A2_IN */ 1216443b0df3SLokesh Vutla {0x0210, 2168, 963}, /* CFG_GPMC_A3_IN */ 1217443b0df3SLokesh Vutla {0x021C, 2196, 813}, /* CFG_GPMC_A4_IN */ 1218443b0df3SLokesh Vutla {0x0228, 2082, 782}, /* CFG_GPMC_A5_IN */ 1219443b0df3SLokesh Vutla {0x0234, 2098, 407}, /* CFG_GPMC_A6_IN */ 1220443b0df3SLokesh Vutla {0x0240, 2343, 585}, /* CFG_GPMC_A7_IN */ 1221443b0df3SLokesh Vutla {0x024C, 2030, 685}, /* CFG_GPMC_A8_IN */ 1222443b0df3SLokesh Vutla {0x0258, 2116, 832}, /* CFG_GPMC_A9_IN */ 1223443b0df3SLokesh Vutla {0x0374, 0, 0}, /* CFG_GPMC_CS2_OUT */ 1224443b0df3SLokesh Vutla {0x0590, 1000, 3900}, /* CFG_MCASP5_ACLKX_OUT */ 1225443b0df3SLokesh Vutla {0x05AC, 1000, 3800}, /* CFG_MCASP5_FSX_IN */ 1226443b0df3SLokesh Vutla {0x06F0, 451, 0}, /* CFG_RGMII0_RXC_IN */ 1227443b0df3SLokesh Vutla {0x06FC, 127, 1571}, /* CFG_RGMII0_RXCTL_IN */ 1228443b0df3SLokesh Vutla {0x0708, 165, 1178}, /* CFG_RGMII0_RXD0_IN */ 1229443b0df3SLokesh Vutla {0x0714, 136, 1302}, /* CFG_RGMII0_RXD1_IN */ 1230443b0df3SLokesh Vutla {0x0720, 0, 1520}, /* CFG_RGMII0_RXD2_IN */ 1231443b0df3SLokesh Vutla {0x072C, 28, 1690}, /* CFG_RGMII0_RXD3_IN */ 1232443b0df3SLokesh Vutla {0x0740, 121, 0}, /* CFG_RGMII0_TXC_OUT */ 1233443b0df3SLokesh Vutla {0x074C, 60, 0}, /* CFG_RGMII0_TXCTL_OUT */ 1234443b0df3SLokesh Vutla {0x0758, 153, 0}, /* CFG_RGMII0_TXD0_OUT */ 1235443b0df3SLokesh Vutla {0x0764, 35, 0}, /* CFG_RGMII0_TXD1_OUT */ 1236443b0df3SLokesh Vutla {0x0770, 0, 0}, /* CFG_RGMII0_TXD2_OUT */ 1237443b0df3SLokesh Vutla {0x077C, 172, 0}, /* CFG_RGMII0_TXD3_OUT */ 1238443b0df3SLokesh Vutla {0x0A70, 147, 0}, /* CFG_VIN2A_D12_OUT */ 1239443b0df3SLokesh Vutla {0x0A7C, 110, 0}, /* CFG_VIN2A_D13_OUT */ 1240443b0df3SLokesh Vutla {0x0A88, 18, 0}, /* CFG_VIN2A_D14_OUT */ 1241443b0df3SLokesh Vutla {0x0A94, 82, 0}, /* CFG_VIN2A_D15_OUT */ 1242443b0df3SLokesh Vutla {0x0AA0, 33, 0}, /* CFG_VIN2A_D16_OUT */ 1243443b0df3SLokesh Vutla {0x0AAC, 0, 0}, /* CFG_VIN2A_D17_OUT */ 1244443b0df3SLokesh Vutla {0x0AB0, 417, 0}, /* CFG_VIN2A_D18_IN */ 1245443b0df3SLokesh Vutla {0x0ABC, 156, 843}, /* CFG_VIN2A_D19_IN */ 1246443b0df3SLokesh Vutla {0x0AD4, 223, 1413}, /* CFG_VIN2A_D20_IN */ 1247443b0df3SLokesh Vutla {0x0AE0, 169, 1415}, /* CFG_VIN2A_D21_IN */ 1248443b0df3SLokesh Vutla {0x0AEC, 43, 1150}, /* CFG_VIN2A_D22_IN */ 1249443b0df3SLokesh Vutla {0x0AF8, 0, 1210}, /* CFG_VIN2A_D23_IN */ 1250443b0df3SLokesh Vutla {0x0B30, 0, 200}, /* CFG_VIN2A_D5_OUT */ 1251443b0df3SLokesh Vutla {0x0B9C, 1281, 497}, /* CFG_VOUT1_CLK_OUT */ 1252443b0df3SLokesh Vutla {0x0BA8, 379, 0}, /* CFG_VOUT1_D0_OUT */ 1253443b0df3SLokesh Vutla {0x0BB4, 441, 0}, /* CFG_VOUT1_D10_OUT */ 1254443b0df3SLokesh Vutla {0x0BC0, 461, 0}, /* CFG_VOUT1_D11_OUT */ 1255443b0df3SLokesh Vutla {0x0BCC, 1189, 0}, /* CFG_VOUT1_D12_OUT */ 1256443b0df3SLokesh Vutla {0x0BD8, 312, 0}, /* CFG_VOUT1_D13_OUT */ 1257443b0df3SLokesh Vutla {0x0BE4, 298, 0}, /* CFG_VOUT1_D14_OUT */ 1258443b0df3SLokesh Vutla {0x0BF0, 284, 0}, /* CFG_VOUT1_D15_OUT */ 1259443b0df3SLokesh Vutla {0x0BFC, 152, 0}, /* CFG_VOUT1_D16_OUT */ 1260443b0df3SLokesh Vutla {0x0C08, 216, 0}, /* CFG_VOUT1_D17_OUT */ 1261443b0df3SLokesh Vutla {0x0C14, 408, 0}, /* CFG_VOUT1_D18_OUT */ 1262443b0df3SLokesh Vutla {0x0C20, 519, 0}, /* CFG_VOUT1_D19_OUT */ 1263443b0df3SLokesh Vutla {0x0C2C, 475, 0}, /* CFG_VOUT1_D1_OUT */ 1264443b0df3SLokesh Vutla {0x0C38, 316, 0}, /* CFG_VOUT1_D20_OUT */ 1265443b0df3SLokesh Vutla {0x0C44, 59, 0}, /* CFG_VOUT1_D21_OUT */ 1266443b0df3SLokesh Vutla {0x0C50, 221, 0}, /* CFG_VOUT1_D22_OUT */ 1267443b0df3SLokesh Vutla {0x0C5C, 96, 0}, /* CFG_VOUT1_D23_OUT */ 1268443b0df3SLokesh Vutla {0x0C68, 264, 0}, /* CFG_VOUT1_D2_OUT */ 1269443b0df3SLokesh Vutla {0x0C74, 421, 0}, /* CFG_VOUT1_D3_OUT */ 1270443b0df3SLokesh Vutla {0x0C80, 1257, 0}, /* CFG_VOUT1_D4_OUT */ 1271443b0df3SLokesh Vutla {0x0C8C, 432, 0}, /* CFG_VOUT1_D5_OUT */ 1272443b0df3SLokesh Vutla {0x0C98, 436, 0}, /* CFG_VOUT1_D6_OUT */ 1273443b0df3SLokesh Vutla {0x0CA4, 440, 0}, /* CFG_VOUT1_D7_OUT */ 1274443b0df3SLokesh Vutla {0x0CB0, 81, 100}, /* CFG_VOUT1_D8_OUT */ 1275443b0df3SLokesh Vutla {0x0CBC, 471, 0}, /* CFG_VOUT1_D9_OUT */ 1276443b0df3SLokesh Vutla {0x0CC8, 0, 0}, /* CFG_VOUT1_DE_OUT */ 1277443b0df3SLokesh Vutla {0x0CE0, 0, 0}, /* CFG_VOUT1_HSYNC_OUT */ 1278443b0df3SLokesh Vutla {0x0CEC, 815, 0}, /* CFG_VOUT1_VSYNC_OUT */ 1279443b0df3SLokesh Vutla }; 1280443b0df3SLokesh Vutla 1281c020d355SSteve Kipisz const struct iodelay_cfg_entry iodelay_cfg_array_am572x_idk[] = { 1282c887bef8SLokesh Vutla {0x0114, 1861, 901}, /* CFG_GPMC_A0_IN */ 1283c887bef8SLokesh Vutla {0x0120, 0, 0}, /* CFG_GPMC_A10_IN */ 1284c887bef8SLokesh Vutla {0x012C, 1783, 1178}, /* CFG_GPMC_A11_IN */ 1285c887bef8SLokesh Vutla {0x0138, 1903, 853}, /* CFG_GPMC_A12_IN */ 1286c020d355SSteve Kipisz {0x0144, 0, 0}, /* CFG_GPMC_A13_IN */ 1287c887bef8SLokesh Vutla {0x0150, 2575, 966}, /* CFG_GPMC_A14_IN */ 1288c887bef8SLokesh Vutla {0x015C, 2503, 889}, /* CFG_GPMC_A15_IN */ 1289c887bef8SLokesh Vutla {0x0168, 2528, 1007}, /* CFG_GPMC_A16_IN */ 1290c887bef8SLokesh Vutla {0x0170, 0, 0}, /* CFG_GPMC_A16_OUT */ 1291c887bef8SLokesh Vutla {0x0174, 2533, 980}, /* CFG_GPMC_A17_IN */ 1292c887bef8SLokesh Vutla {0x0188, 590, 0}, /* CFG_GPMC_A18_OUT */ 1293c887bef8SLokesh Vutla {0x0198, 1652, 891}, /* CFG_GPMC_A1_IN */ 1294c887bef8SLokesh Vutla {0x0204, 1888, 1212}, /* CFG_GPMC_A2_IN */ 1295c887bef8SLokesh Vutla {0x0210, 1839, 1274}, /* CFG_GPMC_A3_IN */ 1296c887bef8SLokesh Vutla {0x021C, 1868, 1113}, /* CFG_GPMC_A4_IN */ 1297c887bef8SLokesh Vutla {0x0228, 1757, 1079}, /* CFG_GPMC_A5_IN */ 1298c887bef8SLokesh Vutla {0x0234, 1800, 670}, /* CFG_GPMC_A6_IN */ 1299c887bef8SLokesh Vutla {0x0240, 1967, 898}, /* CFG_GPMC_A7_IN */ 1300c887bef8SLokesh Vutla {0x024C, 1731, 959}, /* CFG_GPMC_A8_IN */ 1301c887bef8SLokesh Vutla {0x0258, 1766, 1150}, /* CFG_GPMC_A9_IN */ 1302c020d355SSteve Kipisz {0x0374, 0, 0}, /* CFG_GPMC_CS2_OUT */ 1303c887bef8SLokesh Vutla {0x0590, 1000, 4200}, /* CFG_MCASP5_ACLKX_OUT */ 1304c887bef8SLokesh Vutla {0x05AC, 800, 3800}, /* CFG_MCASP5_FSX_IN */ 1305e79d2dc7SLokesh Vutla {0x06F0, 260, 0}, /* CFG_RGMII0_RXC_IN */ 1306e79d2dc7SLokesh Vutla {0x06FC, 0, 1412}, /* CFG_RGMII0_RXCTL_IN */ 1307e79d2dc7SLokesh Vutla {0x0708, 123, 1047}, /* CFG_RGMII0_RXD0_IN */ 1308e79d2dc7SLokesh Vutla {0x0714, 139, 1081}, /* CFG_RGMII0_RXD1_IN */ 1309e79d2dc7SLokesh Vutla {0x0720, 195, 1100}, /* CFG_RGMII0_RXD2_IN */ 1310e79d2dc7SLokesh Vutla {0x072C, 239, 1216}, /* CFG_RGMII0_RXD3_IN */ 1311e79d2dc7SLokesh Vutla {0x0740, 89, 0}, /* CFG_RGMII0_TXC_OUT */ 1312e79d2dc7SLokesh Vutla {0x074C, 15, 125}, /* CFG_RGMII0_TXCTL_OUT */ 1313e79d2dc7SLokesh Vutla {0x0758, 339, 162}, /* CFG_RGMII0_TXD0_OUT */ 1314e79d2dc7SLokesh Vutla {0x0764, 146, 94}, /* CFG_RGMII0_TXD1_OUT */ 1315e79d2dc7SLokesh Vutla {0x0770, 0, 27}, /* CFG_RGMII0_TXD2_OUT */ 1316e79d2dc7SLokesh Vutla {0x077C, 291, 205}, /* CFG_RGMII0_TXD3_OUT */ 1317e79d2dc7SLokesh Vutla {0x0A70, 0, 0}, /* CFG_VIN2A_D12_OUT */ 1318e79d2dc7SLokesh Vutla {0x0A7C, 219, 101}, /* CFG_VIN2A_D13_OUT */ 1319e79d2dc7SLokesh Vutla {0x0A88, 92, 58}, /* CFG_VIN2A_D14_OUT */ 1320e79d2dc7SLokesh Vutla {0x0A94, 135, 100}, /* CFG_VIN2A_D15_OUT */ 1321e79d2dc7SLokesh Vutla {0x0AA0, 154, 101}, /* CFG_VIN2A_D16_OUT */ 1322e79d2dc7SLokesh Vutla {0x0AAC, 78, 27}, /* CFG_VIN2A_D17_OUT */ 1323e79d2dc7SLokesh Vutla {0x0AB0, 411, 0}, /* CFG_VIN2A_D18_IN */ 1324e79d2dc7SLokesh Vutla {0x0ABC, 0, 382}, /* CFG_VIN2A_D19_IN */ 1325e79d2dc7SLokesh Vutla {0x0AD4, 320, 750}, /* CFG_VIN2A_D20_IN */ 1326e79d2dc7SLokesh Vutla {0x0AE0, 192, 836}, /* CFG_VIN2A_D21_IN */ 1327e79d2dc7SLokesh Vutla {0x0AEC, 294, 669}, /* CFG_VIN2A_D22_IN */ 1328e79d2dc7SLokesh Vutla {0x0AF8, 50, 700}, /* CFG_VIN2A_D23_IN */ 1329c887bef8SLokesh Vutla {0x0B30, 0, 0}, /* CFG_VIN2A_D5_OUT */ 1330e79d2dc7SLokesh Vutla {0x0B9C, 1126, 751}, /* CFG_VOUT1_CLK_OUT */ 1331e79d2dc7SLokesh Vutla {0x0BA8, 395, 0}, /* CFG_VOUT1_D0_OUT */ 1332e79d2dc7SLokesh Vutla {0x0BB4, 282, 0}, /* CFG_VOUT1_D10_OUT */ 1333e79d2dc7SLokesh Vutla {0x0BC0, 348, 0}, /* CFG_VOUT1_D11_OUT */ 1334e79d2dc7SLokesh Vutla {0x0BCC, 1240, 0}, /* CFG_VOUT1_D12_OUT */ 1335e79d2dc7SLokesh Vutla {0x0BD8, 182, 0}, /* CFG_VOUT1_D13_OUT */ 1336e79d2dc7SLokesh Vutla {0x0BE4, 311, 0}, /* CFG_VOUT1_D14_OUT */ 1337e79d2dc7SLokesh Vutla {0x0BF0, 285, 0}, /* CFG_VOUT1_D15_OUT */ 1338e79d2dc7SLokesh Vutla {0x0BFC, 166, 0}, /* CFG_VOUT1_D16_OUT */ 1339e79d2dc7SLokesh Vutla {0x0C08, 278, 0}, /* CFG_VOUT1_D17_OUT */ 1340e79d2dc7SLokesh Vutla {0x0C14, 425, 0}, /* CFG_VOUT1_D18_OUT */ 1341e79d2dc7SLokesh Vutla {0x0C20, 516, 0}, /* CFG_VOUT1_D19_OUT */ 1342e79d2dc7SLokesh Vutla {0x0C2C, 521, 0}, /* CFG_VOUT1_D1_OUT */ 1343e79d2dc7SLokesh Vutla {0x0C38, 386, 0}, /* CFG_VOUT1_D20_OUT */ 1344e79d2dc7SLokesh Vutla {0x0C44, 111, 0}, /* CFG_VOUT1_D21_OUT */ 1345e79d2dc7SLokesh Vutla {0x0C50, 227, 0}, /* CFG_VOUT1_D22_OUT */ 1346e79d2dc7SLokesh Vutla {0x0C5C, 0, 0}, /* CFG_VOUT1_D23_OUT */ 1347e79d2dc7SLokesh Vutla {0x0C68, 282, 0}, /* CFG_VOUT1_D2_OUT */ 1348e79d2dc7SLokesh Vutla {0x0C74, 438, 0}, /* CFG_VOUT1_D3_OUT */ 1349e79d2dc7SLokesh Vutla {0x0C80, 1298, 0}, /* CFG_VOUT1_D4_OUT */ 1350e79d2dc7SLokesh Vutla {0x0C8C, 397, 0}, /* CFG_VOUT1_D5_OUT */ 1351e79d2dc7SLokesh Vutla {0x0C98, 321, 0}, /* CFG_VOUT1_D6_OUT */ 1352e79d2dc7SLokesh Vutla {0x0CA4, 155, 309}, /* CFG_VOUT1_D7_OUT */ 1353e79d2dc7SLokesh Vutla {0x0CB0, 212, 0}, /* CFG_VOUT1_D8_OUT */ 1354e79d2dc7SLokesh Vutla {0x0CBC, 466, 0}, /* CFG_VOUT1_D9_OUT */ 1355e79d2dc7SLokesh Vutla {0x0CC8, 0, 0}, /* CFG_VOUT1_DE_OUT */ 1356e79d2dc7SLokesh Vutla {0x0CE0, 0, 0}, /* CFG_VOUT1_HSYNC_OUT */ 1357e79d2dc7SLokesh Vutla {0x0CEC, 139, 701}, /* CFG_VOUT1_VSYNC_OUT */ 1358c020d355SSteve Kipisz }; 13594d8397c6SSteve Kipisz 13604d8397c6SSteve Kipisz const struct iodelay_cfg_entry iodelay_cfg_array_am571x_idk[] = { 13612d7e9e9dSLokesh Vutla {0x0114, 1873, 702}, /* CFG_GPMC_A0_IN */ 13622d7e9e9dSLokesh Vutla {0x0120, 0, 0}, /* CFG_GPMC_A10_IN */ 13632d7e9e9dSLokesh Vutla {0x012C, 1851, 1011}, /* CFG_GPMC_A11_IN */ 13642d7e9e9dSLokesh Vutla {0x0138, 2009, 601}, /* CFG_GPMC_A12_IN */ 13654d8397c6SSteve Kipisz {0x0144, 0, 0}, /* CFG_GPMC_A13_IN */ 13662d7e9e9dSLokesh Vutla {0x0150, 2247, 1186}, /* CFG_GPMC_A14_IN */ 13672d7e9e9dSLokesh Vutla {0x015C, 2176, 1197}, /* CFG_GPMC_A15_IN */ 13682d7e9e9dSLokesh Vutla {0x0168, 2229, 1268}, /* CFG_GPMC_A16_IN */ 13694d8397c6SSteve Kipisz {0x0170, 0, 0}, /* CFG_GPMC_A16_OUT */ 13702d7e9e9dSLokesh Vutla {0x0174, 2251, 1217}, /* CFG_GPMC_A17_IN */ 13714d8397c6SSteve Kipisz {0x0188, 0, 0}, /* CFG_GPMC_A18_OUT */ 13722d7e9e9dSLokesh Vutla {0x0198, 1629, 772}, /* CFG_GPMC_A1_IN */ 13732d7e9e9dSLokesh Vutla {0x0204, 1734, 898}, /* CFG_GPMC_A2_IN */ 13742d7e9e9dSLokesh Vutla {0x0210, 1757, 1076}, /* CFG_GPMC_A3_IN */ 13752d7e9e9dSLokesh Vutla {0x021C, 1794, 893}, /* CFG_GPMC_A4_IN */ 13762d7e9e9dSLokesh Vutla {0x0228, 1726, 853}, /* CFG_GPMC_A5_IN */ 13772d7e9e9dSLokesh Vutla {0x0234, 1792, 612}, /* CFG_GPMC_A6_IN */ 13782d7e9e9dSLokesh Vutla {0x0240, 2117, 610}, /* CFG_GPMC_A7_IN */ 13792d7e9e9dSLokesh Vutla {0x024C, 1758, 653}, /* CFG_GPMC_A8_IN */ 13802d7e9e9dSLokesh Vutla {0x0258, 1705, 899}, /* CFG_GPMC_A9_IN */ 13812d7e9e9dSLokesh Vutla {0x0374, 0, 0}, /* CFG_GPMC_CS2_OUT */ 13824d8397c6SSteve Kipisz {0x06F0, 413, 0}, /* CFG_RGMII0_RXC_IN */ 13834d8397c6SSteve Kipisz {0x06FC, 27, 2296}, /* CFG_RGMII0_RXCTL_IN */ 13844d8397c6SSteve Kipisz {0x0708, 3, 1721}, /* CFG_RGMII0_RXD0_IN */ 13854d8397c6SSteve Kipisz {0x0714, 134, 1786}, /* CFG_RGMII0_RXD1_IN */ 13864d8397c6SSteve Kipisz {0x0720, 40, 1966}, /* CFG_RGMII0_RXD2_IN */ 13874d8397c6SSteve Kipisz {0x072C, 0, 2057}, /* CFG_RGMII0_RXD3_IN */ 13884d8397c6SSteve Kipisz {0x0740, 0, 60}, /* CFG_RGMII0_TXC_OUT */ 13894d8397c6SSteve Kipisz {0x074C, 0, 60}, /* CFG_RGMII0_TXCTL_OUT */ 13904d8397c6SSteve Kipisz {0x0758, 0, 60}, /* CFG_RGMII0_TXD0_OUT */ 13914d8397c6SSteve Kipisz {0x0764, 0, 0}, /* CFG_RGMII0_TXD1_OUT */ 13924d8397c6SSteve Kipisz {0x0770, 0, 60}, /* CFG_RGMII0_TXD2_OUT */ 13934d8397c6SSteve Kipisz {0x077C, 0, 120}, /* CFG_RGMII0_TXD3_OUT */ 13944d8397c6SSteve Kipisz {0x0A70, 0, 0}, /* CFG_VIN2A_D12_OUT */ 13954d8397c6SSteve Kipisz {0x0A7C, 170, 0}, /* CFG_VIN2A_D13_OUT */ 13964d8397c6SSteve Kipisz {0x0A88, 150, 0}, /* CFG_VIN2A_D14_OUT */ 13974d8397c6SSteve Kipisz {0x0A94, 0, 0}, /* CFG_VIN2A_D15_OUT */ 13984d8397c6SSteve Kipisz {0x0AA0, 60, 0}, /* CFG_VIN2A_D16_OUT */ 13994d8397c6SSteve Kipisz {0x0AAC, 60, 0}, /* CFG_VIN2A_D17_OUT */ 14004d8397c6SSteve Kipisz {0x0AB0, 530, 0}, /* CFG_VIN2A_D18_IN */ 14014d8397c6SSteve Kipisz {0x0ABC, 71, 1099}, /* CFG_VIN2A_D19_IN */ 14024d8397c6SSteve Kipisz {0x0AD4, 142, 1337}, /* CFG_VIN2A_D20_IN */ 14034d8397c6SSteve Kipisz {0x0AE0, 114, 1517}, /* CFG_VIN2A_D21_IN */ 14044d8397c6SSteve Kipisz {0x0AEC, 171, 1331}, /* CFG_VIN2A_D22_IN */ 14054d8397c6SSteve Kipisz {0x0AF8, 0, 1328}, /* CFG_VIN2A_D23_IN */ 14064d8397c6SSteve Kipisz }; 14074d8397c6SSteve Kipisz 14082d7e9e9dSLokesh Vutla const struct iodelay_cfg_entry iodelay_cfg_array_am571x_idk_4port[] = { 14092d7e9e9dSLokesh Vutla {0x0588, 2100, 1959}, /* CFG_MCASP5_ACLKX_IN */ 14102d7e9e9dSLokesh Vutla {0x05AC, 2100, 1780}, /* CFG_MCASP5_FSX_IN */ 14112d7e9e9dSLokesh Vutla {0x0B30, 0, 400}, /* CFG_VIN2A_D5_OUT */ 14122d7e9e9dSLokesh Vutla }; 141374cc8b09SKipisz, Steven #endif 141474cc8b09SKipisz, Steven #endif /* _MUX_DATA_BEAGLE_X15_H_ */ 1415