Home
last modified time | relevance | path

Searched refs:L1 (Results 1 – 25 of 43) sorted by relevance

12

/openbmc/qemu/tests/unit/
H A Dtest-hbitmap.c19 #define L1 BITS_PER_LONG macro
20 #define L2 (BITS_PER_LONG * L1)
233 hbitmap_test_init(data, L1, 0); in test_hbitmap_iter_empty()
242 hbitmap_test_check(data, L1 - 1); in test_hbitmap_iter_partial()
243 hbitmap_test_check(data, L1); in test_hbitmap_iter_partial()
244 hbitmap_test_check(data, L1 * 2 - 1); in test_hbitmap_iter_partial()
248 hbitmap_test_check(data, L2 + L1); in test_hbitmap_iter_partial()
249 hbitmap_test_check(data, L2 + L1 * 2 - 1); in test_hbitmap_iter_partial()
253 hbitmap_test_check(data, L2 * 2 + L1); in test_hbitmap_iter_partial()
254 hbitmap_test_check(data, L2 * 2 + L1 * 2 - 1); in test_hbitmap_iter_partial()
[all …]
/openbmc/qemu/tests/qemu-iotests/
H A D080.out40 == Invalid L1 table ==
42 qemu-io: can't open device TEST_DIR/t.qcow2: Active L1 table too large
43 qemu-io: can't open device TEST_DIR/t.qcow2: Active L1 table too large
44 qemu-io: can't open device TEST_DIR/t.qcow2: Active L1 table offset invalid
45 qemu-io: can't open device TEST_DIR/t.qcow2: Active L1 table offset invalid
47 == Invalid L1 table (with internal snapshot in the image) ==
49 qemu-img: Could not open 'TEST_DIR/t.IMGFMT': L1 table is too small
62 == Invalid snapshot L1 table offset ==
66 qemu-img: Failed to load snapshot: Snapshot L1 table offset invalid
67 qemu-img: Snapshot L1 table offset invalid
[all …]
H A D029.out3 Test loading internal snapshots where the L1 table of the snapshot
4 is smaller than the current L1 table.
24 qcow2_snapshot_load_tmp() should take the L1 size from the snapshot
H A D02953 echo Test loading internal snapshots where the L1 table of the snapshot
54 echo is smaller than the current L1 table.
H A D115.out3 === Testing large refcount and L1 table ===
H A D060.out3 === Testing L2 reference into L1 ===
11 qcow2: Marking image as corrupt: Preventing invalid write on metadata (overlaps with active L1 tabl…
124 === Testing unaligned L1 entry ===
129 qcow2: Marking image as corrupt: L2 table offset 0x42a00 unaligned (L1 index: 0); further corruptio…
134 qcow2: Marking image as corrupt: L2 table offset 0x42a00 unaligned (L1 index: 0); further corruptio…
206 === Testing empty refcount table with valid L1 and L2 tables ===
432 qcow2: Image is corrupt: L2 table offset 0x2a2a2a00 unaligned (L1 index: 0); further non-fatal corr…
433 …TED", "data": {"device": "", "msg": "L2 table offset 0x2a2a2a00 unaligned (L1 index: 0)", "node-na…
H A D116.out23 == invalid L1 table offset ==
H A D217.out13 qemu-img: Could not delete snapshot 'foo': Failed to free the cluster and L1 table: Input/output er…
H A D026169 echo === L1 growth tests ===
H A D206.out190 Job failed: Could not resize image: Failed to grow the L1 table: File too large
250 Job failed: Could not resize image: Failed to grow the L1 table: File too large
/openbmc/phosphor-inventory-manager/
H A Dutils.hpp150 template <typename L1, typename L2, typename R1, typename R2>
151 bool operator()(const std::pair<L1, L2>& l, in operator ()()
168 template <typename L1, typename L2, typename R>
169 bool operator()(const std::pair<L1, L2>& l, const R& r) const in operator ()()
/openbmc/qemu/docs/interop/
H A Dqed_spec.rst14 a ``data cluster``, an ``L2``, or an ``L1 table``. L1 and L2 tables are composed
33 uint32_t table_size; /* for L1 and L2 tables, in clusters */
67 - ``l1_table_offset`` is the offset of the first byte of the L1 table in the image
109 | L1 table |
125 clusters rooted by the L1 table:
131 L1, L2, and data cluster offsets must be aligned to ``header.cluster_size``.
184 | L1 index | L2 index | byte offset |
211 a cluster referenced more than once by L1 or L2 tables. A cluster has been leaked
H A Dparallels.rst217 The number of entries in the L1 table of the bitmap.
219 variable: L1 offset table (l1_table), size: 8 * l1_size bytes
223 saved in the L1 offset table specified by the feature extension. Each L1 table
226 Given an offset in bytes into the bitmap data, corresponding L1 entry is::
230 If an L1 table entry is 0, all bits in the corresponding cluster of the bitmap
233 If an L1 table entry is 1, all bits in the corresponding cluster of the bitmap
236 If an L1 table entry is not 0 or 1, it contains the corresponding cluster
H A Dqcow2.rst54 the maximum L1 table size. With a 2 MB cluster
58 larger than 128 GB (37 bits). Meanwhile, L1/L2
70 Number of entries in the active L1 table
73 Offset into the image file at which the active L1 table
100 may be inconsistent, make sure to scan L1/L2
471 large), note that some qcow2 metadata such as L1/L2 tables must point
515 guest clusters to host clusters. They are called L1 and L2 table.
517 The L1 table has a variable size (stored in the header) and may use multiple
521 The L1 and L2 tables have implications on the maximum virtual file
522 size; for a given L1 table size, a larger cluster size is required for
[all …]
/openbmc/phosphor-webui/app/assets/icons/
H A Dicon-pending.svg1 …08,1.19l-.39,1.07a8.07,8.07,0,0,1-2.4-1.39Zm-2.33-4A6.77,6.77,0,0,0,2,11.43L1,12A7.9,7.9,0,0,1,0,9…
/openbmc/u-boot/board/freescale/bsc9131rdb/
H A DREADME46 . 32-Kbyte L1 instruction cache
47 . 32-Kbyte L1 data cache
54 . 32 Kbyte 8-way level 1 instruction cache (L1 ICache)
55 . 32 Kbyte 8-way level 1 data cache (L1 DCache)
/openbmc/u-boot/board/freescale/ls1021atwr/
H A DREADME23 protection on both L1 and L2 caches. The LS1021A processor is pin- and
30 - 32 Kbyte L1 Instruction Cache and Data Cache for each core (ECC protection)
/openbmc/u-boot/board/freescale/ls1021aqds/
H A DREADME23 protection on both L1 and L2 caches. The LS1021A processor is pin- and
30 - 32 Kbyte L1 Instruction Cache and Data Cache for each core (ECC protection)
/openbmc/u-boot/arch/mips/
H A DKconfig391 The total size of the L1 Dcache, if known at compile time.
397 The size of L1 Dcache lines, if known at compile time.
403 The total size of the L1 ICache, if known at compile time.
409 The size of L1 Icache lines, if known at compile time.
/openbmc/u-boot/board/freescale/bsc9132qds/
H A DREADME46 - 32 KB, 8-way, level 1 instruction cache (L1 ICache)
47 - 32 KB, 8-way, level 1 data cache (L1 DCache)
/openbmc/u-boot/arch/x86/include/asm/arch-braswell/
H A Dgpio.h32 L1, enumerator
/openbmc/qemu/docs/devel/testing/
H A Dblkdebug.rst90 block driver tells ``blkdebug`` when it accesses the L1 table so rules can match
91 only L1 table accesses and not other metadata or guest data requests.
/openbmc/qemu/docs/
H A Dqcow2-cache.txt40 called the L1 and L2 tables.
42 There is one single L1 table per disk image. The table is small and is
61 L1/L2 tables described above.
/openbmc/u-boot/arch/arm/cpu/armv7/
H A Dstart.S282 @ lines allocate in the L1 or L2 cache.
284 @ lines allocate in the L1 cache.
/openbmc/qemu/target/s390x/tcg/
H A Dinsn-format.h.inc50 /* ??? Odd man out. The L1 field here is really a register, but the

12