xref: /openbmc/linux/drivers/pci/pcie/Kconfig (revision 7ae9fb1b7ecbb5d85d07857943f677fd1a559b18)
1 # SPDX-License-Identifier: GPL-2.0
2 #
3 # PCI Express Port Bus Configuration
4 #
5 config PCIEPORTBUS
6 	bool "PCI Express Port Bus support"
7 	default y if USB4
8 	help
9 	  This enables PCI Express Port Bus support. Users can then enable
10 	  support for Native Hot-Plug, Advanced Error Reporting, Power
11 	  Management Events, and Downstream Port Containment.
12 
13 #
14 # Include service Kconfig here
15 #
16 config HOTPLUG_PCI_PCIE
17 	bool "PCI Express Hotplug driver"
18 	depends on HOTPLUG_PCI && PCIEPORTBUS
19 	default y if USB4
20 	help
21 	  Say Y here if you have a motherboard that supports PCIe native
22 	  hotplug.
23 
24 	  Thunderbolt/USB4 PCIe tunneling depends on native PCIe hotplug.
25 
26 	  When in doubt, say N.
27 
28 config PCIEAER
29 	bool "PCI Express Advanced Error Reporting support"
30 	depends on PCIEPORTBUS
31 	select RAS
32 	help
33 	  This enables PCI Express Root Port Advanced Error Reporting
34 	  (AER) driver support. Error reporting messages sent to Root
35 	  Port will be handled by PCI Express AER driver.
36 
37 config PCIEAER_INJECT
38 	tristate "PCI Express error injection support"
39 	depends on PCIEAER
40 	select GENERIC_IRQ_INJECTION
41 	help
42 	  This enables PCI Express Root Port Advanced Error Reporting
43 	  (AER) software error injector.
44 
45 	  Debugging AER code is quite difficult because it is hard
46 	  to trigger various real hardware errors. Software-based
47 	  error injection can fake almost all kinds of errors with the
48 	  help of a user space helper tool aer-inject, which can be
49 	  gotten from:
50 	     https://git.kernel.org/cgit/linux/kernel/git/gong.chen/aer-inject.git/
51 
52 #
53 # PCI Express ECRC
54 #
55 config PCIE_ECRC
56 	bool "PCI Express ECRC settings control"
57 	depends on PCIEAER
58 	help
59 	  Used to override firmware/bios settings for PCI Express ECRC
60 	  (transaction layer end-to-end CRC checking).
61 
62 	  When in doubt, say N.
63 
64 #
65 # PCI Express ASPM
66 #
67 config PCIEASPM
68 	bool "PCI Express ASPM control" if EXPERT
69 	default y
70 	help
71 	  This enables OS control over PCI Express ASPM (Active State
72 	  Power Management) and Clock Power Management. ASPM supports
73 	  state L0/L0s/L1.
74 
75 	  ASPM is initially set up by the firmware. With this option enabled,
76 	  Linux can modify this state in order to disable ASPM on known-bad
77 	  hardware or configurations and enable it when known-safe.
78 
79 	  ASPM can be disabled or enabled at runtime via
80 	  /sys/module/pcie_aspm/parameters/policy
81 
82 	  When in doubt, say Y.
83 
84 choice
85 	prompt "Default ASPM policy"
86 	default PCIEASPM_DEFAULT
87 	depends on PCIEASPM
88 
89 config PCIEASPM_DEFAULT
90 	bool "BIOS default"
91 	depends on PCIEASPM
92 	help
93 	  Use the BIOS defaults for PCI Express ASPM.
94 
95 config PCIEASPM_POWERSAVE
96 	bool "Powersave"
97 	depends on PCIEASPM
98 	help
99 	  Enable PCI Express ASPM L0s and L1 where possible, even if the
100 	  BIOS did not.
101 
102 config PCIEASPM_POWER_SUPERSAVE
103 	bool "Power Supersave"
104 	depends on PCIEASPM
105 	help
106 	  Same as PCIEASPM_POWERSAVE, except it also enables L1 substates where
107 	  possible. This would result in higher power savings while staying in L1
108 	  where the components support it.
109 
110 config PCIEASPM_PERFORMANCE
111 	bool "Performance"
112 	depends on PCIEASPM
113 	help
114 	  Disable PCI Express ASPM L0s and L1, even if the BIOS enabled them.
115 endchoice
116 
117 config PCIE_PME
118 	def_bool y
119 	depends on PCIEPORTBUS && PM
120 
121 config PCIE_DPC
122 	bool "PCI Express Downstream Port Containment support"
123 	depends on PCIEPORTBUS && PCIEAER
124 	help
125 	  This enables PCI Express Downstream Port Containment (DPC)
126 	  driver support.  DPC events from Root and Downstream ports
127 	  will be handled by the DPC driver.  If your system doesn't
128 	  have this capability or you do not want to use this feature,
129 	  it is safe to answer N.
130 
131 config PCIE_PTM
132 	bool "PCI Express Precision Time Measurement support"
133 	help
134 	  This enables PCI Express Precision Time Measurement (PTM)
135 	  support.
136 
137 	  This is only useful if you have devices that support PTM, but it
138 	  is safe to enable even if you don't.
139 
140 config PCIE_EDR
141 	bool "PCI Express Error Disconnect Recover support"
142 	depends on PCIE_DPC && ACPI
143 	help
144 	  This option adds Error Disconnect Recover support as specified
145 	  in the Downstream Port Containment Related Enhancements ECN to
146 	  the PCI Firmware Specification r3.2.  Enable this if you want to
147 	  support hybrid DPC model which uses both firmware and OS to
148 	  implement DPC.
149