Searched refs:FEATURE_DPM_GFXCLK_BIT (Results 1 – 17 of 17) sorted by relevance
33 #define FEATURE_DPM_GFXCLK_BIT 1 macro68 #define FFEATURE_DPM_GFXCLK_MASK (1 << FEATURE_DPM_GFXCLK_BIT )
72 #define FEATURE_DPM_GFXCLK_BIT 1 macro139 #define FEATURE_DPM_GFXCLK_MASK (1 << FEATURE_DPM_GFXCLK_BIT )
68 #define FEATURE_DPM_GFXCLK_BIT 1 macro103 #define FEATURE_DPM_GFXCLK_MASK (1 << FEATURE_DPM_GFXCLK_BIT )
57 #define FEATURE_DPM_GFXCLK_BIT 1 macro129 #define FEATURE_DPM_GFXCLK_MASK (1 << FEATURE_DPM_GFXCLK_BIT )
39 #define FEATURE_DPM_GFXCLK_BIT 1 macro
50 #define FEATURE_DPM_GFXCLK_BIT 1 macro116 #define ALLOWED_FEATURE_CTRL_SCPM ((1 << FEATURE_DPM_GFXCLK_BIT) | \
49 #define FEATURE_DPM_GFXCLK_BIT 1 macro115 #define ALLOWED_FEATURE_CTRL_SCPM ((1 << FEATURE_DPM_GFXCLK_BIT) | \
72 #define FEATURE_DPM_GFXCLK_BIT 1 macro
77 #define FEATURE_DPM_GFXCLK_BIT 1 macro
66 FEATURE_MASK(FEATURE_DPM_GFXCLK_BIT) | \171 ALDEBARAN_FEA_MAP(SMU_FEATURE_DPM_GFXCLK_BIT, FEATURE_DPM_GFXCLK_BIT),947 (feature_mask & FEATURE_MASK(FEATURE_DPM_GFXCLK_BIT))) { in aldebaran_upload_dpm_level()1014 FEATURE_MASK(FEATURE_DPM_GFXCLK_BIT), in aldebaran_force_clk_levels()1023 FEATURE_MASK(FEATURE_DPM_GFXCLK_BIT), in aldebaran_force_clk_levels()
64 FEATURE_MASK(FEATURE_DPM_GFXCLK_BIT) | \270 *(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_DPM_GFXCLK_BIT); in smu_v13_0_7_get_allowed_feature_mask()
64 FEATURE_MASK(FEATURE_DPM_GFXCLK_BIT) | \300 *(uint64_t *)feature_mask &= ~FEATURE_MASK(FEATURE_DPM_GFXCLK_BIT); in smu_v13_0_0_get_allowed_feature_mask()
64 FEATURE_MASK(FEATURE_DPM_GFXCLK_BIT) | \311 *(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_DPM_GFXCLK_BIT); in navi10_get_allowed_feature_mask()
66 FEATURE_MASK(FEATURE_DPM_GFXCLK_BIT) | \307 *(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_DPM_GFXCLK_BIT); in sienna_cichlid_get_allowed_feature_mask()
306 FEATURE_DPM_GFXCLK_BIT; in vega12_init_dpm_defaults()
341 FEATURE_DPM_GFXCLK_BIT; in vega20_init_dpm_defaults()
377 FEATURE_DPM_GFXCLK_BIT; in vega10_init_dpm_defaults()