| /openbmc/u-boot/arch/arm/mach-omap2/omap3/ |
| H A D | sdrc.c | 172 write_sdrc_timings(CS1, sdrc_actim_base1, &timings); in do_sdrc_init()
183 if (cs == CS1) { in do_sdrc_init()
210 do_sdrc_init(CS1, NOT_EARLY); in dram_init()
211 size1 = get_sdr_cs_size(CS1); in dram_init()
223 size1 = get_sdr_cs_size(CS1); in dram_init_banksize()
227 gd->bd->bi_dram[1].start = PHYS_SDRAM_1 + get_sdr_cs_offset(CS1); in dram_init_banksize()
|
| H A D | emif4.c | 138 size1 = get_sdr_cs_size(CS1); in dram_init()
149 size1 = get_sdr_cs_size(CS1); in dram_init_banksize()
153 gd->bd->bi_dram[1].start = PHYS_SDRAM_1 + get_sdr_cs_offset(CS1); in dram_init_banksize()
|
| /openbmc/u-boot/doc/ |
| H A D | README.fsl-ddr | 31 |Controller | None | 2x1 lower | 2x1 upper | {CS0+CS1}, | {CS0+CS1+ |
32 |Interleaving | | {CS0+CS1} | {CS2+CS3} | {CS2+CS3} | CS2+CS3} |
37 | |CS0 Only| | | {CS0+CS1} | |
40 | |CS0 Only| | | {CS0+CS1} | |
43 | |CS0 Only| | | {CS0+CS1} | |
46 | | | | | {CS0+CS1} | |
49 interleaving using "2x2" rank interleaving, it only interleaves {CS0+CS1}
408 DDR Chip-Select Interleaving Mode: CS0+CS1
|
| /openbmc/u-boot/arch/mips/dts/ |
| H A D | mscc,ocelot_pcb.dtsi | 40 reg = <1>; /* CS1 */
|
| /openbmc/u-boot/board/freescale/mpc8315erdb/ |
| H A D | README | 38 0xe060_0000 0xe060_7fff NAND FLASH (CS1) 32K
42 is CS1.
|
| /openbmc/u-boot/board/Marvell/openrd/ |
| H A D | kwbimage.cfg | 128 DATA 0xFFD0150C 0x0FFFFFF5 # CS[1]n Size 256Mb Window enabled for CS1
134 # bit3-0: 0010, (read) M_ODT[0] is asserted during read from DRAM CS1
136 # bit19-16: 0010, (write) M_ODT[0] is asserted during write to DRAM CS1.
|
| /openbmc/u-boot/board/renesas/sh7785lcr/ |
| H A D | README.sh7785lcr | 26 0x04000000 - 0x05ffffff(CS1) | PLD | PLD
27 0x06000000 - 0x07ffffff(CS1) | reserved | I2C
|
| /openbmc/u-boot/board/freescale/mpc8313erdb/ |
| H A D | README | 38 0xe280_0000 0xe280_7fff NAND FLASH (CS1) 32K
45 is CS1.
|
| /openbmc/u-boot/board/amazon/kc1/ |
| H A D | kc1.c | 56 if (cs == CS1) in emif_get_device_details()
|
| /openbmc/u-boot/board/d-link/dns325/ |
| H A D | kwbimage.cfg | 150 DATA 0xFFD0150C 0x0FFFFFF5 # CS[1]n Size 256Mb Window enabled for CS1
153 # bit3-2: 1, CS1 hit selected
164 # bit19-16: 0b0011, (write) M_ODT[0] is asserted during write to DRAM CS0 and CS1
|
| /openbmc/u-boot/board/cloudengines/pogo_e02/ |
| H A D | kwbimage.cfg | 138 # bit3-0: 2, ODT0Rd, MODT[0] asserted during read from DRAM CS1
140 # bit19-16:2, ODT0Wr, MODT[0] asserted during write to DRAM CS1
|
| /openbmc/u-boot/board/iomega/iconnect/ |
| H A D | kwbimage.cfg | 134 # bit3-0: ODT0Rd, MODT[0] asserted during read from DRAM CS1
136 # bit19-16:2, ODT0Wr, MODT[0] asserted during write to DRAM CS1
|
| /openbmc/u-boot/board/raidsonic/ib62x0/ |
| H A D | kwbimage.cfg | 135 # bit3-0: ODT0Rd, MODT[0] asserted during read from DRAM CS1
137 # bit19-16:2, ODT0Wr, MODT[0] asserted during write to DRAM CS1
|
| /openbmc/u-boot/board/freescale/mx51evk/ |
| H A D | imximage.cfg | 86 /* Init DRAM on CS1 */
|
| /openbmc/u-boot/board/keymile/km83xx/ |
| H A D | README.kmeter1 | 16 0x8000_0000 8 bit 256KB GPIO/PIGGY on CS1
|
| /openbmc/u-boot/arch/arm/mach-omap2/omap4/ |
| H A D | sdram_elpida.c | 170 && (cs == CS1)) { in emif_get_device_details_sdp()
|
| /openbmc/u-boot/board/freescale/mpc837xemds/ |
| H A D | README | 54 0xf800_0000 0xf800_7fff BCSR on CS1 32K
|
| /openbmc/u-boot/arch/arm/include/asm/arch-omap3/ |
| H A D | mem.h | 12 #define CS1 0x1 /* mirror CS1 regs appear offset 0x30 from CS0 */ macro
|
| /openbmc/u-boot/board/cobra5272/bdm/ |
| H A D | cobra5272_uboot.gdb | 80 # CS1 -- external bus test
|
| /openbmc/u-boot/board/freescale/mpc832xemds/ |
| H A D | README | 74 0xf800_0000 0xf800_7fff BCSR on CS1 32K
|
| /openbmc/u-boot/board/freescale/ls2080ardb/ |
| H A D | README | 80 0x5_C000_0000..0x5_ffff_ffff IFC CS1 1GB (NOR/Promjet)
|
| /openbmc/u-boot/board/Marvell/dreamplug/ |
| H A D | kwbimage.cfg | 129 DATA 0xFFD0150C 0x0FFFFFF5 # CS[1]n Size 256Mb Window enabled for CS1
|
| /openbmc/u-boot/board/Marvell/sheevaplug/ |
| H A D | kwbimage.cfg | 128 DATA 0xFFD0150C 0x0FFFFFF5 # CS[1]n Size 256Mb Window enabled for CS1
|
| /openbmc/u-boot/board/Marvell/guruplug/ |
| H A D | kwbimage.cfg | 128 DATA 0xFFD0150C 0x0FFFFFF5 # CS[1]n Size 256Mb Window enabled for CS1
|
| /openbmc/u-boot/arch/arm/mach-omap2/ |
| H A D | emif-common.c | 150 do_lpddr2_init(base, CS1); in lpddr2_init()
871 dev_details.cs1_device_details = emif_get_device_details(emif_nr, CS1, in get_emif_mem_size()
1246 dev_details.cs1_device_details = emif_get_device_details(emif_nr, CS1, in do_sdram_init()
|