| /openbmc/u-boot/include/configs/ |
| H A D | MPC8610HPCD.h | 249 #define CONFIG_SYS_PCIE2_IO_PHYS 0xe2000000 macro
341 #define CONFIG_SYS_DBAT4L (CONFIG_SYS_PCIE2_IO_PHYS | BATL_PP_RW | BATL_CACHEINHIBIT \
343 #define CONFIG_SYS_DBAT4U (CONFIG_SYS_PCIE2_IO_PHYS | BATU_BL_32M | BATU_VS | BATU_VP)
344 #define CONFIG_SYS_IBAT4L (CONFIG_SYS_PCIE2_IO_PHYS | BATL_PP_RW | BATL_CACHEINHIBIT)
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| H A D | cyrus.h | 271 #define CONFIG_SYS_PCIE2_IO_PHYS 0xff8010000ull macro
273 #define CONFIG_SYS_PCIE2_IO_PHYS 0xf8010000 macro
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| H A D | MPC8572DS.h | 408 #define CONFIG_SYS_PCIE2_IO_PHYS 0xfffc10000ull macro
410 #define CONFIG_SYS_PCIE2_IO_PHYS 0xffc10000 macro
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| H A D | P1022DS.h | 428 #define CONFIG_SYS_PCIE2_IO_PHYS 0xfffc10000ull macro
430 #define CONFIG_SYS_PCIE2_IO_PHYS 0xffc10000 macro
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| H A D | MPC8536DS.h | 429 #define CONFIG_SYS_PCIE2_IO_PHYS 0xfffc20000ull macro
431 #define CONFIG_SYS_PCIE2_IO_PHYS 0xffc20000 macro
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| H A D | P2041RDB.h | 387 #define CONFIG_SYS_PCIE2_IO_PHYS 0xff8010000ull macro
389 #define CONFIG_SYS_PCIE2_IO_PHYS 0xf8010000 macro
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| H A D | corenet_ds.h | 395 #define CONFIG_SYS_PCIE2_IO_PHYS 0xff8010000ull macro
397 #define CONFIG_SYS_PCIE2_IO_PHYS 0xf8010000 macro
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| H A D | t4qds.h | 169 #define CONFIG_SYS_PCIE2_IO_PHYS 0xff8010000ull macro
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| H A D | P1010RDB.h | 176 #define CONFIG_SYS_PCIE2_IO_PHYS 0xfffc10000ull macro
178 #define CONFIG_SYS_PCIE2_IO_PHYS 0xffc10000 macro
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| H A D | T102xQDS.h | 548 #define CONFIG_SYS_PCIE2_IO_PHYS 0xff8010000ull macro
550 #define CONFIG_SYS_PCIE2_IO_PHYS 0xf8010000 macro
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| H A D | P1023RDB.h | 195 #define CONFIG_SYS_PCIE2_IO_PHYS 0xffc10000 macro
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| H A D | p1_p2_rdb_pc.h | 600 #define CONFIG_SYS_PCIE2_IO_PHYS 0xfffc10000ull macro
602 #define CONFIG_SYS_PCIE2_IO_PHYS 0xffc10000 macro
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| H A D | T102xRDB.h | 547 #define CONFIG_SYS_PCIE2_IO_PHYS 0xff8010000ull macro
549 #define CONFIG_SYS_PCIE2_IO_PHYS 0xf8010000 macro
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| H A D | MPC8544DS.h | 218 #define CONFIG_SYS_PCIE2_IO_PHYS 0xe1010000 macro
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| H A D | p1_twr.h | 231 #define CONFIG_SYS_PCIE2_IO_PHYS 0xffc10000 macro
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| H A D | xpedite537x.h | 287 #define CONFIG_SYS_PCIE2_IO_PHYS 0xe8800000 macro
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| H A D | UCP1020.h | 303 #define CONFIG_SYS_PCIE2_IO_PHYS 0xffc10000 macro
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| H A D | xpedite517x.h | 290 #define CONFIG_SYS_PCIE2_IO_PHYS 0xe8800000 macro
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| H A D | sbc8641d.h | 274 #define CONFIG_SYS_PCIE2_IO_PHYS CONFIG_SYS_PCIE2_IO_BUS macro
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| H A D | MPC8315ERDB.h | 341 #define CONFIG_SYS_PCIE2_IO_PHYS 0xD1000000 macro
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| H A D | MPC837XERDB.h | 382 #define CONFIG_SYS_PCIE2_IO_PHYS 0xD8000000 macro
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| H A D | MPC837XEMDS.h | 358 #define CONFIG_SYS_PCIE2_IO_PHYS 0xD8000000 macro
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| /openbmc/u-boot/board/freescale/mpc837xerdb/ |
| H A D | pci.c | 56 .phys_start = CONFIG_SYS_PCIE2_IO_PHYS,
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| /openbmc/u-boot/board/freescale/mpc837xemds/ |
| H A D | pci.c | 61 .phys_start = CONFIG_SYS_PCIE2_IO_PHYS,
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| /openbmc/u-boot/board/freescale/mpc8315erdb/ |
| H A D | mpc8315erdb.c | 111 .phys_start = CONFIG_SYS_PCIE2_IO_PHYS,
|