| /openbmc/u-boot/board/freescale/t4rdb/ |
| H A D | law.c | 18 #ifdef CONFIG_SYS_CPLD_BASE_PHYS
19 SET_LAW(CONFIG_SYS_CPLD_BASE_PHYS, LAW_SIZE_4K, LAW_TRGT_IF_IFC),
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| H A D | tlb.c | 112 SET_TLB_ENTRY(1, CONFIG_SYS_CPLD_BASE, CONFIG_SYS_CPLD_BASE_PHYS,
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| /openbmc/u-boot/board/freescale/t208xrdb/ |
| H A D | law.c | 21 #ifdef CONFIG_SYS_CPLD_BASE_PHYS
22 SET_LAW(CONFIG_SYS_CPLD_BASE_PHYS, LAW_SIZE_4K, LAW_TRGT_IF_IFC),
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| H A D | tlb.c | 130 SET_TLB_ENTRY(1, CONFIG_SYS_CPLD_BASE, CONFIG_SYS_CPLD_BASE_PHYS,
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| /openbmc/u-boot/board/freescale/t102xrdb/ |
| H A D | law.c | 20 #ifdef CONFIG_SYS_CPLD_BASE_PHYS
21 SET_LAW(CONFIG_SYS_CPLD_BASE_PHYS, LAW_SIZE_4K, LAW_TRGT_IF_IFC),
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| H A D | tlb.c | 97 SET_TLB_ENTRY(1, CONFIG_SYS_CPLD_BASE, CONFIG_SYS_CPLD_BASE_PHYS,
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| /openbmc/u-boot/board/freescale/t104xrdb/ |
| H A D | law.c | 20 #ifdef CONFIG_SYS_CPLD_BASE_PHYS
21 SET_LAW(CONFIG_SYS_CPLD_BASE_PHYS, LAW_SIZE_128K, LAW_TRGT_IF_IFC),
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| H A D | tlb.c | 115 SET_TLB_ENTRY(1, CONFIG_SYS_CPLD_BASE, CONFIG_SYS_CPLD_BASE_PHYS,
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| /openbmc/u-boot/board/freescale/p1010rdb/ |
| H A D | law.c | 12 SET_LAW(CONFIG_SYS_CPLD_BASE_PHYS, LAW_SIZE_128K, LAW_TRGT_IF_IFC),
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| H A D | tlb.c | 67 SET_TLB_ENTRY(1, CONFIG_SYS_CPLD_BASE, CONFIG_SYS_CPLD_BASE_PHYS,
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| /openbmc/u-boot/board/freescale/c29xpcie/ |
| H A D | law.c | 12 SET_LAW(CONFIG_SYS_CPLD_BASE_PHYS, LAW_SIZE_64K, LAW_TRGT_IF_IFC),
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| H A D | tlb.c | 48 SET_TLB_ENTRY(1, CONFIG_SYS_CPLD_BASE, CONFIG_SYS_CPLD_BASE_PHYS,
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| /openbmc/u-boot/board/freescale/p1_p2_rdb_pc/ |
| H A D | law.c | 11 SET_LAW(CONFIG_SYS_CPLD_BASE_PHYS, LAW_SIZE_1M, LAW_TRGT_IF_LBC),
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| H A D | tlb.c | 65 SET_TLB_ENTRY(1, CONFIG_SYS_CPLD_BASE, CONFIG_SYS_CPLD_BASE_PHYS,
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| /openbmc/u-boot/include/configs/ |
| H A D | P1010RDB.h | 440 #define CONFIG_SYS_CPLD_BASE_PHYS 0xfffb00000ull macro
442 #define CONFIG_SYS_CPLD_BASE_PHYS CONFIG_SYS_CPLD_BASE macro
445 #define CONFIG_SYS_CSPR3 (CSPR_PHYS_ADDR(CONFIG_SYS_CPLD_BASE_PHYS) \
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| H A D | C29XPCIE.h | 258 #define CONFIG_SYS_CPLD_BASE_PHYS (0xf00000000ull \ macro
261 #define CONFIG_SYS_CSPR2 (CSPR_PHYS_ADDR(CONFIG_SYS_CPLD_BASE_PHYS) \
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| H A D | p1_p2_rdb_pc.h | 442 #define CONFIG_SYS_CPLD_BASE_PHYS 0xfffa00000ull macro
444 #define CONFIG_SYS_CPLD_BASE_PHYS CONFIG_SYS_CPLD_BASE macro
447 #define CONFIG_CPLD_BR_PRELIM (BR_PHYS_ADDR(CONFIG_SYS_CPLD_BASE_PHYS) | \
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| H A D | T4240RDB.h | 451 #define CONFIG_SYS_CPLD_BASE_PHYS (0xf00000000ull | CONFIG_SYS_CPLD_BASE) macro
453 #define CONFIG_SYS_CSPR3 (CSPR_PHYS_ADDR(CONFIG_SYS_CPLD_BASE_PHYS) \
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| H A D | T104xRDB.h | 321 #define CONFIG_SYS_CPLD_BASE_PHYS (0xf00000000ull | CONFIG_SYS_CPLD_BASE) macro
323 #define CONFIG_SYS_CSPR2 (CSPR_PHYS_ADDR(CONFIG_SYS_CPLD_BASE_PHYS) \
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| H A D | T208xRDB.h | 220 #define CONFIG_SYS_CPLD_BASE_PHYS (0xf00000000ull | CONFIG_SYS_CPLD_BASE) macro
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| H A D | T102xRDB.h | 295 #define CONFIG_SYS_CPLD_BASE_PHYS (0xf00000000ull | CONFIG_SYS_CPLD_BASE) macro
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| /openbmc/u-boot/scripts/ |
| H A D | config_whitelist.txt | 2112 CONFIG_SYS_CPLD_BASE_PHYS
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